[ARM] Better OR's for MVE compares
[llvm-core.git] / test / MC / AArch64 / SVE2 / sri.s
blobc06fa6bc4527e319d7d924f80285b856668c7508
1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 < %s \
2 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
4 // RUN: | FileCheck %s --check-prefix=CHECK-ERROR
5 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
6 // RUN: | llvm-objdump -d -mattr=+sve2 - | FileCheck %s --check-prefix=CHECK-INST
7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
8 // RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
10 sri z0.b, z0.b, #1
11 // CHECK-INST: sri z0.b, z0.b, #1
12 // CHECK-ENCODING: [0x00,0xf0,0x0f,0x45]
13 // CHECK-ERROR: instruction requires: sve2
14 // CHECK-UNKNOWN: 00 f0 0f 45 <unknown>
16 sri z31.b, z31.b, #8
17 // CHECK-INST: sri z31.b, z31.b, #8
18 // CHECK-ENCODING: [0xff,0xf3,0x08,0x45]
19 // CHECK-ERROR: instruction requires: sve2
20 // CHECK-UNKNOWN: ff f3 08 45 <unknown>
22 sri z0.h, z0.h, #1
23 // CHECK-INST: sri z0.h, z0.h, #1
24 // CHECK-ENCODING: [0x00,0xf0,0x1f,0x45]
25 // CHECK-ERROR: instruction requires: sve2
26 // CHECK-UNKNOWN: 00 f0 1f 45 <unknown>
28 sri z31.h, z31.h, #16
29 // CHECK-INST: sri z31.h, z31.h, #16
30 // CHECK-ENCODING: [0xff,0xf3,0x10,0x45]
31 // CHECK-ERROR: instruction requires: sve2
32 // CHECK-UNKNOWN: ff f3 10 45 <unknown>
34 sri z0.s, z0.s, #1
35 // CHECK-INST: sri z0.s, z0.s, #1
36 // CHECK-ENCODING: [0x00,0xf0,0x5f,0x45]
37 // CHECK-ERROR: instruction requires: sve2
38 // CHECK-UNKNOWN: 00 f0 5f 45 <unknown>
40 sri z31.s, z31.s, #32
41 // CHECK-INST: sri z31.s, z31.s, #32
42 // CHECK-ENCODING: [0xff,0xf3,0x40,0x45]
43 // CHECK-ERROR: instruction requires: sve2
44 // CHECK-UNKNOWN: ff f3 40 45 <unknown>
46 sri z0.d, z0.d, #1
47 // CHECK-INST: sri z0.d, z0.d, #1
48 // CHECK-ENCODING: [0x00,0xf0,0xdf,0x45]
49 // CHECK-ERROR: instruction requires: sve2
50 // CHECK-UNKNOWN: 00 f0 df 45 <unknown>
52 sri z31.d, z31.d, #64
53 // CHECK-INST: sri z31.d, z31.d, #64
54 // CHECK-ENCODING: [0xff,0xf3,0x80,0x45]
55 // CHECK-ERROR: instruction requires: sve2
56 // CHECK-UNKNOWN: ff f3 80 45 <unknown>