[ARM] Better OR's for MVE compares
[llvm-core.git] / test / MC / AArch64 / SVE2 / tbx-diagnostics.s
blob08aa4f0d0df1b400c6724de54cd34b8725c4cb55
1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 2>&1 < %s| FileCheck %s
3 tbx z0.b, z1.b, z2.h
4 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
5 // CHECK-NEXT: tbx z0.b, z1.b, z2.h
6 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
9 // --------------------------------------------------------------------------//
10 // Negative tests for instructions that are incompatible with movprfx
12 movprfx z31.d, p0/z, z6.d
13 tbx z31.d, z31.d, z31.d
14 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
15 // CHECK-NEXT: tbx z31.d, z31.d, z31.d
16 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
18 movprfx z31, z6
19 tbx z31.d, z31.d, z31.d
20 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
21 // CHECK-NEXT: tbx z31.d, z31.d, z31.d
22 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: