[ARM] Better OR's for MVE compares
[llvm-core.git] / test / MC / AArch64 / alias-logicalimm.s
blob427a06d6514fcdbcf5ced80a9055d908d204422f
1 // RUN: llvm-mc -triple=aarch64-none-linux-gnu < %s | FileCheck %s
2 // RUN: not llvm-mc -mattr=+no-neg-immediates -triple=aarch64-none-linux-gnu < %s 2>&1 | FileCheck %s --check-prefix=CHECK-NO-NEG-IMM
4 // CHECK: and x0, x1, #0xfffffffffffffffd
5 // CHECK: and x0, x1, #0xfffffffffffffffd
6 // CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
7 and x0, x1, #~2
8 bic x0, x1, #2
10 // CHECK: and w0, w1, #0xfffffffd
11 // CHECK: and w0, w1, #0xfffffffd
12 // CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
13 and w0, w1, #~2
14 bic w0, w1, #2
16 // CHECK: ands x0, x1, #0xfffffffffffffffd
17 // CHECK: ands x0, x1, #0xfffffffffffffffd
18 // CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
19 ands x0, x1, #~2
20 bics x0, x1, #2
22 // CHECK: ands w0, w1, #0xfffffffd
23 // CHECK: ands w0, w1, #0xfffffffd
24 // CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
25 ands w0, w1, #~2
26 bics w0, w1, #2
28 // CHECK: orr x0, x1, #0xfffffffffffffffd
29 // CHECK: orr x0, x1, #0xfffffffffffffffd
30 // CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
31 orr x0, x1, #~2
32 orn x0, x1, #2
34 // CHECK: orr w2, w1, #0xfffffffc
35 // CHECK: orr w2, w1, #0xfffffffc
36 // CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
37 orr w2, w1, #~3
38 orn w2, w1, #3
40 // CHECK: eor x0, x1, #0xfffffffffffffffd
41 // CHECK: eor x0, x1, #0xfffffffffffffffd
42 // CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
43 eor x0, x1, #~2
44 eon x0, x1, #2
46 // CHECK: eor w2, w1, #0xfffffffc
47 // CHECK: eor w2, w1, #0xfffffffc
48 // CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
49 eor w2, w1, #~3
50 eon w2, w1, #3