[ARM] Better OR's for MVE compares
[llvm-core.git] / test / MC / AArch64 / armv8.1a-lor.s
blob1db2c02e2720327c4f71ea30119b90d6b011452d
1 // RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+v8.1a < %s 2>%t | FileCheck %s
2 // RUN: FileCheck --check-prefix=CHECK-ERROR %s <%t
5 //------------------------------------------------------------------------------
6 // Load acquire / store release
7 //------------------------------------------------------------------------------
8 ldlarb w0,[x1]
9 ldlarh w0,[x1]
10 ldlar w0,[x1]
11 ldlar x0,[x1]
12 // CHECK: ldlarb w0, [x1] // encoding: [0x20,0x7c,0xdf,0x08]
13 // CHECK: ldlarh w0, [x1] // encoding: [0x20,0x7c,0xdf,0x48]
14 // CHECK: ldlar w0, [x1] // encoding: [0x20,0x7c,0xdf,0x88]
15 // CHECK: ldlar x0, [x1] // encoding: [0x20,0x7c,0xdf,0xc8]
16 stllrb w0,[x1]
17 stllrh w0,[x1]
18 stllr w0,[x1]
19 stllr x0,[x1]
20 // CHECK: stllrb w0, [x1] // encoding: [0x20,0x7c,0x9f,0x08]
21 // CHECK: stllrh w0, [x1] // encoding: [0x20,0x7c,0x9f,0x48]
22 // CHECK: stllr w0, [x1] // encoding: [0x20,0x7c,0x9f,0x88]
23 // CHECK: stllr x0, [x1] // encoding: [0x20,0x7c,0x9f,0xc8]
25 msr LORSA_EL1, x0
26 msr LOREA_EL1, x0
27 msr LORN_EL1, x0
28 msr LORC_EL1, x0
29 mrs x0, LORID_EL1
30 // CHECK: msr LORSA_EL1, x0 // encoding: [0x00,0xa4,0x18,0xd5]
31 // CHECK: msr LOREA_EL1, x0 // encoding: [0x20,0xa4,0x18,0xd5]
32 // CHECK: msr LORN_EL1, x0 // encoding: [0x40,0xa4,0x18,0xd5]
33 // CHECK: msr LORC_EL1, x0 // encoding: [0x60,0xa4,0x18,0xd5]
34 // CHECK: mrs x0, LORID_EL1 // encoding: [0xe0,0xa4,0x38,0xd5]
36 ldlarb w0,[w1]
37 ldlarh x0,[x1]
38 stllrb w0,[w1]
39 stllrh x0,[x1]
40 stllr w0,[w1]
41 msr LORSA_EL1, #0
42 msr LOREA_EL1, #0
43 msr LORN_EL1, #0
44 msr LORC_EL1, #0
45 msr LORID_EL1, x0
46 mrs LORID_EL1, #0
47 // CHECK-ERROR: error: invalid operand for instruction
48 // CHECK-ERROR: ldlarb w0,[w1]
49 // CHECK-ERROR: ^
50 // CHECK-ERROR: error: invalid operand for instruction
51 // CHECK-ERROR: ldlarh x0,[x1]
52 // CHECK-ERROR: ^
53 // CHECK-ERROR: error: invalid operand for instruction
54 // CHECK-ERROR: stllrb w0,[w1]
55 // CHECK-ERROR: ^
56 // CHECK-ERROR: error: invalid operand for instruction
57 // CHECK-ERROR: stllrh x0,[x1]
58 // CHECK-ERROR: ^
59 // CHECK-ERROR: error: invalid operand for instruction
60 // CHECK-ERROR: stllr w0,[w1]
61 // CHECK-ERROR: ^
62 // CHECK-ERROR: error: invalid operand for instruction
63 // CHECK-ERROR: msr LORSA_EL1, #0
64 // CHECK-ERROR: ^
65 // CHECK-ERROR: error: invalid operand for instruction
66 // CHECK-ERROR: msr LOREA_EL1, #0
67 // CHECK-ERROR: ^
68 // CHECK-ERROR: error: invalid operand for instruction
69 // CHECK-ERROR: msr LORN_EL1, #0
70 // CHECK-ERROR: ^
71 // CHECK-ERROR: error: invalid operand for instruction
72 // CHECK-ERROR: msr LORC_EL1, #0
73 // CHECK-ERROR: ^
74 // CHECK-ERROR: error: expected writable system register or pstate
75 // CHECK-ERROR: msr LORID_EL1, x0
76 // CHECK-ERROR: ^
77 // CHECK-ERROR: error: invalid operand for instruction
78 // CHECK-ERROR: mrs LORID_EL1, #0
79 // CHECK-ERROR: ^