test/MC/AArch64/armv8.5a-ssbs.s

   1 // RUN:     llvm-mc -triple aarch64 -show-encoding -mattr=+ssbs  < %s      | FileCheck %s
   2 // RUN:     llvm-mc -triple aarch64 -show-encoding -mattr=+v8.5a < %s      | FileCheck %s
   3 // RUN:     llvm-mc -triple aarch64 -show-encoding -mcpu=cortex-a76 < %s      | FileCheck %s
   4 // RUN:     llvm-mc -triple aarch64 -show-encoding -mcpu=cortex-a76ae < %s      | FileCheck %s
   5 // RUN: not llvm-mc -triple aarch64 -show-encoding -mattr=-ssbs  < %s 2>&1 | FileCheck %s --check-prefix=NOSPECID
   6
   7 mrs x2, SSBS
   8
   9 // CHECK:         mrs x2, {{ssbs|SSBS}} // encoding: [0xc2,0x42,0x3b,0xd5]
  10 // NOSPECID:      error: expected readable system register
  11 // NOSPECID-NEXT: mrs x2, {{ssbs|SSBS}}
  12
  13 msr SSBS, x3
  14 msr SSBS, #1
  15
  16 // CHECK:         msr {{ssbs|SSBS}}, x3 // encoding: [0xc3,0x42,0x1b,0xd5]
  17 // CHECK:         msr {{ssbs|SSBS}}, #1 // encoding: [0x3f,0x41,0x03,0xd5]
  18 // NOSPECID:      error: expected writable system register or pstate
  19 // NOSPECID-NEXT: msr {{ssbs|SSBS}}, x3
  20 // NOSPECID:      error: expected writable system register or pstate
  21 // NOSPECID-NEXT: msr {{ssbs|SSBS}}, #1