1 // RUN
: llvm-mc
-triple
=arm64
-mattr
=+neon
,+fullfp16
-show-encoding
< %s | FileCheck
%s
3 // Check that the assembler can handle the documented syntax for AArch64
5 //------------------------------------------------------------------------------
6 // Instructions across vector registers
7 //------------------------------------------------------------------------------
15 // CHECK
: saddlv h0
, v1.8
b // encoding
: [0x20,0x38,0x30,0x0e]
16 // CHECK
: saddlv h0
, v1.16
b // encoding
: [0x20,0x38,0x30,0x4e]
17 // CHECK
: saddlv s0
, v1.4h
// encoding
: [0x20,0x38,0x70,0x0e]
18 // CHECK
: saddlv s0
, v1.8h
// encoding
: [0x20,0x38,0x70,0x4e]
19 // CHECK
: saddlv d0
, v1.4s
// encoding
: [0x20,0x38,0xb0,0x4e]
27 // CHECK
: uaddlv h0
, v1.8
b // encoding
: [0x20,0x38,0x30,0x2e]
28 // CHECK
: uaddlv h0
, v1.16
b // encoding
: [0x20,0x38,0x30,0x6e]
29 // CHECK
: uaddlv s0
, v1.4h
// encoding
: [0x20,0x38,0x70,0x2e]
30 // CHECK
: uaddlv s0
, v1.8h
// encoding
: [0x20,0x38,0x70,0x6e]
31 // CHECK
: uaddlv d0
, v1.4s
// encoding
: [0x20,0x38,0xb0,0x6e]
39 // CHECK
: smaxv b0
, v1.8
b // encoding
: [0x20,0xa8,0x30,0x0e]
40 // CHECK
: smaxv b0
, v1.16
b // encoding
: [0x20,0xa8,0x30,0x4e]
41 // CHECK
: smaxv h0
, v1.4h
// encoding
: [0x20,0xa8,0x70,0x0e]
42 // CHECK
: smaxv h0
, v1.8h
// encoding
: [0x20,0xa8,0x70,0x4e]
43 // CHECK
: smaxv s0
, v1.4s
// encoding
: [0x20,0xa8,0xb0,0x4e]
51 // CHECK
: sminv b0
, v1.8
b // encoding
: [0x20,0xa8,0x31,0x0e]
52 // CHECK
: sminv b0
, v1.16
b // encoding
: [0x20,0xa8,0x31,0x4e]
53 // CHECK
: sminv h0
, v1.4h
// encoding
: [0x20,0xa8,0x71,0x0e]
54 // CHECK
: sminv h0
, v1.8h
// encoding
: [0x20,0xa8,0x71,0x4e]
55 // CHECK
: sminv s0
, v1.4s
// encoding
: [0x20,0xa8,0xb1,0x4e]
63 // CHECK
: umaxv b0
, v1.8
b // encoding
: [0x20,0xa8,0x30,0x2e]
64 // CHECK
: umaxv b0
, v1.16
b // encoding
: [0x20,0xa8,0x30,0x6e]
65 // CHECK
: umaxv h0
, v1.4h
// encoding
: [0x20,0xa8,0x70,0x2e]
66 // CHECK
: umaxv h0
, v1.8h
// encoding
: [0x20,0xa8,0x70,0x6e]
67 // CHECK
: umaxv s0
, v1.4s
// encoding
: [0x20,0xa8,0xb0,0x6e]
75 // CHECK
: uminv b0
, v1.8
b // encoding
: [0x20,0xa8,0x31,0x2e]
76 // CHECK
: uminv b0
, v1.16
b // encoding
: [0x20,0xa8,0x31,0x6e]
77 // CHECK
: uminv h0
, v1.4h
// encoding
: [0x20,0xa8,0x71,0x2e]
78 // CHECK
: uminv h0
, v1.8h
// encoding
: [0x20,0xa8,0x71,0x6e]
79 // CHECK
: uminv s0
, v1.4s
// encoding
: [0x20,0xa8,0xb1,0x6e]
87 // CHECK
: addv b0
, v1.8
b // encoding
: [0x20,0xb8,0x31,0x0e]
88 // CHECK
: addv b0
, v1.16
b // encoding
: [0x20,0xb8,0x31,0x4e]
89 // CHECK
: addv h0
, v1.4h
// encoding
: [0x20,0xb8,0x71,0x0e]
90 // CHECK
: addv h0
, v1.8h
// encoding
: [0x20,0xb8,0x71,0x4e]
91 // CHECK
: addv s0
, v1.4s
// encoding
: [0x20,0xb8,0xb1,0x4e]
106 // CHECK
: fmaxnmv h0
, v1.4h
// encoding
: [0x20,0xc8,0x30,0x0e]
107 // CHECK
: fminnmv h0
, v1.4h
// encoding
: [0x20,0xc8,0xb0,0x0e]
108 // CHECK
: fmaxv h0
, v1.4h
// encoding
: [0x20,0xf8,0x30,0x0e]
109 // CHECK
: fminv h0
, v1.4h
// encoding
: [0x20,0xf8,0xb0,0x0e]
110 // CHECK
: fmaxnmv h0
, v1.8h
// encoding
: [0x20,0xc8,0x30,0x4e]
111 // CHECK
: fminnmv h0
, v1.8h
// encoding
: [0x20,0xc8,0xb0,0x4e]
112 // CHECK
: fmaxv h0
, v1.8h
// encoding
: [0x20,0xf8,0x30,0x4e]
113 // CHECK
: fminv h0
, v1.8h
// encoding
: [0x20,0xf8,0xb0,0x4e]
114 // CHECK
: fmaxnmv s0
, v1.4s
// encoding
: [0x20,0xc8,0x30,0x6e]
115 // CHECK
: fminnmv s0
, v1.4s
// encoding
: [0x20,0xc8,0xb0,0x6e]
116 // CHECK
: fmaxv s0
, v1.4s
// encoding
: [0x20,0xf8,0x30,0x6e]
117 // CHECK
: fminv s0
, v1.4s
// encoding
: [0x20,0xf8,0xb0,0x6e]