[ARM] Better OR's for MVE compares
[llvm-core.git] / test / MC / AArch64 / neon-mul-div-instructions.s
blob1fe6d2b819ce85b2966ae84ff8fada353752f90b
1 // RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+neon -show-encoding < %s | FileCheck %s
3 // Check that the assembler can handle the documented syntax for AArch64
5 //----------------------------------------------------------------------
6 // Vector Integer Mul
7 //----------------------------------------------------------------------
8 mul v0.8b, v1.8b, v2.8b
9 mul v0.16b, v1.16b, v2.16b
10 mul v0.4h, v1.4h, v2.4h
11 mul v0.8h, v1.8h, v2.8h
12 mul v0.2s, v1.2s, v2.2s
13 mul v0.4s, v1.4s, v2.4s
15 // CHECK: mul v0.8b, v1.8b, v2.8b // encoding: [0x20,0x9c,0x22,0x0e]
16 // CHECK: mul v0.16b, v1.16b, v2.16b // encoding: [0x20,0x9c,0x22,0x4e]
17 // CHECK: mul v0.4h, v1.4h, v2.4h // encoding: [0x20,0x9c,0x62,0x0e]
18 // CHECK: mul v0.8h, v1.8h, v2.8h // encoding: [0x20,0x9c,0x62,0x4e]
19 // CHECK: mul v0.2s, v1.2s, v2.2s // encoding: [0x20,0x9c,0xa2,0x0e]
20 // CHECK: mul v0.4s, v1.4s, v2.4s // encoding: [0x20,0x9c,0xa2,0x4e]
23 //----------------------------------------------------------------------
24 // Vector Floating-Point Mul
25 //----------------------------------------------------------------------
26 fmul v0.2s, v1.2s, v2.2s
27 fmul v0.4s, v1.4s, v2.4s
28 fmul v0.2d, v1.2d, v2.2d
30 // CHECK: fmul v0.2s, v1.2s, v2.2s // encoding: [0x20,0xdc,0x22,0x2e]
31 // CHECK: fmul v0.4s, v1.4s, v2.4s // encoding: [0x20,0xdc,0x22,0x6e]
32 // CHECK: fmul v0.2d, v1.2d, v2.2d // encoding: [0x20,0xdc,0x62,0x6e]
34 //----------------------------------------------------------------------
35 // Vector Floating-Point Div
36 //----------------------------------------------------------------------
37 fdiv v0.2s, v1.2s, v2.2s
38 fdiv v0.4s, v1.4s, v2.4s
39 fdiv v0.2d, v1.2d, v2.2d
41 // CHECK: fdiv v0.2s, v1.2s, v2.2s // encoding: [0x20,0xfc,0x22,0x2e]
42 // CHECK: fdiv v0.4s, v1.4s, v2.4s // encoding: [0x20,0xfc,0x22,0x6e]
43 // CHECK: fdiv v0.2d, v1.2d, v2.2d // encoding: [0x20,0xfc,0x62,0x6e]
45 //----------------------------------------------------------------------
46 // Vector Multiply (Polynomial)
47 //----------------------------------------------------------------------
48 pmul v17.8b, v31.8b, v16.8b
49 pmul v0.16b, v1.16b, v2.16b
51 // CHECK: pmul v17.8b, v31.8b, v16.8b // encoding: [0xf1,0x9f,0x30,0x2e]
52 // CHECK: pmul v0.16b, v1.16b, v2.16b // encoding: [0x20,0x9c,0x22,0x6e]
54 //----------------------------------------------------------------------
55 // Vector Saturating Doubling Multiply High
56 //----------------------------------------------------------------------
57 sqdmulh v2.4h, v25.4h, v3.4h
58 sqdmulh v12.8h, v5.8h, v13.8h
59 sqdmulh v3.2s, v1.2s, v30.2s
61 // CHECK: sqdmulh v2.4h, v25.4h, v3.4h // encoding: [0x22,0xb7,0x63,0x0e]
62 // CHECK: sqdmulh v12.8h, v5.8h, v13.8h // encoding: [0xac,0xb4,0x6d,0x4e]
63 // CHECK: sqdmulh v3.2s, v1.2s, v30.2s // encoding: [0x23,0xb4,0xbe,0x0e]
65 //----------------------------------------------------------------------
66 // Vector Saturating Rouding Doubling Multiply High
67 //----------------------------------------------------------------------
68 sqrdmulh v2.4h, v25.4h, v3.4h
69 sqrdmulh v12.8h, v5.8h, v13.8h
70 sqrdmulh v3.2s, v1.2s, v30.2s
72 // CHECK: sqrdmulh v2.4h, v25.4h, v3.4h // encoding: [0x22,0xb7,0x63,0x2e]
73 // CHECK: sqrdmulh v12.8h, v5.8h, v13.8h // encoding: [0xac,0xb4,0x6d,0x6e]
74 // CHECK: sqrdmulh v3.2s, v1.2s, v30.2s // encoding: [0x23,0xb4,0xbe,0x2e]
76 //----------------------------------------------------------------------
77 // Vector Multiply Extended
78 //----------------------------------------------------------------------
79 fmulx v21.2s, v5.2s, v13.2s
80 fmulx v1.4s, v25.4s, v3.4s
81 fmulx v31.2d, v22.2d, v2.2d
83 // CHECK: fmulx v21.2s, v5.2s, v13.2s // encoding: [0xb5,0xdc,0x2d,0x0e]
84 // CHECK: fmulx v1.4s, v25.4s, v3.4s // encoding: [0x21,0xdf,0x23,0x4e]
85 // CHECK: fmulx v31.2d, v22.2d, v2.2d // encoding: [0xdf,0xde,0x62,0x4e]