[ARM] Better OR's for MVE compares
[llvm-core.git] / test / MC / AArch64 / neon-sxtl.s
blob0fe26cb5e8e50912f029f0ce3a62abf3f8692093
1 // RUN: llvm-mc -triple=aarch64-none-linux-gnu -mattr=+neon -show-encoding < %s | FileCheck %s
3 // Check that the assembler can handle the documented syntax for AArch64
5 //------------------------------------------------------------------------------
6 // Signed integer lengthen (vector)
7 //------------------------------------------------------------------------------
8 sxtl v0.8h, v1.8b
9 sxtl v0.4s, v1.4h
10 sxtl v0.2d, v1.2s
12 // CHECK: sshll v0.8h, v1.8b, #0 // encoding: [0x20,0xa4,0x08,0x0f]
13 // CHECK: sshll v0.4s, v1.4h, #0 // encoding: [0x20,0xa4,0x10,0x0f]
14 // CHECK: sshll v0.2d, v1.2s, #0 // encoding: [0x20,0xa4,0x20,0x0f]
16 //------------------------------------------------------------------------------
17 // Signed integer lengthen (vector, second part)
18 //------------------------------------------------------------------------------
20 sxtl2 v0.8h, v1.16b
21 sxtl2 v0.4s, v1.8h
22 sxtl2 v0.2d, v1.4s
24 // CHECK: sshll2 v0.8h, v1.16b, #0 // encoding: [0x20,0xa4,0x08,0x4f]
25 // CHECK: sshll2 v0.4s, v1.8h, #0 // encoding: [0x20,0xa4,0x10,0x4f]
26 // CHECK: sshll2 v0.2d, v1.4s, #0 // encoding: [0x20,0xa4,0x20,0x4f]