[ARM] Better OR's for MVE compares
[llvm-core.git] / test / MC / ARM / coff-relocations.s
blob46645b87cd6464e86d7dfcfb85b5dc09ecfdb534
1 @ RUN: llvm-mc -triple thumbv7-windows-itanium -filetype obj -o - %s \
2 @ RUN: | llvm-readobj -r - | FileCheck %s -check-prefix CHECK-RELOCATION
4 @ RUN: llvm-mc -triple thumbv7-windows-itanium -filetype obj -o - %s \
5 @ RUN: | llvm-objdump -d - | FileCheck %s -check-prefix CHECK-ENCODING
7 .syntax unified
8 .text
9 .thumb
11 .global target
13 .thumb_func
14 branch24t_0:
15 b target
17 @ CHECK-ENCODING-LABEL: branch24t_0:
18 @ CHECK-ENCODING-NEXT: b.w #0
20 .thumb_func
21 branch24t_1:
22 bl target
24 @ CHECK-ENCODING-LABEL: branch24t_1:
25 @ CHECK-ENCODING-NEXR: bl #0
27 .thumb_func
28 branch20t:
29 bcc target
31 @ CHECK-ENCODING-LABEL: branch20t:
32 @ CHECK-ENCODING-NEXT: blo.w #0
34 .thumb_func
35 blx23t:
36 blx target
38 @ CHECK-ENCODING-LABEL: blx23t:
39 @ CHECK-ENCODING-NEXT: blx #0
41 .thumb_func
42 mov32t:
43 movw r0, :lower16:target
44 movt r0, :upper16:target
45 blx r0
47 @ CHECK-ENCODING-LABEL: mov32t:
48 @ CHECK-ENCODING-NEXT: movw r0, #0
49 @ CHECK-ENCODING-NEXT: movt r0, #0
50 @ CHECK-ENCODING-NEXT: blx r0
52 .thumb_func
53 addr32:
54 ldr r0, .Laddr32
55 bx r0
56 trap
57 .Laddr32:
58 .long target
60 @ CHECK-ENCODING-LABEL: addr32:
61 @ CHECK-ENCODING-NEXT: ldr r0, [pc, #4]
62 @ CHECK-ENCODING-NEXT: bx r0
63 @ CHECK-ENCODING-NEXT: trap
64 @ CHECK-ENCODING-NEXT: movs r0, r0
65 @ CHECK-ENCODING-NEXT: movs r0, r0
67 .thumb_func
68 addr32nb:
69 ldr r0, .Laddr32nb
70 bx r0
71 trap
72 .Laddr32nb:
73 .long target(imgrel)
75 @ CHECK-ENCODING-LABEL: addr32nb:
76 @ CHECK-ENCODING-NEXT: ldr.w r0, [pc, #4]
77 @ CHECK-ENCODING-NEXT: bx r0
78 @ CHECK-ENCODING-NEXT: trap
79 @ CHECK-ENCODING-NEXT: movs r0, r0
80 @ CHECK-ENCODING-NEXT: movs r0, r0
82 .thumb_func
83 secrel:
84 ldr r0, .Lsecrel
85 bx r0
86 trap
87 .Lsecrel:
88 .long target(secrel32)
90 @ CHECK-ENCODING-LABEL: secrel:
91 @ CHECK-ENCODING-NEXT: ldr.w r0, [pc, #4]
92 @ CHECK-ENCODING-NEXT: bx r0
93 @ CHECK-ENCODING-NEXT: trap
94 @ CHECK-ENCODING-NEXT: movs r0, r0
95 @ CHECK-ENCODING-NEXT: movs r0, r0
97 @ CHECK-RELOCATION: Relocations [
98 @ CHECK-RELOCATION: Section (1) .text {
99 @ CHECK-RELOCATION: 0x0 IMAGE_REL_ARM_BRANCH24T
100 @ CHECK-RELOCATION: 0x4 IMAGE_REL_ARM_BRANCH24T
101 @ CHECK-RELOCATION: 0x8 IMAGE_REL_ARM_BRANCH20T
102 @ CHECK-RELOCATION: 0xC IMAGE_REL_ARM_BLX23T
103 @ CHECK-RELOCATION: 0x10 IMAGE_REL_ARM_MOV32T
104 @ CHECK-RELOCATION: 0x20 IMAGE_REL_ARM_ADDR32
105 @ CHECK-RELOCATION: 0x2C IMAGE_REL_ARM_ADDR32NB
106 @ CHECK-RELOCATION: 0x38 IMAGE_REL_ARM_SECREL
107 @ CHECK-RELOCATION: }
108 @ CHECK-RELOCATION: ]