[ARM] Better OR's for MVE compares
[llvm-core.git] / test / MC / ARM / fullfp16-nopred.s
blob927ef78416579c8ecc241c77d56d69871be7e67a
1 @ RUN: not llvm-mc -triple armv8a-none-eabi -mattr=+fullfp16 < %s 2>&1 | FileCheck %s
2 @ RUN: not llvm-mc -triple armv8a-none-eabi -mattr=+fullfp16,+thumb-mode -arm-implicit-it always < %s 2>&1 | FileCheck %s
4 vaddeq.f16 s0, s1, s0
5 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable
7 vsubne.f16 s0, s1, s0
8 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable
10 vdivmi.f16 s0, s1, s0
11 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable
13 vmulpl.f16 s0, s1, s0
14 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable
16 vnmulvs.f16 s0, s1, s0
17 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable
19 vmlavc.f16 s1, s2, s0
20 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable
22 vmlshs.f16 s1, s2, s0
23 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable
25 vnmlalo.f16 s1, s2, s0
26 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable
28 vnmlscs.f16 s1, s2, s0
29 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable
31 vcmpcc.f16 s0, s1
32 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable
34 vcmphi.f16 s2, #0
35 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable
37 vcmpels.f16 s1, s0
38 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable
40 vcmpege.f16 s0, #0
41 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable
43 vabslt.f16 s0, s0
44 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable
46 vneggt.f16 s0, s0
47 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable
49 vsqrtle.f16 s0, s0
50 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable
52 vcvteq.f16.s32 s0, s0
53 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable
55 vcvtne.u32.f16 s0, s0
56 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable
58 vcvtrmi.s32.f16 s0, s1
59 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable
61 vrintzhs.f16 s3, s24
62 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable
64 vrintrlo.f16 s0, s9
65 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable
67 vrintxcs.f16 s10, s14
68 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable
70 vfmalt.f16 s2, s7, s4
71 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable
73 vfmsgt.f16 s2, s7, s4
74 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable
76 vfnmale.f16 s2, s7, s4
77 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable
79 vfnmseq.f16 s2, s7, s4
80 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable
82 vldrpl.16 s1, [pc, #6]
83 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable
85 vldrvs.16 s2, [pc, #510]
86 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable
88 vldrvc.16 s3, [pc, #-510]
89 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable
91 vldrhs.16 s4, [r4, #-18]
92 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable
94 vstrlo.16 s1, [pc, #6]
95 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable
97 vstrcs.16 s2, [pc, #510]
98 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable
100 vstrcc.16 s3, [pc, #-510]
101 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable
103 vstrhi.16 s4, [r4, #-18]
104 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable
106 vmovls.f16 s0, #1.0
107 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable
109 vmovge.f16 s1, r2
110 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable
112 vmovlt.f16 r3, s4
113 @ CHECK: [[@LINE-1]]:3: error: instruction is not predicable