[ARM] Better OR's for MVE compares
[llvm-core.git] / test / MC / ARM / mve-float.s
blob6ee6790a4167b3e46cbdb4dacb9779e392ac9b88
1 # RUN: not llvm-mc -triple=thumbv8.1m.main-none-eabi -mattr=+mve -show-encoding < %s \
2 # RUN: | FileCheck --check-prefix=CHECK-NOFP %s
3 # RUN: not llvm-mc -triple=thumbv8.1m.main-none-eabi -mattr=+mve.fp,+fp64 -show-encoding < %s 2>%t \
4 # RUN: | FileCheck --check-prefix=CHECK %s
5 # RUN: FileCheck --check-prefix=ERROR < %t %s
7 # CHECK: vrintn.f16 q1, q0 @ encoding: [0xb6,0xff,0x40,0x24]
8 # CHECK-NOFP-NOT: vrintn.f16 q1, q0 @ encoding: [0xb6,0xff,0x40,0x24]
9 vrintn.f16 q1, q0
11 # CHECK: vrintn.f32 q0, q4 @ encoding: [0xba,0xff,0x48,0x04]
12 # CHECK-NOFP-NOT: vrintn.f32 q0, q4 @ encoding: [0xba,0xff,0x48,0x04]
13 vrintn.f32 q0, q4
15 # CHECK: vrinta.f16 q0, q1 @ encoding: [0xb6,0xff,0x42,0x05]
16 # CHECK-NOFP-NOT: vrinta.f16 q0, q1 @ encoding: [0xb6,0xff,0x42,0x05]
17 vrinta.f16 q0, q1
19 # CHECK: vrinta.f32 q1, q3 @ encoding: [0xba,0xff,0x46,0x25]
20 # CHECK-NOFP-NOT: vrinta.f32 q1, q3 @ encoding: [0xba,0xff,0x46,0x25]
21 vrinta.f32 q1, q3
23 # CHECK: vrintm.f16 q0, q5 @ encoding: [0xb6,0xff,0xca,0x06]
24 # CHECK-NOFP-NOT: vrintm.f16 q0, q5 @ encoding: [0xb6,0xff,0xca,0x06]
25 vrintm.f16 q0, q5
27 # CHECK: vrintm.f32 q0, q4 @ encoding: [0xba,0xff,0xc8,0x06]
28 # CHECK-NOFP-NOT: vrintm.f32 q0, q4 @ encoding: [0xba,0xff,0xc8,0x06]
29 vrintm.f32 q0, q4
31 # CHECK: vrintp.f16 q1, q0 @ encoding: [0xb6,0xff,0xc0,0x27]
32 # CHECK-NOFP-NOT: vrintp.f16 q1, q0 @ encoding: [0xb6,0xff,0xc0,0x27]
33 vrintp.f16 q1, q0
35 # CHECK: vrintp.f32 q0, q1 @ encoding: [0xba,0xff,0xc2,0x07]
36 # CHECK-NOFP-NOT: vrintp.f32 q0, q1 @ encoding: [0xba,0xff,0xc2,0x07]
37 vrintp.f32 q0, q1
39 # CHECK: vrintx.f16 q1, q2 @ encoding: [0xb6,0xff,0xc4,0x24]
40 # CHECK-NOFP-NOT: vrintx.f16 q1, q2 @ encoding: [0xb6,0xff,0xc4,0x24]
41 vrintx.f16 q1, q2
43 # CHECK: vrintx.f32 q1, q1 @ encoding: [0xba,0xff,0xc2,0x24]
44 # CHECK-NOFP-NOT: vrintx.f32 q1, q1 @ encoding: [0xba,0xff,0xc2,0x24]
45 vrintx.f32 q1, q1
47 # CHECK: vrintz.f16 q1, q6 @ encoding: [0xb6,0xff,0xcc,0x25]
48 # CHECK-NOFP-NOT: vrintz.f16 q1, q6 @ encoding: [0xb6,0xff,0xcc,0x25]
49 vrintz.f16 q1, q6
51 # CHECK: vrintz.f32 q1, q0 @ encoding: [0xba,0xff,0xc0,0x25]
52 # CHECK-NOFP-NOT: vrintz.f32 q1, q0 @ encoding: [0xba,0xff,0xc0,0x25]
53 vrintz.f32 q1, q0
55 # CHECK: vrintr.f32 s0, s1 @ encoding: [0xb6,0xee,0x60,0x0a]
56 # CHECK-NOFP-NOT: vrintr.f32 s0, s1 @ encoding: [0xb6,0xee,0x60,0x0a]
57 vrintr.f32.f32 s0, s1
59 # CHECK: vrintr.f64 d0, d1 @ encoding: [0xb6,0xee,0x41,0x0b]
60 # CHECK-NOFP-NOT: vrintr.f64 d0, d1 @ encoding: [0xb6,0xee,0x41,0x0b]
61 vrintr.f64.f64 d0, d1
63 # ERROR: [[@LINE+1]]:{{[0-9]+}}: {{error|note}}: invalid instruction
64 vrintr.f32.f32 q0, q1
66 # ERROR: [[@LINE+1]]:{{[0-9]+}}: {{error|note}}: invalid instruction
67 vrintr.f64 q0, q1
69 # CHECK: vmul.f16 q2, q1, q3 @ encoding: [0x12,0xff,0x56,0x4d]
70 # CHECK-NOFP-NOT: vmul.f16 q2, q1, q3 @ encoding: [0x12,0xff,0x56,0x4d]
71 vmul.f16 q2, q1, q3
73 # CHECK: vmul.f32 q0, q0, q5 @ encoding: [0x00,0xff,0x5a,0x0d]
74 # CHECK-NOFP-NOT: vmul.f32 q0, q0, q5 @ encoding: [0x00,0xff,0x5a,0x0d]
75 vmul.f32 q0, q0, q5
77 # CHECK: vcmla.f16 q3, q2, q1, #0 @ encoding: [0x24,0xfc,0x42,0x68]
78 # CHECK-NOFP-NOT: vcmla.f16 q3, q2, q1, #0 @ encoding: [0x24,0xfc,0x42,0x68]
79 vcmla.f16 q3, q2, q1, #0
81 # CHECK: vcmla.f16 q0, q0, q5, #90 @ encoding: [0xa0,0xfc,0x4a,0x08]
82 # CHECK-NOFP-NOT: vcmla.f16 q0, q0, q5, #90 @ encoding: [0xa0,0xfc,0x4a,0x08]
83 vcmla.f16 q0, q0, q5, #90
85 # CHECK: vcmla.f16 q3, q7, q2, #180 @ encoding: [0x2e,0xfd,0x44,0x68]
86 # CHECK-NOFP-NOT: vcmla.f16 q3, q7, q2, #180 @ encoding: [0x2e,0xfd,0x44,0x68]
87 vcmla.f16 q3, q7, q2, #180
89 # CHECK: vcmla.f16 q2, q7, q6, #270 @ encoding: [0xae,0xfd,0x4c,0x48]
90 # CHECK-NOFP-NOT: vcmla.f16 q2, q7, q6, #270 @ encoding: [0xae,0xfd,0x4c,0x48]
91 vcmla.f16 q2, q7, q6, #270
93 # ERROR: [[@LINE+1]]:{{[0-9]+}}: {{error|note}}: complex rotation must be 0, 90, 180 or 270
94 vcmla.f16 q3, q2, q1, #200
96 # CHECK: vcmla.f32 q2, q6, q6, #0 @ encoding: [0x3c,0xfc,0x4c,0x48]
97 # CHECK-NOFP-NOT: vcmla.f32 q2, q6, q6, #0 @ encoding: [0x3c,0xfc,0x4c,0x48]
98 vcmla.f32 q2, q6, q6, #0
100 # CHECK: vcmla.f32 q7, q1, q3, #90 @ encoding: [0xb2,0xfc,0x46,0xe8]
101 # CHECK-NOFP-NOT: vcmla.f32 q7, q1, q3, #90 @ encoding: [0xb2,0xfc,0x46,0xe8]
102 vcmla.f32 q7, q1, q3, #90
104 # CHECK: vcmla.f32 q4, q5, q3, #180 @ encoding: [0x3a,0xfd,0x46,0x88]
105 # CHECK-NOFP-NOT: vcmla.f32 q4, q5, q3, #180 @ encoding: [0x3a,0xfd,0x46,0x88]
106 vcmla.f32 q4, q5, q3, #180
108 # CHECK: vcmla.f32 q3, q2, q7, #270 @ encoding: [0xb4,0xfd,0x4e,0x68]
109 # CHECK-NOFP-NOT: vcmla.f32 q3, q2, q7, #270 @ encoding: [0xb4,0xfd,0x4e,0x68]
110 vcmla.f32 q3, q2, q7, #270
112 # ERROR: [[@LINE+1]]:{{[0-9]+}}: {{error|note}}: complex rotation must be 0, 90, 180 or 270
113 vcmla.f32 q3, q2, q1, #16
115 # CHECK: vfma.f16 q0, q2, q3 @ encoding: [0x14,0xef,0x56,0x0c]
116 # CHECK-NOFP-NOT: vfma.f16 q0, q2, q3 @ encoding: [0x14,0xef,0x56,0x0c]
117 vfma.f16 q0, q2, q3
119 # CHECK: vfma.f32 q0, q3, q7 @ encoding: [0x06,0xef,0x5e,0x0c]
120 # CHECK-NOFP-NOT: vfma.f32 q0, q3, q7 @ encoding: [0x06,0xef,0x5e,0x0c]
121 vfma.f32 q0, q3, q7
123 # CHECK: vfms.f16 q0, q2, q5 @ encoding: [0x34,0xef,0x5a,0x0c]
124 # CHECK-NOFP-NOT: vfms.f16 q0, q2, q5 @ encoding: [0x34,0xef,0x5a,0x0c]
125 vfms.f16 q0, q2, q5
127 # CHECK: vfms.f32 q1, q1, q2 @ encoding: [0x22,0xef,0x54,0x2c]
128 # CHECK-NOFP-NOT: vfms.f32 q1, q1, q2 @ encoding: [0x22,0xef,0x54,0x2c]
129 vfms.f32 q1, q1, q2
131 # CHECK: vadd.f16 q0, q0, q5 @ encoding: [0x10,0xef,0x4a,0x0d]
132 # CHECK-NOFP-NOT: vadd.f16 q0, q0, q5 @ encoding: [0x10,0xef,0x4a,0x0d]
133 vadd.f16 q0, q0, q5
135 # CHECK: vadd.f32 q1, q3, q0 @ encoding: [0x06,0xef,0x40,0x2d]
136 # CHECK-NOFP-NOT: vadd.f32 q1, q3, q0 @ encoding: [0x06,0xef,0x40,0x2d]
137 vadd.f32 q1, q3, q0
139 # ERROR: [[@LINE+1]]:{{[0-9]+}}: {{error|note}}: invalid instruction
140 vaddeq.f32 q0, q1, q2
142 # CHECK: vadd.f32 q0, q1, q2 @ encoding: [0x02,0xef,0x44,0x0d]
143 # CHECK-NOFP-NOT: vadd.f32 q0, q1, q2 @ encoding: [0x02,0xef,0x44,0x0d]
144 vadd.f32 q0, q1, q2
146 # CHECK: vcadd.f16 q2, q1, q7, #90 @ encoding: [0x82,0xfc,0x4e,0x48]
147 # CHECK-NOFP-NOT: vcadd.f16 q2, q1, q7, #90 @ encoding: [0x82,0xfc,0x4e,0x48]
148 vcadd.f16 q2, q1, q7, #90
150 # CHECK: vcadd.f16 q2, q5, q7, #270 @ encoding: [0x8a,0xfd,0x4e,0x48]
151 # CHECK-NOFP-NOT: vcadd.f16 q2, q5, q7, #270 @ encoding: [0x8a,0xfd,0x4e,0x48]
152 vcadd.f16 q2, q5, q7, #270
154 # ERROR: [[@LINE+1]]:{{[0-9]+}}: {{error|note}}: complex rotation must be 90 or 270
155 vcadd.f16 q2, q5, q7, #180
157 # CHECK: vcadd.f32 q0, q4, q7, #90 @ encoding: [0x98,0xfc,0x4e,0x08]
158 # CHECK-NOFP-NOT: vcadd.f32 q0, q4, q7, #90 @ encoding: [0x98,0xfc,0x4e,0x08]
159 vcadd.f32 q0, q4, q7, #90
161 # CHECK: vcadd.f32 q2, q2, q3, #270 @ encoding: [0x94,0xfd,0x46,0x48]
162 # CHECK-NOFP-NOT: vcadd.f32 q2, q2, q3, #270 @ encoding: [0x94,0xfd,0x46,0x48]
163 vcadd.f32 q2, q2, q3, #270
165 # ERROR: [[@LINE+1]]:{{[0-9]+}}: {{error|note}}: complex rotation must be 90 or 270
166 vcadd.f32 q2, q5, q7, #0
168 # CHECK: vabd.f16 q0, q0, q6 @ encoding: [0x30,0xff,0x4c,0x0d]
169 # CHECK-NOFP-NOT: vabd.f16 q0, q0, q6 @ encoding: [0x30,0xff,0x4c,0x0d]
170 vabd.f16 q0, q0, q6
172 # CHECK: vabd.f32 q0, q1, q4 @ encoding: [0x22,0xff,0x48,0x0d]
173 # CHECK-NOFP-NOT: vabd.f32 q0, q1, q4 @ encoding: [0x22,0xff,0x48,0x0d]
174 vabd.f32 q0, q1, q4
176 # CHECK: vcvt.f16.s16 q1, q7, #1 @ encoding: [0xbf,0xef,0x5e,0x2c]
177 # CHECK-NOFP-NOT: vcvt.f16.s16 q1, q7, #1 @ encoding: [0xbf,0xef,0x5e,0x2c]
178 vcvt.f16.s16 q1, q7, #1
180 # CHECK: vcvt.f16.s16 q1, q7, #16 @ encoding: [0xb0,0xef,0x5e,0x2c]
181 # CHECK-NOFP-NOT: vcvt.f16.s16 q1, q7, #16 @ encoding: [0xb0,0xef,0x5e,0x2c]
182 vcvt.f16.s16 q1, q7, #16
184 # CHECK: vcvt.f16.s16 q1, q7, #11 @ encoding: [0xb5,0xef,0x5e,0x2c]
185 # CHECK-NOFP-NOT: vcvt.f16.s16 q1, q7, #11 @ encoding: [0xb5,0xef,0x5e,0x2c]
186 vcvt.f16.s16 q1, q7, #11
188 # CHECK: vcvt.s16.f16 q1, q1, #3 @ encoding: [0xbd,0xef,0x52,0x2d]
189 # CHECK-NOFP-NOT: vcvt.s16.f16 q1, q1, #3 @ encoding: [0xbd,0xef,0x52,0x2d]
190 vcvt.s16.f16 q1, q1, #3
192 # CHECK: vcvt.f16.u16 q2, q1, #10 @ encoding: [0xb6,0xff,0x52,0x4c]
193 # CHECK-NOFP-NOT: vcvt.f16.u16 q2, q1, #10 @ encoding: [0xb6,0xff,0x52,0x4c]
194 vcvt.f16.u16 q2, q1, #10
196 # CHECK: vcvt.u16.f16 q0, q0, #3 @ encoding: [0xbd,0xff,0x50,0x0d]
197 # CHECK-NOFP-NOT: vcvt.u16.f16 q0, q0, #3 @ encoding: [0xbd,0xff,0x50,0x0d]
198 vcvt.u16.f16 q0, q0, #3
200 # CHECK: vcvt.f32.s32 q1, q7, #1 @ encoding: [0xbf,0xef,0x5e,0x2e]
201 # CHECK-NOFP-NOT: vcvt.f32.s32 q1, q7, #1 @ encoding: [0xbf,0xef,0x5e,0x2e]
202 vcvt.f32.s32 q1, q7, #1
204 # CHECK: vcvt.f32.s32 q1, q7, #32 @ encoding: [0xa0,0xef,0x5e,0x2e]
205 # CHECK-NOFP-NOT: vcvt.f32.s32 q1, q7, #32 @ encoding: [0xa0,0xef,0x5e,0x2e]
206 vcvt.f32.s32 q1, q7, #32
208 # CHECK: vcvt.f32.s32 q1, q7, #6 @ encoding: [0xba,0xef,0x5e,0x2e]
209 # CHECK-NOFP-NOT: vcvt.f32.s32 q1, q7, #6 @ encoding: [0xba,0xef,0x5e,0x2e]
210 vcvt.f32.s32 q1, q7, #6
212 # CHECK: vcvt.s32.f32 q1, q0, #21 @ encoding: [0xab,0xef,0x50,0x2f]
213 # CHECK-NOFP-NOT: vcvt.s32.f32 q1, q0, #21 @ encoding: [0xab,0xef,0x50,0x2f]
214 vcvt.s32.f32 q1, q0, #21
216 # CHECK: vcvt.f32.u32 q1, q4, #4 @ encoding: [0xbc,0xff,0x58,0x2e]
217 # CHECK-NOFP-NOT: vcvt.f32.u32 q1, q4, #4 @ encoding: [0xbc,0xff,0x58,0x2e]
218 vcvt.f32.u32 q1, q4, #4
220 # CHECK: vcvt.u32.f32 q1, q5, #8 @ encoding: [0xb8,0xff,0x5a,0x2f]
221 # CHECK-NOFP-NOT: vcvt.u32.f32 q1, q5, #8 @ encoding: [0xb8,0xff,0x5a,0x2f]
222 vcvt.u32.f32 q1, q5, #8
224 # ERROR: [[@LINE+1]]:{{[0-9]+}}: {{error|note}}: MVE fixed-point immediate operand must be between 1 and 16
225 vcvt.f16.s16 q0, q1, #-1
227 # ERROR: [[@LINE+1]]:{{[0-9]+}}: {{error|note}}: MVE fixed-point immediate operand must be between 1 and 16
228 vcvt.f16.s16 q0, q1, #0
230 # ERROR: [[@LINE+1]]:{{[0-9]+}}: {{error|note}}: MVE fixed-point immediate operand must be between 1 and 16
231 vcvt.f16.s16 q0, q1, #17
233 # ERROR: [[@LINE+1]]:{{[0-9]+}}: {{error|note}}: MVE fixed-point immediate operand must be between 1 and 32
234 vcvt.f32.s32 q0, q1, #-1
236 # ERROR: [[@LINE+1]]:{{[0-9]+}}: {{error|note}}: MVE fixed-point immediate operand must be between 1 and 32
237 vcvt.f32.s32 q0, q1, #0
239 # ERROR: [[@LINE+1]]:{{[0-9]+}}: {{error|note}}: MVE fixed-point immediate operand must be between 1 and 32
240 vcvt.f32.s32 q0, q1, #33
242 # CHECK: vcvt.f16.s16 q0, q1 @ encoding: [0xb7,0xff,0x42,0x06]
243 # CHECK-NOFP-NOT: vcvt.f16.s16 q0, q1 @ encoding: [0xb7,0xff,0x42,0x06]
244 vcvt.f16.s16 q0, q1
246 # CHECK: vcvt.f16.u16 q0, q4 @ encoding: [0xb7,0xff,0xc8,0x06]
247 # CHECK-NOFP-NOT: vcvt.f16.u16 q0, q4 @ encoding: [0xb7,0xff,0xc8,0x06]
248 vcvt.f16.u16 q0, q4
250 # CHECK: vcvt.s16.f16 q0, q0 @ encoding: [0xb7,0xff,0x40,0x07]
251 # CHECK-NOFP-NOT: vcvt.s16.f16 q0, q0 @ encoding: [0xb7,0xff,0x40,0x07]
252 vcvt.s16.f16 q0, q0
254 # CHECK: vcvt.u16.f16 q0, q0 @ encoding: [0xb7,0xff,0xc0,0x07]
255 # CHECK-NOFP-NOT: vcvt.u16.f16 q0, q0 @ encoding: [0xb7,0xff,0xc0,0x07]
256 vcvt.u16.f16 q0, q0
258 # CHECK: vcvt.f32.s32 q0, q0 @ encoding: [0xbb,0xff,0x40,0x06]
259 # CHECK-NOFP-NOT: vcvt.f32.s32 q0, q0 @ encoding: [0xbb,0xff,0x40,0x06]
260 vcvt.f32.s32 q0, q0
262 # CHECK: vcvt.f32.u32 q0, q0 @ encoding: [0xbb,0xff,0xc0,0x06]
263 # CHECK-NOFP-NOT: vcvt.f32.u32 q0, q0 @ encoding: [0xbb,0xff,0xc0,0x06]
264 vcvt.f32.u32 q0, q0
266 # CHECK: vcvt.s32.f32 q0, q0 @ encoding: [0xbb,0xff,0x40,0x07]
267 # CHECK-NOFP-NOT: vcvt.s32.f32 q0, q0 @ encoding: [0xbb,0xff,0x40,0x07]
268 vcvt.s32.f32 q0, q0
270 # CHECK: vcvt.u32.f32 q0, q2 @ encoding: [0xbb,0xff,0xc4,0x07]
271 # CHECK-NOFP-NOT: vcvt.u32.f32 q0, q2 @ encoding: [0xbb,0xff,0xc4,0x07]
272 vcvt.u32.f32 q0, q2
274 # CHECK: vcvta.s16.f16 q0, q7 @ encoding: [0xb7,0xff,0x4e,0x00]
275 # CHECK-NOFP-NOT: vcvta.s16.f16 q0, q7 @ encoding: [0xb7,0xff,0x4e,0x00]
276 vcvta.s16.f16 q0, q7
278 # CHECK: vcvta.s32.f32 s2, s3 @ encoding: [0xbc,0xfe,0xe1,0x1a]
279 # CHECK-NOFP-NOT: vcvta.s32.f32 s2, s3 @ encoding: [0xbc,0xfe,0xe1,0x1a]
280 vcvta.s32.f32 s2, s3
282 # CHECK: vcvta.s16.f16 q0, q7 @ encoding: [0xb7,0xff,0x4e,0x00]
283 # CHECK-NOFP-NOT: vcvta.s16.f16 q0, q7 @ encoding: [0xb7,0xff,0x4e,0x00]
284 vcvta.s16.f16 q0, q7
286 # CHECK: vcvtn.u32.f32 q7, q6 @ encoding: [0xbb,0xff,0xcc,0xe1]
287 # CHECK-NOFP-NOT: vcvtn.u32.f32 q7, q6 @ encoding: [0xbb,0xff,0xcc,0xe1]
288 vcvtn.u32.f32 q7, q6
290 # CHECK: vcvtp.s32.f32 q0, q7 @ encoding: [0xbb,0xff,0x4e,0x02]
291 # CHECK-NOFP-NOT: vcvtp.s32.f32 q0, q7 @ encoding: [0xbb,0xff,0x4e,0x02]
292 vcvtp.s32.f32 q0, q7
294 # CHECK: vcvtm.u32.f32 q1, q4 @ encoding: [0xbb,0xff,0xc8,0x23]
295 # CHECK-NOFP-NOT: vcvtm.u32.f32 q1, q4 @ encoding: [0xbb,0xff,0xc8,0x23]
296 vcvtm.u32.f32 q1, q4
298 # CHECK: vneg.f16 q0, q7 @ encoding: [0xb5,0xff,0xce,0x07]
299 # CHECK-NOFP-NOT: vneg.f16 q0, q7 @ encoding: [0xb5,0xff,0xce,0x07]
300 vneg.f16 q0, q7
302 # CHECK: vneg.f32 q0, q2 @ encoding: [0xb9,0xff,0xc4,0x07]
303 # CHECK-NOFP-NOT: vneg.f32 q0, q2 @ encoding: [0xb9,0xff,0xc4,0x07]
304 vneg.f32 q0, q2
306 # CHECK: vabs.f16 q0, q2 @ encoding: [0xb5,0xff,0x44,0x07]
307 # CHECK-NOFP-NOT: vabs.f16 q0, q2 @ encoding: [0xb5,0xff,0x44,0x07]
308 vabs.f16 q0, q2
310 # CHECK: vabs.f32 q0, q0 @ encoding: [0xb9,0xff,0x40,0x07]
311 # CHECK-NOFP-NOT: vabs.f32 q0, q0 @ encoding: [0xb9,0xff,0x40,0x07]
312 vabs.f32 q0, q0
314 # CHECK: vmaxnma.f16 q1, q1 @ encoding: [0x3f,0xfe,0x83,0x2e]
315 # CHECK-NOFP-NOT: vmaxnma.f16 q1, q1 @ encoding: [0x3f,0xfe,0x83,0x2e]
316 vmaxnma.f16 q1, q1
318 # CHECK: vmaxnma.f32 q2, q6 @ encoding: [0x3f,0xee,0x8d,0x4e]
319 # CHECK-NOFP-NOT: vmaxnma.f32 q2, q6 @ encoding: [0x3f,0xee,0x8d,0x4e]
320 vmaxnma.f32 q2, q6
322 # CHECK: vminnma.f16 q0, q2 @ encoding: [0x3f,0xfe,0x85,0x1e]
323 # CHECK-NOFP-NOT: vminnma.f16 q0, q2 @ encoding: [0x3f,0xfe,0x85,0x1e]
324 vminnma.f16 q0, q2
326 # CHECK: vminnma.f32 q0, q1 @ encoding: [0x3f,0xee,0x83,0x1e]
327 # CHECK-NOFP-NOT: vminnma.f32 q0, q1 @ encoding: [0x3f,0xee,0x83,0x1e]
328 vminnma.f32 q0, q1
330 it eq
331 vaddeq.f32 s0, s1
332 # CHECK: it eq @ encoding: [0x08,0xbf]
333 # CHECK: vaddeq.f32 s0, s0, s1 @ encoding: [0x30,0xee,0x20,0x0a]
334 # CHECK-NOFP-NOT: vaddeq.f32 s0, s0, s1 @ encoding: [0x30,0xee,0x20,0x0a]
336 vpst
337 vaddt.f16 q0, q1, q2
338 # CHECK: vpst @ encoding: [0x71,0xfe,0x4d,0x0f]
339 # CHECK: vaddt.f16 q0, q1, q2 @ encoding: [0x12,0xef,0x44,0x0d]
340 # CHECK-NOFP-NOT: vaddt.f16 q0, q1, q2 @ encoding: [0x12,0xef,0x44,0x0d]
342 vpste
343 vcvtmt.u32.f32 q0, q1
344 vcvtne.s32.f32 q0, q1
345 # CHECK: vpste @ encoding: [0x71,0xfe,0x4d,0x8f]
346 # CHECK: vtmt.u32.f32 q0, q1 @ encoding: [0xbb,0xff,0xc2,0x03]
347 # CHECK-NOFP-NOT: vtmt.u32.f32 q0, q1 @ encoding: [0xbb,0xff,0xc2,0x03]
348 # CHECK: vcvtne.s32.f32 q0, q1 @ encoding: [0xbb,0xff,0x42,0x01]
349 # CHECK-NOFP-NOT: vcvtne.s32.f32 q0, q1 @ encoding: [0xbb,0xff,0x42,0x01]
351 it ne
352 vcvtne.s32.f32 s0, s1
353 # CHECK: it ne @ encoding: [0x18,0xbf]
354 # CHECK: vcvtne.s32.f32 s0, s1 @ encoding: [0xbd,0xee,0xe0,0x0a]
355 # CHECK-NOFP-NOT: vcvtne.s32.f32 s0, s1 @ encoding: [0xbd,0xee,0xe0,0x0a]
357 it ge
358 vcvttge.f64.f16 d3, s1
359 # CHECK: it ge @ encoding: [0xa8,0xbf]
360 # CHECK: vcvttge.f64.f16 d3, s1 @ encoding: [0xb2,0xee,0xe0,0x3b]
361 # CHECK-NOFP-NOT: vcvttge.f64.f16 d3, s1 @ encoding: [0xb2,0xee,0xe0,0x3b]
363 # ----------------------------------------------------------------------
364 # The following tests have to go last because of the NOFP-NOT checks inside the
365 # VPT block.
367 vpte.f32 lt, q3, r1
368 vcvtt.u32.f32 q2, q0
369 vcvte.u32.f32 q1, q0
370 # CHECK: vpte.f32 lt, q3, r1 @ encoding: [0x77,0xee,0xc1,0x9f]
371 # CHECK-NOFP-NOT: vpte.f32 lt, q3, r1 @ encoding: [0x77,0xee,0xe1,0x8f]
372 # CHECK: vcvtt.u32.f32 q2, q0 @ encoding: [0xbb,0xff,0xc0,0x47]
373 # CHECK-NOFP-NOT: vcvtt.u32.f32 q2, q0 @ encoding: [0xbb,0xff,0xc0,0x47]
374 # CHECK: vcvte.u32.f32 q1, q0 @ encoding: [0xbb,0xff,0xc0,0x27]
375 # CHECK-NOFP-NOT: vcvte.u32.f32 q1, q0 @ encoding: [0xbb,0xff,0xc0,0x27]
377 ite eq
378 vcvteq.u32.f32 s0, s1
379 vcvtne.f32.u32 s0, s1
380 # CHECK: ite eq @ encoding: [0x0c,0xbf]
381 # CHECK: vcvteq.u32.f32 s0, s1 @ encoding: [0xbc,0xee,0xe0,0x0a]
382 # CHECK-NOFP-NOT: vcvteq.u32.f32 s0, s1 @ encoding: [0xbc,0xee,0xe0,0x0a]
383 # CHECK: vcvtne.f32.u32 s0, s1 @ encoding: [0xb8,0xee,0x60,0x0a]
384 # CHECK-NOFP-NOT: vcvtne.f32.u32 s0, s1 @ encoding: [0xb8,0xee,0x60,0x0a]
386 vpste
387 vmult.f16 q0, q1, q2
388 vmule.f16 q0, q1, q2
389 # CHECK: vpste @ encoding: [0x71,0xfe,0x4d,0x8f]
390 # CHECK: vmult.f16 q0, q1, q2 @ encoding: [0x12,0xff,0x54,0x0d]
391 # CHECK-NOFP-NOT: vmult.f16 q0, q1, q2 @ encoding: [0x12,0xff,0x54,0x0d]
392 # CHECK: vmule.f16 q0, q1, q2 @ encoding: [0x12,0xff,0x54,0x0d]
393 # CHECK-NOFP-NOT: vmule.f16 q0, q1, q2 @ encoding: [0x12,0xff,0x54,0x0d]
395 ite eq
396 vmuleq.f64 d0, d0, d1
397 vmulne.f64 d1, d0, d2
398 # CHECK: ite eq @ encoding: [0x0c,0xbf]
399 # CHECK: vmuleq.f64 d0, d0, d1 @ encoding: [0x20,0xee,0x01,0x0b]
400 # CHECK-NOFP-NOT: vmuleq.f64 d0, d0, d1 @ encoding: [0x20,0xee,0x01,0x0b]
401 # CHECK: vmulne.f64 d1, d0, d2 @ encoding: [0x20,0xee,0x02,0x1b]
402 # CHECK-NOFP-NOT: vmulne.f64 d1, d0, d2 @ encoding: [0x20,0xee,0x02,0x1b]
404 it eq
405 vnegeq.f32 s0, s1
406 # CHECK: it eq @ encoding: [0x08,0xbf]
407 # CHECK: vnegeq.f32 s0, s1 @ encoding: [0xb1,0xee,0x60,0x0a]
408 # CHECK-NOFP-NOT: vnegeq.f32 s0, s1 @ encoding: [0xb1,0xee,0x60,0x0a]
410 itt eq
411 vnmuleq.f32 s0, s1, s2
412 vmuleq.f32 s0, s1, s2
413 # CHECK: itt eq @ encoding: [0x04,0xbf]
414 # CHECK: vnmuleq.f32 s0, s1, s2 @ encoding: [0x20,0xee,0xc1,0x0a]
415 # CHECK-NOFP-NOT: vnmuleq.f32 s0, s1, s2 @ encoding: [0x20,0xee,0xc1,0x0a]
416 # CHECK: vmuleq.f32 s0, s1, s2 @ encoding: [0x20,0xee,0x81,0x0a]
417 # CHECK-NOFP-NOT: vmuleq.f32 s0, s1, s2 @ encoding: [0x20,0xee,0x81,0x0a]
419 vpste
420 vrintnt.f16 q0, q1
421 vrintne.f32 q0, q1
422 # CHECK: vpste @ encoding: [0x71,0xfe,0x4d,0x8f]
423 # CHECK: vrintnt.f16 q0, q1 @ encoding: [0xb6,0xff,0x42,0x04]
424 # CHECK-NOFP-NOT: vrintnt.f16 q0, q1 @ encoding: [0xb6,0xff,0x42,0x04]
425 # CHECK: vrintne.f32 q0, q1 @ encoding: [0xba,0xff,0x42,0x04]
426 # CHECK-NOFP-NOT: vrintne.f32 q0, q1 @ encoding: [0xba,0xff,0x42,0x04]