[ARM] Better OR's for MVE compares
[llvm-core.git] / test / MC / ARM / mve-vmov-lane.s
blobe45d4c3874f3fc5c3856e54e104f9b70bb6fd4f6
1 // RUN: not llvm-mc -triple=thumbv8m.main -mattr=+fp-armv8 -show-encoding < %s 2>%t | FileCheck %s --check-prefix=V80M
2 // RUN: FileCheck %s < %t --check-prefix=V80M-ERROR
3 // RUN: llvm-mc -triple=thumbv8.1m.main -mattr=+fp-armv8 -show-encoding < %s 2>%t
4 // RUN: llvm-mc -triple=thumbv8.1m.main -mattr=+mve -show-encoding < %s 2>%t
6 // v8.1M added the Q register syntax for this instruction. The v8.1M spec does
7 // not list the D register syntax as valid, but we accept it as an extension to
8 // make porting code from v8.0M to v8.1M easier.
10 vmov.32 r0, d1[0]
11 // V80M: vmov.32 r0, d1[0] @ encoding: [0x11,0xee,0x10,0x0b]
12 // V81M: vmov.32 r0, d1[0] @ encoding: [0x11,0xee,0x10,0x0b]
14 vmov.32 r0, q0[2]
15 // V80M-ERROR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction requires: armv8.1m.main with FP or MVE
16 // V81M: vmov.32 r0, q0[2] @ encoding: [0x11,0xee,0x10,0x0b]