[ARM] Better OR's for MVE compares
[llvm-core.git] / test / MC / Mips / micromips-loadstore-unaligned.s
blobab1d8b935a10d245a18ec8f11cab91c2043021e0
1 # RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding \
2 # RUN: -mattr=micromips | FileCheck -check-prefix=CHECK-EL %s
3 # RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding \
4 # RUN: -mattr=micromips | FileCheck -check-prefix=CHECK-EB %s
5 # Check that the assembler can handle the documented syntax
6 # for loads and stores.
7 #------------------------------------------------------------------------------
8 # Load and Store unaligned instructions
9 #------------------------------------------------------------------------------
10 # Little endian
11 #------------------------------------------------------------------------------
12 # CHECK-EL: lwl $4, 16($5) # encoding: [0x85,0x60,0x10,0x00]
13 # CHECK-EL: lwr $4, 16($5) # encoding: [0x85,0x60,0x10,0x10]
14 # CHECK-EL: swl $4, 16($5) # encoding: [0x85,0x60,0x10,0x80]
15 # CHECK-EL: swr $4, 16($5) # encoding: [0x85,0x60,0x10,0x90]
16 #------------------------------------------------------------------------------
17 # Big endian
18 #------------------------------------------------------------------------------
19 # CHECK-EB: lwl $4, 16($5) # encoding: [0x60,0x85,0x00,0x10]
20 # CHECK-EB: lwr $4, 16($5) # encoding: [0x60,0x85,0x10,0x10]
21 # CHECK-EB: swl $4, 16($5) # encoding: [0x60,0x85,0x80,0x10]
22 # CHECK-EB: swr $4, 16($5) # encoding: [0x60,0x85,0x90,0x10]
23 lwl $4, 16($5)
24 lwr $4, 16($5)
25 swl $4, 16($5)
26 swr $4, 16($5)