[ARM] Better OR's for MVE compares
[llvm-core.git] / test / MC / Mips / mips32r5 / invalid-mips64r2.s
blobed8f5c743b98ed0ebe641548ca58b180f991eb7f
1 # Instructions that are invalid
3 # RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding \
4 # RUN: -mcpu=mips32r5 2>%t1
5 # RUN: FileCheck %s < %t1
7 .set noat
8 dsbh $v1,$t6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
9 dshd $v0,$sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled