1 # Instructions that should be valid but currently fail for known reasons (e.g.
2 # they aren't implemented yet).
3 # This test is set up to XPASS if any instruction generates an encoding.
5 # RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r5 | not FileCheck %s
13 addqh_r.w $
8,$v1
,$zero
14 alnv.ps $
f12,$
f18,$
f30,$
12
16 c.f.ps $fcc6
,$
f11,$
f11
17 c.le.ps $fcc1
,$
f7,$
f20
21 c.ngle.ps $fcc7
,$
f12,$
f20
22 c.ngt.ps $fcc5
,$
f30,$
f6
23 c.ole.ps $fcc7
,$
f21,$
f8
24 c.olt.ps $fcc3
,$
f7,$
f16
25 c.seq.ps $fcc6
,$
f31,$
f14
27 c.ueq.ps $fcc1
,$
f5,$
f29
28 c.ule.ps $fcc6
,$
f17,$
f3
29 c.ult.ps $fcc7
,$
f14,$
f0
30 c.un.ps $fcc4
,$
f2,$
f26
36 cvt.ps.s $
f3,$
f18,$
f19
56 madd.ps $
f22,$
f3,$
f14,$
f3
59 movf.ps $
f10,$
f28,$fcc6
61 movt.ps $
f20,$
f25,$fcc2
63 msub.ps $
f12,$
f14,$
f29,$
f17
68 nmadd.ps $
f27,$
f4,$
f9,$
f25
69 nmsub.ps $
f6,$
f12,$
f14,$
f17