[ARM] Better OR's for MVE compares
[llvm-core.git] / test / MC / Mips / nabi-regs.s
blobc2658098af5a709bee669039c22d580d28a6151b
1 # OABI (o32, o64) have a different symbolic register
2 # set for the A and T registers because the NABI allows
3 # for 4 more register parameters (A registers) offsetting
4 # the T registers.
6 # RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding \
7 # RUN: -mcpu=mips64r2 -arch=mips64 | FileCheck %s
9 # RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding \
10 # RUN: -mcpu=mips64r2 -arch=mips64 -target-abi n32 | FileCheck %s
12 # RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding \
13 # RUN: -mcpu=mips64r2 -arch=mips64 -target-abi n64 | FileCheck %s
15 .text
16 foo:
18 # CHECK: add $16, $16, $4 # encoding: [0x02,0x04,0x80,0x20]
19 add $s0,$s0,$a0
20 # CHECK: add $16, $16, $6 # encoding: [0x02,0x06,0x80,0x20]
21 add $s0,$s0,$a2
22 # CHECK: add $16, $16, $7 # encoding: [0x02,0x07,0x80,0x20]
23 add $s0,$s0,$a3
24 # CHECK: add $16, $16, $8 # encoding: [0x02,0x08,0x80,0x20]
25 add $s0,$s0,$a4
26 # CHECK: add $16, $16, $9 # encoding: [0x02,0x09,0x80,0x20]
27 add $s0,$s0,$a5
28 # CHECK: add $16, $16, $10 # encoding: [0x02,0x0a,0x80,0x20]
29 add $s0,$s0,$a6
30 # CHECK: add $16, $16, $11 # encoding: [0x02,0x0b,0x80,0x20]
31 add $s0,$s0,$a7
32 # CHECK: add $16, $16, $12 # encoding: [0x02,0x0c,0x80,0x20]
33 add $s0,$s0,$t0
34 # CHECK: add $16, $16, $13 # encoding: [0x02,0x0d,0x80,0x20]
35 add $s0,$s0,$t1
36 # CHECK: add $16, $16, $14 # encoding: [0x02,0x0e,0x80,0x20]
37 add $s0,$s0,$t2
38 # CHECK: add $16, $16, $15 # encoding: [0x02,0x0f,0x80,0x20]
39 add $s0,$s0,$t3