1 # RUN: llvm-mc -filetype=obj -triple=mipsel-unknown-nacl %s \
2 # RUN: | llvm-objdump -disassemble -z -no-show-raw-insn - | FileCheck %s
4 # This test tests that address-masking sandboxing is added when given assembly
8 # Test that address-masking sandboxing is added before indirect branches and
22 # CHECK: and $4, $4, $14
25 # Check that additional nop is inserted, to align mask and jr to the next
31 # CHECK: and $ra, $ra, $14
36 # Test that address-masking sandboxing is added before load instructions.
59 # CHECK: and $1, $1, $15
60 # CHECK-NEXT: lb $4, 0($1)
62 # Check that additional nop is inserted, to align mask and load to the next
68 # CHECK: and $2, $2, $15
69 # CHECK-NEXT: lbu $4, 0($2)
71 # CHECK: and $3, $3, $15
72 # CHECK-NEXT: lh $4, 0($3)
74 # CHECK: and $4, $4, $15
75 # CHECK-NEXT: lhu $1, 0($4)
77 # CHECK: and $5, $5, $15
78 # CHECK-NEXT: lw $4, 0($5)
80 # CHECK: and $6, $6, $15
81 # CHECK-NEXT: lwc1 $f0, 0($6)
83 # CHECK: and $7, $7, $15
84 # CHECK-NEXT: ldc1 $f2, 0($7)
86 # CHECK: and $8, $8, $15
87 # CHECK-NEXT: ll $4, 0($8)
89 # CHECK: and $9, $9, $15
90 # CHECK-NEXT: lwl $4, 0($9)
92 # CHECK: and $10, $10, $15
93 # CHECK-NEXT: lwr $4, 0($10)
96 # Check that loads where base register is $sp or $t8 (thread pointer register)
100 # CHECK: lw $4, 0($sp)
102 # CHECK: lw $4, 0($24)
106 # Test that address-masking sandboxing is added before store instructions.
125 # CHECK-LABEL: test3:
127 # CHECK: and $1, $1, $15
128 # CHECK-NEXT: sb $4, 0($1)
130 # Check that additional nop is inserted, to align mask and store to the next
136 # CHECK: and $2, $2, $15
137 # CHECK-NEXT: sh $4, 0($2)
139 # CHECK: and $3, $3, $15
140 # CHECK-NEXT: sw $4, 0($3)
142 # CHECK: and $4, $4, $15
143 # CHECK-NEXT: swc1 $f0, 0($4)
145 # CHECK: and $5, $5, $15
146 # CHECK-NEXT: sdc1 $f2, 0($5)
148 # CHECK: and $6, $6, $15
149 # CHECK-NEXT: swl $4, 0($6)
151 # CHECK: and $7, $7, $15
152 # CHECK-NEXT: swr $4, 0($7)
154 # CHECK: and $8, $8, $15
155 # CHECK-NEXT: sc $4, 0($8)
158 # Check that stores where base register is $sp or $t8 (thread pointer register)
162 # CHECK: sw $4, 0($sp)
164 # CHECK: sw $4, 0($24)
168 # Test that address-masking sandboxing is added after instructions that change
182 # CHECK-LABEL: test4:
184 # CHECK: addiu $sp, $sp, 24
185 # CHECK-NEXT: and $sp, $sp, $15
187 # Check that additional nop is inserted, to align instruction and mask to the
193 # CHECK: addu $sp, $sp, $1
194 # CHECK-NEXT: and $sp, $sp, $15
196 # Since we next check sandboxing sequence which consists of 3 instructions,
197 # check that 2 additional nops are inserted, to align it to the next bundle.
203 # Check that for instructions that change stack-pointer and load from memory
204 # masks are added before and after the instruction.
206 # CHECK: and $2, $2, $15
207 # CHECK-NEXT: lw $sp, 0($2)
208 # CHECK-NEXT: and $sp, $sp, $15
210 # For loads where $sp is destination and base, check that mask is added after
214 # CHECK: lw $sp, 123($sp)
215 # CHECK-NEXT: and $sp, $sp, $15
217 # For stores where $sp is destination and base, check that mask is added neither
221 # CHECK: sw $sp, 123($sp)
226 # Test that call + branch delay is aligned at bundle end. Test that mask is
227 # added before indirect calls.
257 # CHECK-LABEL: test5:
259 # CHECK-NEXT: addiu $4, $zero, 1
264 # CHECK-NEXT: addiu $4, $zero, 2
269 # CHECK-NEXT: addiu $4, $zero, 3
279 # CHECK-NEXT: addiu $4, $zero, 4
282 # CHECK-NEXT: and $25, $25, $14
283 # CHECK-NEXT: jalr $25
284 # CHECK-NEXT: addiu $4, $zero, 5
288 # Test that we can put non-dangerous loads and stores in branch delay slot.
307 # CHECK-LABEL: test6:
309 # CHECK-NEXT: sw $4, 0($sp)
314 # CHECK-NEXT: lw $5, 0($24)
317 # CHECK-NEXT: and $25, $25, $14
319 # CHECK-NEXT: sw $sp, 0($sp)