[ARM] Better OR's for MVE compares
[llvm-core.git] / test / MC / PowerPC / ppc64-tls-relocs-01.s
bloba37dd97fec67e440e0afececc3f5f7eb81fbd07d
1 # RUN: llvm-mc -triple=powerpc64-unknown-linux-gnu -filetype=obj %s | \
2 # RUN: llvm-readobj -r | FileCheck %s
4 .text
5 addis 3, 13, t@tprel@ha
6 addi 3, 3, t@tprel@l
7 addis 3, 2, t@got@tprel@ha
8 ld 3, t@got@tprel@l(3)
9 lwzx 4, 3, t@tls
10 lhzx 4, 3, t@tls
11 lbzx 4, 3, t@tls
12 ldx 4, 3, t@tls
13 stbx 4, 3, t@tls
14 sthx 4, 3, t@tls
15 stwx 4, 3, t@tls
16 stdx 4, 3, t@tls
17 .type t,@object
18 .section .tbss,"awT",@nobits
19 .globl t
20 .align 2
22 .long 0
23 .size t, 4
25 # Check for a pair of R_PPC64_TPREL16_HA / R_PPC64_TPREL16_LO relocs
26 # against the thread-local symbol 't'.
27 # CHECK: Relocations [
28 # CHECK: Section ({{[0-9]+}}) .rela.text {
29 # CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TPREL16_HA t
30 # CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TPREL16_LO t
31 # CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_GOT_TPREL16_HA t 0x0
32 # CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_GOT_TPREL16_LO_DS t 0x0
33 # CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TLS t 0x0
34 # CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TLS t 0x0
35 # CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TLS t 0x0
36 # CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TLS t 0x0
37 # CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TLS t 0x0
38 # CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TLS t 0x0
39 # CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TLS t 0x0
40 # CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TLS t 0x0
41 # CHECK-NEXT: }