[ARM] Better OR's for MVE compares
[llvm-core.git] / test / MC / RISCV / rv32f-invalid.s
blob68912c760084c026d313a9474aa678ff870be465
1 # RUN: not llvm-mc -triple riscv32 -mattr=+f < %s 2>&1 | FileCheck %s
3 # Out of range immediates
4 ## simm12
5 flw ft1, -2049(a0) # CHECK: :[[@LINE]]:10: error: operand must be a symbol with %lo/%pcrel_lo/%tprel_lo modifier or an integer in the range [-2048, 2047]
6 fsw ft2, 2048(a1) # CHECK: :[[@LINE]]:10: error: operand must be a symbol with %lo/%pcrel_lo/%tprel_lo modifier or an integer in the range [-2048, 2047]
8 # Memory operand not formatted correctly
9 flw ft1, a0, -200 # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
10 fsw ft2, a1, 100 # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
12 # Invalid register names
13 flw ft15, 100(a0) # CHECK: :[[@LINE]]:5: error: invalid operand for instruction
14 flw ft1, 100(a10) # CHECK: :[[@LINE]]:14: error: expected register
15 fsgnjn.s fa100, fa2, fa3 # CHECK: :[[@LINE]]:10: error: invalid operand for instruction
17 # Integer registers where FP regs are expected
18 fmv.x.w fs7, a2 # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
20 # FP registers where integer regs are expected
21 fmv.w.x a8, ft2 # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
23 # Rounding mode when a register is expected
24 fmadd.s f10, f11, f12, ree # CHECK: :[[@LINE]]:24: error: invalid operand for instruction
26 # Invalid rounding modes
27 fmadd.s f10, f11, f12, f13, ree # CHECK: :[[@LINE]]:29: error: operand must be a valid floating point rounding mode mnemonic
28 fmsub.s f14, f15, f16, f17, 0 # CHECK: :[[@LINE]]:29: error: operand must be a valid floating point rounding mode mnemonic
29 fnmsub.s f18, f19, f20, f21, 0b111 # CHECK: :[[@LINE]]:30: error: operand must be a valid floating point rounding mode mnemonic
31 # Using 'D' instructions for an 'F'-only target
32 fadd.d ft0, ft1, ft2 # CHECK: :[[@LINE]]:1: error: instruction use requires an option to be enabled
34 # Using RV64F instructions for RV32 is tested in rv64f-valid.s