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HEAD
[ARM] Better OR's for MVE compares
[llvm-core.git]
/
test
/
MC
/
X86
/
intel-syntax-invalid-basereg.s
blob
fe026e1840869c704fdb3e972c6a55df3f4aaf10
1
//
RUN
:
not
llvm-mc
-
triple x86_64-unknown-unknown
%
s
2
> %
t.err
2
//
RUN
:
FileCheck
< %
t.err
%
s
3
4
.intel_syntax
5
6
//
CHECK
:
error
:
base register is
64
-
bit
,
but index register is
not
7
lea rax
, [
rdi
+
edx
]