1 ; RUN: opt < %s -S -early-cse | FileCheck %s
2 ; RUN: opt < %s -S -basicaa -early-cse-memssa | FileCheck %s
3 ; RUN: opt < %s -S -passes=early-cse | FileCheck %s
5 declare void @llvm.assume(i1) nounwind
8 define void @test1(i8 %V, i32 *%P) {
9 %A = bitcast i64 42 to double ;; dead
10 %B = add i32 4, 19 ;; constant folds
12 ; CHECK-NEXT: store i32 23, i32* %P
14 %C = zext i8 %V to i32
15 %D = zext i8 %V to i32 ;; CSE
16 store volatile i32 %C, i32* %P
17 store volatile i32 %D, i32* %P
18 ; CHECK-NEXT: %C = zext i8 %V to i32
19 ; CHECK-NEXT: store volatile i32 %C
20 ; CHECK-NEXT: store volatile i32 %C
24 store volatile i32 %E, i32* %P
25 store volatile i32 %F, i32* %P
26 ; CHECK-NEXT: %E = add i32 %C, %C
27 ; CHECK-NEXT: store volatile i32 %E
28 ; CHECK-NEXT: store volatile i32 %E
30 %G = add nuw i32 %C, %C
31 store volatile i32 %G, i32* %P
32 ; CHECK-NEXT: store volatile i32 %E
37 ;; Simple load value numbering.
38 ; CHECK-LABEL: @test2(
39 define i32 @test2(i32 *%P) {
40 %V1 = load i32, i32* %P
41 %V2 = load i32, i32* %P
42 %Diff = sub i32 %V1, %V2
47 ; CHECK-LABEL: @test2a(
48 define i32 @test2a(i32 *%P, i1 %b) {
49 %V1 = load i32, i32* %P
50 tail call void @llvm.assume(i1 %b)
51 %V2 = load i32, i32* %P
52 %Diff = sub i32 %V1, %V2
57 ;; Cross block load value numbering.
58 ; CHECK-LABEL: @test3(
59 define i32 @test3(i32 *%P, i1 %Cond) {
60 %V1 = load i32, i32* %P
61 br i1 %Cond, label %T, label %F
66 %V2 = load i32, i32* %P
67 %Diff = sub i32 %V1, %V2
73 ; CHECK-LABEL: @test3a(
74 define i32 @test3a(i32 *%P, i1 %Cond, i1 %b) {
75 %V1 = load i32, i32* %P
76 br i1 %Cond, label %T, label %F
81 tail call void @llvm.assume(i1 %b)
82 %V2 = load i32, i32* %P
83 %Diff = sub i32 %V1, %V2
89 ;; Cross block load value numbering stops when stores happen.
90 ; CHECK-LABEL: @test4(
91 define i32 @test4(i32 *%P, i1 %Cond) {
92 %V1 = load i32, i32* %P
93 br i1 %Cond, label %T, label %F
100 %V2 = load i32, i32* %P
101 %Diff = sub i32 %V1, %V2
104 ; CHECK: ret i32 %Diff
107 declare i32 @func(i32 *%P) readonly
109 ;; Simple call CSE'ing.
110 ; CHECK-LABEL: @test5(
111 define i32 @test5(i32 *%P) {
112 %V1 = call i32 @func(i32* %P)
113 %V2 = call i32 @func(i32* %P)
114 %Diff = sub i32 %V1, %V2
119 ;; Trivial Store->load forwarding
120 ; CHECK-LABEL: @test6(
121 define i32 @test6(i32 *%P) {
122 store i32 42, i32* %P
123 %V1 = load i32, i32* %P
128 ; CHECK-LABEL: @test6a(
129 define i32 @test6a(i32 *%P, i1 %b) {
130 store i32 42, i32* %P
131 tail call void @llvm.assume(i1 %b)
132 %V1 = load i32, i32* %P
137 ;; Trivial dead store elimination.
138 ; CHECK-LABEL: @test7(
139 define void @test7(i32 *%P) {
140 store i32 42, i32* %P
141 store i32 45, i32* %P
143 ; CHECK-NEXT: store i32 45
144 ; CHECK-NEXT: ret void
147 ;; Readnone functions aren't invalidated by stores.
148 ; CHECK-LABEL: @test8(
149 define i32 @test8(i32 *%P) {
150 %V1 = call i32 @func(i32* %P) readnone
152 %V2 = call i32 @func(i32* %P) readnone
153 %Diff = sub i32 %V1, %V2
158 ;; Trivial DSE can't be performed across a readonly call. The call
159 ;; can observe the earlier write.
160 ; CHECK-LABEL: @test9(
161 define i32 @test9(i32 *%P) {
163 %V1 = call i32 @func(i32* %P) readonly
166 ; CHECK: store i32 4, i32* %P
167 ; CHECK-NEXT: %V1 = call i32 @func(i32* %P)
168 ; CHECK-NEXT: store i32 5, i32* %P
169 ; CHECK-NEXT: ret i32 %V1
172 ;; Trivial DSE can be performed across a readnone call.
173 ; CHECK-LABEL: @test10
174 define i32 @test10(i32 *%P) {
176 %V1 = call i32 @func(i32* %P) readnone
179 ; CHECK-NEXT: %V1 = call i32 @func(i32* %P)
180 ; CHECK-NEXT: store i32 5, i32* %P
181 ; CHECK-NEXT: ret i32 %V1
184 ;; Trivial dead store elimination - should work for an entire series of dead stores too.
185 ; CHECK-LABEL: @test11(
186 define void @test11(i32 *%P) {
187 store i32 42, i32* %P
188 store i32 43, i32* %P
189 store i32 44, i32* %P
190 store i32 45, i32* %P
192 ; CHECK-NEXT: store i32 45
193 ; CHECK-NEXT: ret void
196 ; CHECK-LABEL: @test12(
197 define i32 @test12(i1 %B, i32* %P1, i32* %P2) {
198 %load0 = load i32, i32* %P1
199 %1 = load atomic i32, i32* %P2 seq_cst, align 4
200 %load1 = load i32, i32* %P1
201 %sel = select i1 %B, i32 %load0, i32 %load1
203 ; CHECK: load i32, i32* %P1
204 ; CHECK: load i32, i32* %P1
207 define void @dse1(i32 *%P) {
210 %v = load i32, i32* %P
211 store i32 %v, i32* %P
215 define void @dse2(i32 *%P) {
218 %v = load atomic i32, i32* %P seq_cst, align 4
219 store i32 %v, i32* %P
223 define void @dse3(i32 *%P) {
226 %v = load atomic i32, i32* %P seq_cst, align 4
227 store atomic i32 %v, i32* %P unordered, align 4
231 define i32 @dse4(i32 *%P, i32 *%Q) {
235 %a = load i32, i32* %Q
236 %v = load atomic i32, i32* %P unordered, align 4
237 store atomic i32 %v, i32* %P unordered, align 4
238 %b = load i32, i32* %Q
239 %res = sub i32 %a, %b
243 ; Note that in this example, %P and %Q could in fact be the same
244 ; pointer. %v could be different than the value observed for %a
245 ; and that's okay because we're using relaxed memory ordering.
246 ; The only guarantee we have to provide is that each of the loads
247 ; has to observe some value written to that location. We do
248 ; not have to respect the order in which those writes were done.
249 define i32 @dse5(i32 *%P, i32 *%Q) {
253 %v = load atomic i32, i32* %P unordered, align 4
254 %a = load atomic i32, i32* %Q unordered, align 4
255 store atomic i32 %v, i32* %P unordered, align 4
256 %b = load atomic i32, i32* %Q unordered, align 4
257 %res = sub i32 %a, %b
262 define void @dse_neg1(i32 *%P) {
263 ; CHECK-LABEL: @dse_neg1
265 %v = load i32, i32* %P
270 ; Could remove the store, but only if ordering was somehow
272 define void @dse_neg2(i32 *%P) {
273 ; CHECK-LABEL: @dse_neg2
275 %v = load i32, i32* %P
276 store atomic i32 %v, i32* %P seq_cst, align 4
280 @c = external global i32, align 4
281 declare i32 @reads_c(i32 returned)
282 define void @pr28763() {
284 ; CHECK-LABEL: @pr28763(
285 ; CHECK: store i32 0, i32* @c, align 4
286 ; CHECK: call i32 @reads_c(i32 0)
287 ; CHECK: store i32 2, i32* @c, align 4
288 %load = load i32, i32* @c, align 4
289 store i32 0, i32* @c, align 4
290 %call = call i32 @reads_c(i32 0)
291 store i32 2, i32* @c, align 4