1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt < %s -instcombine -S | FileCheck %s
3 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
5 define i32 @test2(float %f) {
7 ; CHECK-NEXT: [[TMP5:%.*]] = fmul float [[F:%.*]], [[F]]
8 ; CHECK-NEXT: [[TMP21:%.*]] = bitcast float [[TMP5]] to i32
9 ; CHECK-NEXT: ret i32 [[TMP21]]
11 %tmp5 = fmul float %f, %f
12 %tmp9 = insertelement <4 x float> undef, float %tmp5, i32 0
13 %tmp10 = insertelement <4 x float> %tmp9, float 0.000000e+00, i32 1
14 %tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, i32 2
15 %tmp12 = insertelement <4 x float> %tmp11, float 0.000000e+00, i32 3
16 %tmp19 = bitcast <4 x float> %tmp12 to <4 x i32>
17 %tmp21 = extractelement <4 x i32> %tmp19, i32 0
21 define void @get_image() nounwind {
22 ; CHECK-LABEL: @get_image(
24 ; CHECK-NEXT: [[TMP0:%.*]] = call i32 @fgetc(i8* null) #0
25 ; CHECK-NEXT: br i1 false, label [[BB2:%.*]], label [[BB3:%.*]]
27 ; CHECK-NEXT: br label [[BB3]]
29 ; CHECK-NEXT: unreachable
32 %0 = call i32 @fgetc(i8* null) nounwind ; <i32> [#uses=1]
33 %1 = trunc i32 %0 to i8 ; <i8> [#uses=1]
34 %tmp2 = insertelement <100 x i8> zeroinitializer, i8 %1, i32 1 ; <<100 x i8>> [#uses=1]
35 %tmp1 = extractelement <100 x i8> %tmp2, i32 0 ; <i8> [#uses=1]
36 %2 = icmp eq i8 %tmp1, 80 ; <i1> [#uses=1]
37 br i1 %2, label %bb2, label %bb3
42 bb3: ; preds = %bb2, %entry
47 define void @vac(<4 x float>* nocapture %a) nounwind {
50 ; CHECK-NEXT: store <4 x float> zeroinitializer, <4 x float>* [[A:%.*]], align 16
51 ; CHECK-NEXT: ret void
54 %tmp1 = load <4 x float>, <4 x float>* %a ; <<4 x float>> [#uses=1]
55 %vecins = insertelement <4 x float> %tmp1, float 0.000000e+00, i32 0 ; <<4 x float>> [#uses=1]
56 %vecins4 = insertelement <4 x float> %vecins, float 0.000000e+00, i32 1; <<4 x float>> [#uses=1]
57 %vecins6 = insertelement <4 x float> %vecins4, float 0.000000e+00, i32 2; <<4 x float>> [#uses=1]
58 %vecins8 = insertelement <4 x float> %vecins6, float 0.000000e+00, i32 3; <<4 x float>> [#uses=1]
59 store <4 x float> %vecins8, <4 x float>* %a
63 declare i32 @fgetc(i8*)
65 define <4 x float> @dead_shuffle_elt(<4 x float> %x, <2 x float> %y) nounwind {
66 ; CHECK-LABEL: @dead_shuffle_elt(
67 ; CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <2 x float> [[Y:%.*]], <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
68 ; CHECK-NEXT: [[SHUFFLE9_I:%.*]] = shufflevector <4 x float> [[SHUFFLE_I]], <4 x float> [[X:%.*]], <4 x i32> <i32 0, i32 1, i32 6, i32 7>
69 ; CHECK-NEXT: ret <4 x float> [[SHUFFLE9_I]]
71 %shuffle.i = shufflevector <2 x float> %y, <2 x float> %y, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
72 %shuffle9.i = shufflevector <4 x float> %x, <4 x float> %shuffle.i, <4 x i32> <i32 4, i32 5, i32 2, i32 3>
73 ret <4 x float> %shuffle9.i
76 define <2 x float> @test_fptrunc(double %f) {
77 ; CHECK-LABEL: @test_fptrunc(
78 ; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> <double undef, double 0.000000e+00>, double [[F:%.*]], i32 0
79 ; CHECK-NEXT: [[TMP2:%.*]] = fptrunc <2 x double> [[TMP1]] to <2 x float>
80 ; CHECK-NEXT: ret <2 x float> [[TMP2]]
82 %tmp9 = insertelement <4 x double> undef, double %f, i32 0
83 %tmp10 = insertelement <4 x double> %tmp9, double 0.000000e+00, i32 1
84 %tmp11 = insertelement <4 x double> %tmp10, double 0.000000e+00, i32 2
85 %tmp12 = insertelement <4 x double> %tmp11, double 0.000000e+00, i32 3
86 %tmp5 = fptrunc <4 x double> %tmp12 to <4 x float>
87 %ret = shufflevector <4 x float> %tmp5, <4 x float> undef, <2 x i32> <i32 0, i32 1>
91 define <2 x double> @test_fpext(float %f) {
92 ; CHECK-LABEL: @test_fpext(
93 ; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> <float undef, float 0.000000e+00>, float [[F:%.*]], i32 0
94 ; CHECK-NEXT: [[TMP2:%.*]] = fpext <2 x float> [[TMP1]] to <2 x double>
95 ; CHECK-NEXT: ret <2 x double> [[TMP2]]
97 %tmp9 = insertelement <4 x float> undef, float %f, i32 0
98 %tmp10 = insertelement <4 x float> %tmp9, float 0.000000e+00, i32 1
99 %tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, i32 2
100 %tmp12 = insertelement <4 x float> %tmp11, float 0.000000e+00, i32 3
101 %tmp5 = fpext <4 x float> %tmp12 to <4 x double>
102 %ret = shufflevector <4 x double> %tmp5, <4 x double> undef, <2 x i32> <i32 0, i32 1>
103 ret <2 x double> %ret
106 define <4 x double> @test_shuffle(<4 x double> %f) {
107 ; CHECK-LABEL: @test_shuffle(
108 ; CHECK-NEXT: [[RET1:%.*]] = insertelement <4 x double> [[F:%.*]], double 1.000000e+00, i32 3
109 ; CHECK-NEXT: ret <4 x double> [[RET1]]
111 %ret = shufflevector <4 x double> %f, <4 x double> <double undef, double 1.0, double undef, double undef>, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
112 ret <4 x double> %ret
115 define <4 x float> @test_select(float %f, float %g) {
116 ; CHECK-LABEL: @test_select(
117 ; CHECK-NEXT: [[A3:%.*]] = insertelement <4 x float> <float undef, float undef, float undef, float 3.000000e+00>, float [[F:%.*]], i32 0
118 ; CHECK-NEXT: [[RET:%.*]] = shufflevector <4 x float> [[A3]], <4 x float> <float undef, float 4.000000e+00, float 5.000000e+00, float undef>, <4 x i32> <i32 0, i32 5, i32 6, i32 3>
119 ; CHECK-NEXT: ret <4 x float> [[RET]]
121 %a0 = insertelement <4 x float> undef, float %f, i32 0
122 %a1 = insertelement <4 x float> %a0, float 1.000000e+00, i32 1
123 %a2 = insertelement <4 x float> %a1, float 2.000000e+00, i32 2
124 %a3 = insertelement <4 x float> %a2, float 3.000000e+00, i32 3
125 %b0 = insertelement <4 x float> undef, float %g, i32 0
126 %b1 = insertelement <4 x float> %b0, float 4.000000e+00, i32 1
127 %b2 = insertelement <4 x float> %b1, float 5.000000e+00, i32 2
128 %b3 = insertelement <4 x float> %b2, float 6.000000e+00, i32 3
129 %ret = select <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x float> %a3, <4 x float> %b3
133 ; Check that instcombine doesn't wrongly fold away the select completely.
135 define <2 x i64> @PR24922(<2 x i64> %v) {
136 ; CHECK-LABEL: @PR24922(
137 ; CHECK-NEXT: [[RESULT1:%.*]] = insertelement <2 x i64> [[V:%.*]], i64 0, i32 0
138 ; CHECK-NEXT: ret <2 x i64> [[RESULT1]]
140 %result = select <2 x i1> <i1 icmp eq (i64 extractelement (<2 x i64> bitcast (<4 x i32> <i32 15, i32 15, i32 15, i32 15> to <2 x i64>), i64 0), i64 0), i1 true>, <2 x i64> %v, <2 x i64> zeroinitializer
141 ret <2 x i64> %result
144 ; The shuffle only demands the 0th (undef) element of 'out123', so everything should fold away.
146 define <4 x float> @inselt_shuf_no_demand(float %a1, float %a2, float %a3) {
147 ; CHECK-LABEL: @inselt_shuf_no_demand(
148 ; CHECK-NEXT: ret <4 x float> undef
150 %out1 = insertelement <4 x float> undef, float %a1, i32 1
151 %out12 = insertelement <4 x float> %out1, float %a2, i32 2
152 %out123 = insertelement <4 x float> %out12, float %a3, i32 3
153 %shuffle = shufflevector <4 x float> %out123, <4 x float> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
154 ret <4 x float> %shuffle
157 ; The shuffle only demands the 0th (undef) element of 'out123', so everything should fold away.
159 define <4 x float> @inselt_shuf_no_demand_commute(float %a1, float %a2, float %a3) {
160 ; CHECK-LABEL: @inselt_shuf_no_demand_commute(
161 ; CHECK-NEXT: ret <4 x float> undef
163 %out1 = insertelement <4 x float> undef, float %a1, i32 1
164 %out12 = insertelement <4 x float> %out1, float %a2, i32 2
165 %out123 = insertelement <4 x float> %out12, float %a3, i32 3
166 %shuffle = shufflevector <4 x float> undef, <4 x float> %out123, <4 x i32> <i32 4, i32 undef, i32 undef, i32 undef>
167 ret <4 x float> %shuffle
170 ; The add uses 'out012' giving it multiple uses after the shuffle is transformed to also
171 ; use 'out012'. The analysis should be able to see past that.
173 define <4 x i32> @inselt_shuf_no_demand_multiuse(i32 %a0, i32 %a1, <4 x i32> %b) {
174 ; CHECK-LABEL: @inselt_shuf_no_demand_multiuse(
175 ; CHECK-NEXT: [[OUT0:%.*]] = insertelement <4 x i32> undef, i32 [[A0:%.*]], i32 0
176 ; CHECK-NEXT: [[OUT01:%.*]] = insertelement <4 x i32> [[OUT0]], i32 [[A1:%.*]], i32 1
177 ; CHECK-NEXT: [[FOO:%.*]] = add <4 x i32> [[OUT01]], [[B:%.*]]
178 ; CHECK-NEXT: ret <4 x i32> [[FOO]]
180 %out0 = insertelement <4 x i32> undef, i32 %a0, i32 0
181 %out01 = insertelement <4 x i32> %out0, i32 %a1, i32 1
182 %out012 = insertelement <4 x i32> %out01, i32 %a0, i32 2
183 %foo = add <4 x i32> %out012, %b
184 %out0123 = insertelement <4 x i32> %foo, i32 %a1, i32 3
185 %shuffle = shufflevector <4 x i32> %out0123, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
186 ret <4 x i32> %shuffle
189 define <4 x float> @inselt_shuf_no_demand_bogus_insert_index_in_chain(float %a1, float %a2, float %a3, i32 %variable_index) {
190 ; CHECK-LABEL: @inselt_shuf_no_demand_bogus_insert_index_in_chain(
191 ; CHECK-NEXT: [[OUT12:%.*]] = insertelement <4 x float> undef, float [[A2:%.*]], i32 [[VARIABLE_INDEX:%.*]]
192 ; CHECK-NEXT: ret <4 x float> [[OUT12]]
194 %out1 = insertelement <4 x float> undef, float %a1, i32 1
195 %out12 = insertelement <4 x float> %out1, float %a2, i32 %variable_index ; something unexpected
196 %out123 = insertelement <4 x float> %out12, float %a3, i32 3
197 %shuffle = shufflevector <4 x float> %out123, <4 x float> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
198 ret <4 x float> %shuffle
201 ; Test undef replacement in constant vector elements with binops.
203 define <3 x i8> @shuf_add(<3 x i8> %x) {
204 ; CHECK-LABEL: @shuf_add(
205 ; CHECK-NEXT: [[BO:%.*]] = add <3 x i8> [[X:%.*]], <i8 undef, i8 2, i8 3>
206 ; CHECK-NEXT: [[R:%.*]] = shufflevector <3 x i8> [[BO]], <3 x i8> undef, <3 x i32> <i32 1, i32 undef, i32 2>
207 ; CHECK-NEXT: ret <3 x i8> [[R]]
209 %bo = add nsw <3 x i8> %x, <i8 1, i8 2, i8 3>
210 %r = shufflevector <3 x i8> %bo, <3 x i8> undef, <3 x i32> <i32 1, i32 undef, i32 2>
214 define <3 x i8> @shuf_sub(<3 x i8> %x) {
215 ; CHECK-LABEL: @shuf_sub(
216 ; CHECK-NEXT: [[BO:%.*]] = sub <3 x i8> <i8 1, i8 undef, i8 3>, [[X:%.*]]
217 ; CHECK-NEXT: ret <3 x i8> [[BO]]
219 %bo = sub nuw <3 x i8> <i8 1, i8 2, i8 3>, %x
220 %r = shufflevector <3 x i8> %bo, <3 x i8> undef, <3 x i32> <i32 0, i32 undef, i32 2>
224 define <3 x i8> @shuf_mul(<3 x i8> %x) {
225 ; CHECK-LABEL: @shuf_mul(
226 ; CHECK-NEXT: [[BO:%.*]] = mul <3 x i8> [[X:%.*]], <i8 1, i8 undef, i8 3>
227 ; CHECK-NEXT: [[R:%.*]] = shufflevector <3 x i8> [[BO]], <3 x i8> undef, <3 x i32> <i32 0, i32 2, i32 0>
228 ; CHECK-NEXT: ret <3 x i8> [[R]]
230 %bo = mul nsw <3 x i8> %x, <i8 1, i8 2, i8 3>
231 %r = shufflevector <3 x i8> %bo, <3 x i8> undef, <3 x i32> <i32 0, i32 2, i32 0>
235 define <3 x i8> @shuf_and(<3 x i8> %x) {
236 ; CHECK-LABEL: @shuf_and(
237 ; CHECK-NEXT: [[BO:%.*]] = and <3 x i8> [[X:%.*]], <i8 1, i8 2, i8 undef>
238 ; CHECK-NEXT: [[R:%.*]] = shufflevector <3 x i8> [[BO]], <3 x i8> undef, <3 x i32> <i32 1, i32 1, i32 0>
239 ; CHECK-NEXT: ret <3 x i8> [[R]]
241 %bo = and <3 x i8> %x, <i8 1, i8 2, i8 3>
242 %r = shufflevector <3 x i8> %bo, <3 x i8> undef, <3 x i32> <i32 1, i32 1, i32 0>
246 define <3 x i8> @shuf_or(<3 x i8> %x) {
247 ; CHECK-LABEL: @shuf_or(
248 ; CHECK-NEXT: [[BO:%.*]] = or <3 x i8> [[X:%.*]], <i8 1, i8 2, i8 undef>
249 ; CHECK-NEXT: [[R:%.*]] = shufflevector <3 x i8> [[BO]], <3 x i8> undef, <3 x i32> <i32 1, i32 undef, i32 0>
250 ; CHECK-NEXT: ret <3 x i8> [[R]]
252 %bo = or <3 x i8> %x, <i8 1, i8 2, i8 3>
253 %r = shufflevector <3 x i8> %bo, <3 x i8> undef, <3 x i32> <i32 1, i32 undef, i32 0>
257 define <3 x i8> @shuf_xor(<3 x i8> %x) {
258 ; CHECK-LABEL: @shuf_xor(
259 ; CHECK-NEXT: [[BO:%.*]] = xor <3 x i8> [[X:%.*]], <i8 1, i8 undef, i8 3>
260 ; CHECK-NEXT: [[R:%.*]] = shufflevector <3 x i8> [[BO]], <3 x i8> undef, <3 x i32> <i32 2, i32 undef, i32 0>
261 ; CHECK-NEXT: ret <3 x i8> [[R]]
263 %bo = xor <3 x i8> %x, <i8 1, i8 2, i8 3>
264 %r = shufflevector <3 x i8> %bo, <3 x i8> undef, <3 x i32> <i32 2, i32 undef, i32 0>
268 define <3 x i8> @shuf_lshr_const_op0(<3 x i8> %x) {
269 ; CHECK-LABEL: @shuf_lshr_const_op0(
270 ; CHECK-NEXT: [[BO:%.*]] = lshr <3 x i8> <i8 1, i8 2, i8 3>, [[X:%.*]]
271 ; CHECK-NEXT: [[R:%.*]] = shufflevector <3 x i8> [[BO]], <3 x i8> undef, <3 x i32> <i32 2, i32 1, i32 undef>
272 ; CHECK-NEXT: ret <3 x i8> [[R]]
274 %bo = lshr <3 x i8> <i8 1, i8 2, i8 3>, %x
275 %r = shufflevector <3 x i8> %bo, <3 x i8> undef, <3 x i32> <i32 2, i32 1, i32 undef>
279 define <3 x i8> @shuf_lshr_const_op1(<3 x i8> %x) {
280 ; CHECK-LABEL: @shuf_lshr_const_op1(
281 ; CHECK-NEXT: [[BO:%.*]] = lshr exact <3 x i8> [[X:%.*]], <i8 1, i8 2, i8 3>
282 ; CHECK-NEXT: [[R:%.*]] = shufflevector <3 x i8> [[BO]], <3 x i8> undef, <3 x i32> <i32 2, i32 1, i32 undef>
283 ; CHECK-NEXT: ret <3 x i8> [[R]]
285 %bo = lshr exact <3 x i8> %x, <i8 1, i8 2, i8 3>
286 %r = shufflevector <3 x i8> %bo, <3 x i8> undef, <3 x i32> <i32 2, i32 1, i32 undef>
290 define <3 x i8> @shuf_ashr_const_op0(<3 x i8> %x) {
291 ; CHECK-LABEL: @shuf_ashr_const_op0(
292 ; CHECK-NEXT: [[BO:%.*]] = lshr <3 x i8> <i8 1, i8 2, i8 3>, [[X:%.*]]
293 ; CHECK-NEXT: [[R:%.*]] = shufflevector <3 x i8> [[BO]], <3 x i8> undef, <3 x i32> <i32 0, i32 undef, i32 1>
294 ; CHECK-NEXT: ret <3 x i8> [[R]]
296 %bo = ashr <3 x i8> <i8 1, i8 2, i8 3>, %x
297 %r = shufflevector <3 x i8> %bo, <3 x i8> undef, <3 x i32> <i32 0, i32 undef, i32 1>
301 define <3 x i8> @shuf_ashr_const_op1(<3 x i8> %x) {
302 ; CHECK-LABEL: @shuf_ashr_const_op1(
303 ; CHECK-NEXT: [[BO:%.*]] = ashr exact <3 x i8> [[X:%.*]], <i8 1, i8 2, i8 3>
304 ; CHECK-NEXT: [[R:%.*]] = shufflevector <3 x i8> [[BO]], <3 x i8> undef, <3 x i32> <i32 0, i32 undef, i32 1>
305 ; CHECK-NEXT: ret <3 x i8> [[R]]
307 %bo = ashr exact <3 x i8> %x, <i8 1, i8 2, i8 3>
308 %r = shufflevector <3 x i8> %bo, <3 x i8> undef, <3 x i32> <i32 0, i32 undef, i32 1>
312 define <3 x i8> @shuf_shl_const_op0(<3 x i8> %x) {
313 ; CHECK-LABEL: @shuf_shl_const_op0(
314 ; CHECK-NEXT: [[BO:%.*]] = shl nsw <3 x i8> <i8 1, i8 2, i8 3>, [[X:%.*]]
315 ; CHECK-NEXT: [[R:%.*]] = shufflevector <3 x i8> [[BO]], <3 x i8> undef, <3 x i32> <i32 2, i32 undef, i32 0>
316 ; CHECK-NEXT: ret <3 x i8> [[R]]
318 %bo = shl nsw <3 x i8> <i8 1, i8 2, i8 3>, %x
319 %r = shufflevector <3 x i8> %bo, <3 x i8> undef, <3 x i32> <i32 2, i32 undef, i32 0>
323 define <3 x i8> @shuf_shl_const_op1(<3 x i8> %x) {
324 ; CHECK-LABEL: @shuf_shl_const_op1(
325 ; CHECK-NEXT: [[BO:%.*]] = shl nuw <3 x i8> [[X:%.*]], <i8 1, i8 2, i8 3>
326 ; CHECK-NEXT: [[R:%.*]] = shufflevector <3 x i8> [[BO]], <3 x i8> undef, <3 x i32> <i32 2, i32 undef, i32 0>
327 ; CHECK-NEXT: ret <3 x i8> [[R]]
329 %bo = shl nuw <3 x i8> %x, <i8 1, i8 2, i8 3>
330 %r = shufflevector <3 x i8> %bo, <3 x i8> undef, <3 x i32> <i32 2, i32 undef, i32 0>
334 define <3 x i8> @shuf_sdiv_const_op0(<3 x i8> %x) {
335 ; CHECK-LABEL: @shuf_sdiv_const_op0(
336 ; CHECK-NEXT: [[BO:%.*]] = sdiv exact <3 x i8> <i8 1, i8 2, i8 3>, [[X:%.*]]
337 ; CHECK-NEXT: [[R:%.*]] = shufflevector <3 x i8> [[BO]], <3 x i8> undef, <3 x i32> <i32 0, i32 undef, i32 1>
338 ; CHECK-NEXT: ret <3 x i8> [[R]]
340 %bo = sdiv exact <3 x i8> <i8 1, i8 2, i8 3>, %x
341 %r = shufflevector <3 x i8> %bo, <3 x i8> undef, <3 x i32> <i32 0, i32 undef, i32 1>
345 define <3 x i8> @shuf_sdiv_const_op1(<3 x i8> %x) {
346 ; CHECK-LABEL: @shuf_sdiv_const_op1(
347 ; CHECK-NEXT: [[BO:%.*]] = sdiv <3 x i8> [[X:%.*]], <i8 1, i8 2, i8 3>
348 ; CHECK-NEXT: [[R:%.*]] = shufflevector <3 x i8> [[BO]], <3 x i8> undef, <3 x i32> <i32 1, i32 undef, i32 0>
349 ; CHECK-NEXT: ret <3 x i8> [[R]]
351 %bo = sdiv <3 x i8> %x, <i8 1, i8 2, i8 3>
352 %r = shufflevector <3 x i8> %bo, <3 x i8> undef, <3 x i32> <i32 1, i32 undef, i32 0>
356 define <3 x i8> @shuf_srem_const_op0(<3 x i8> %x) {
357 ; CHECK-LABEL: @shuf_srem_const_op0(
358 ; CHECK-NEXT: [[BO:%.*]] = srem <3 x i8> <i8 1, i8 2, i8 3>, [[X:%.*]]
359 ; CHECK-NEXT: [[R:%.*]] = shufflevector <3 x i8> [[BO]], <3 x i8> undef, <3 x i32> <i32 1, i32 undef, i32 2>
360 ; CHECK-NEXT: ret <3 x i8> [[R]]
362 %bo = srem <3 x i8> <i8 1, i8 2, i8 3>, %x
363 %r = shufflevector <3 x i8> %bo, <3 x i8> undef, <3 x i32> <i32 1, i32 undef, i32 2>
367 define <3 x i8> @shuf_srem_const_op1(<3 x i8> %x) {
368 ; CHECK-LABEL: @shuf_srem_const_op1(
369 ; CHECK-NEXT: [[BO:%.*]] = srem <3 x i8> [[X:%.*]], <i8 1, i8 2, i8 3>
370 ; CHECK-NEXT: [[R:%.*]] = shufflevector <3 x i8> [[BO]], <3 x i8> undef, <3 x i32> <i32 2, i32 undef, i32 1>
371 ; CHECK-NEXT: ret <3 x i8> [[R]]
373 %bo = srem <3 x i8> %x, <i8 1, i8 2, i8 3>
374 %r = shufflevector <3 x i8> %bo, <3 x i8> undef, <3 x i32> <i32 2, i32 undef, i32 1>
378 define <3 x i8> @shuf_udiv_const_op0(<3 x i8> %x) {
379 ; CHECK-LABEL: @shuf_udiv_const_op0(
380 ; CHECK-NEXT: [[BO:%.*]] = udiv exact <3 x i8> <i8 1, i8 2, i8 3>, [[X:%.*]]
381 ; CHECK-NEXT: [[R:%.*]] = shufflevector <3 x i8> [[BO]], <3 x i8> undef, <3 x i32> <i32 2, i32 undef, i32 0>
382 ; CHECK-NEXT: ret <3 x i8> [[R]]
384 %bo = udiv exact <3 x i8> <i8 1, i8 2, i8 3>, %x
385 %r = shufflevector <3 x i8> %bo, <3 x i8> undef, <3 x i32> <i32 2, i32 undef, i32 0>
389 define <3 x i8> @shuf_udiv_const_op1(<3 x i8> %x) {
390 ; CHECK-LABEL: @shuf_udiv_const_op1(
391 ; CHECK-NEXT: [[BO:%.*]] = udiv <3 x i8> [[X:%.*]], <i8 1, i8 2, i8 3>
392 ; CHECK-NEXT: [[R:%.*]] = shufflevector <3 x i8> [[BO]], <3 x i8> undef, <3 x i32> <i32 2, i32 undef, i32 0>
393 ; CHECK-NEXT: ret <3 x i8> [[R]]
395 %bo = udiv <3 x i8> %x, <i8 1, i8 2, i8 3>
396 %r = shufflevector <3 x i8> %bo, <3 x i8> undef, <3 x i32> <i32 2, i32 undef, i32 0>
400 define <3 x i8> @shuf_urem_const_op0(<3 x i8> %x) {
401 ; CHECK-LABEL: @shuf_urem_const_op0(
402 ; CHECK-NEXT: [[BO:%.*]] = urem <3 x i8> <i8 1, i8 2, i8 3>, [[X:%.*]]
403 ; CHECK-NEXT: [[R:%.*]] = shufflevector <3 x i8> [[BO]], <3 x i8> undef, <3 x i32> <i32 2, i32 1, i32 undef>
404 ; CHECK-NEXT: ret <3 x i8> [[R]]
406 %bo = urem <3 x i8> <i8 1, i8 2, i8 3>, %x
407 %r = shufflevector <3 x i8> %bo, <3 x i8> undef, <3 x i32> <i32 2, i32 1, i32 undef>
411 define <3 x i8> @shuf_urem_const_op1(<3 x i8> %x) {
412 ; CHECK-LABEL: @shuf_urem_const_op1(
413 ; CHECK-NEXT: [[BO:%.*]] = urem <3 x i8> [[X:%.*]], <i8 1, i8 2, i8 3>
414 ; CHECK-NEXT: [[R:%.*]] = shufflevector <3 x i8> [[BO]], <3 x i8> undef, <3 x i32> <i32 undef, i32 1, i32 0>
415 ; CHECK-NEXT: ret <3 x i8> [[R]]
417 %bo = urem <3 x i8> %x, <i8 1, i8 2, i8 3>
418 %r = shufflevector <3 x i8> %bo, <3 x i8> undef, <3 x i32> <i32 undef, i32 1, i32 0>
422 define <3 x float> @shuf_fadd(<3 x float> %x) {
423 ; CHECK-LABEL: @shuf_fadd(
424 ; CHECK-NEXT: [[BO:%.*]] = fadd <3 x float> [[X:%.*]], <float 1.000000e+00, float 2.000000e+00, float undef>
425 ; CHECK-NEXT: [[R:%.*]] = shufflevector <3 x float> [[BO]], <3 x float> undef, <3 x i32> <i32 undef, i32 1, i32 0>
426 ; CHECK-NEXT: ret <3 x float> [[R]]
428 %bo = fadd <3 x float> %x, <float 1.0, float 2.0, float 3.0>
429 %r = shufflevector <3 x float> %bo, <3 x float> undef, <3 x i32> <i32 undef, i32 1, i32 0>
433 define <3 x float> @shuf_fsub(<3 x float> %x) {
434 ; CHECK-LABEL: @shuf_fsub(
435 ; CHECK-NEXT: [[BO:%.*]] = fsub fast <3 x float> <float 1.000000e+00, float undef, float 3.000000e+00>, [[X:%.*]]
436 ; CHECK-NEXT: [[R:%.*]] = shufflevector <3 x float> [[BO]], <3 x float> undef, <3 x i32> <i32 undef, i32 0, i32 2>
437 ; CHECK-NEXT: ret <3 x float> [[R]]
439 %bo = fsub fast <3 x float> <float 1.0, float 2.0, float 3.0>, %x
440 %r = shufflevector <3 x float> %bo, <3 x float> undef, <3 x i32> <i32 undef, i32 0, i32 2>
444 define <3 x float> @shuf_fmul(<3 x float> %x) {
445 ; CHECK-LABEL: @shuf_fmul(
446 ; CHECK-NEXT: [[BO:%.*]] = fmul reassoc <3 x float> [[X:%.*]], <float 1.000000e+00, float 2.000000e+00, float undef>
447 ; CHECK-NEXT: [[R:%.*]] = shufflevector <3 x float> [[BO]], <3 x float> undef, <3 x i32> <i32 undef, i32 1, i32 0>
448 ; CHECK-NEXT: ret <3 x float> [[R]]
450 %bo = fmul reassoc <3 x float> %x, <float 1.0, float 2.0, float 3.0>
451 %r = shufflevector <3 x float> %bo, <3 x float> undef, <3 x i32> <i32 undef, i32 1, i32 0>
455 define <3 x float> @shuf_fdiv_const_op0(<3 x float> %x) {
456 ; CHECK-LABEL: @shuf_fdiv_const_op0(
457 ; CHECK-NEXT: [[BO:%.*]] = fdiv reassoc ninf <3 x float> <float 1.000000e+00, float undef, float 3.000000e+00>, [[X:%.*]]
458 ; CHECK-NEXT: [[R:%.*]] = shufflevector <3 x float> [[BO]], <3 x float> undef, <3 x i32> <i32 undef, i32 0, i32 2>
459 ; CHECK-NEXT: ret <3 x float> [[R]]
461 %bo = fdiv ninf reassoc <3 x float> <float 1.0, float 2.0, float 3.0>, %x
462 %r = shufflevector <3 x float> %bo, <3 x float> undef, <3 x i32> <i32 undef, i32 0, i32 2>
466 define <3 x float> @shuf_fdiv_const_op1(<3 x float> %x) {
467 ; CHECK-LABEL: @shuf_fdiv_const_op1(
468 ; CHECK-NEXT: [[BO:%.*]] = fdiv nnan ninf <3 x float> [[X:%.*]], <float 1.000000e+00, float 2.000000e+00, float undef>
469 ; CHECK-NEXT: [[R:%.*]] = shufflevector <3 x float> [[BO]], <3 x float> undef, <3 x i32> <i32 undef, i32 1, i32 0>
470 ; CHECK-NEXT: ret <3 x float> [[R]]
472 %bo = fdiv ninf nnan <3 x float> %x, <float 1.0, float 2.0, float 3.0>
473 %r = shufflevector <3 x float> %bo, <3 x float> undef, <3 x i32> <i32 undef, i32 1, i32 0>
477 define <3 x float> @shuf_frem_const_op0(<3 x float> %x) {
478 ; CHECK-LABEL: @shuf_frem_const_op0(
479 ; CHECK-NEXT: [[BO:%.*]] = frem nnan <3 x float> <float 1.000000e+00, float undef, float 3.000000e+00>, [[X:%.*]]
480 ; CHECK-NEXT: [[R:%.*]] = shufflevector <3 x float> [[BO]], <3 x float> undef, <3 x i32> <i32 undef, i32 2, i32 0>
481 ; CHECK-NEXT: ret <3 x float> [[R]]
483 %bo = frem nnan <3 x float> <float 1.0, float 2.0, float 3.0>, %x
484 %r = shufflevector <3 x float> %bo, <3 x float> undef, <3 x i32> <i32 undef, i32 2, i32 0>
488 define <3 x float> @shuf_frem_const_op1(<3 x float> %x) {
489 ; CHECK-LABEL: @shuf_frem_const_op1(
490 ; CHECK-NEXT: [[BO:%.*]] = frem reassoc ninf <3 x float> [[X:%.*]], <float undef, float 2.000000e+00, float 3.000000e+00>
491 ; CHECK-NEXT: [[R:%.*]] = shufflevector <3 x float> [[BO]], <3 x float> undef, <3 x i32> <i32 1, i32 undef, i32 2>
492 ; CHECK-NEXT: ret <3 x float> [[R]]
494 %bo = frem ninf reassoc <3 x float> %x, <float 1.0, float 2.0, float 3.0>
495 %r = shufflevector <3 x float> %bo, <3 x float> undef, <3 x i32> <i32 1, i32 undef, i32 2>
499 ;; TODO: getelementptr tests below show missing simplifications for
500 ;; vector demanded elements on vector geps.
502 define i32* @gep_vbase_w_s_idx(<2 x i32*> %base) {
503 ; CHECK-LABEL: @gep_vbase_w_s_idx(
504 ; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, <2 x i32*> [[BASE:%.*]], i64 1
505 ; CHECK-NEXT: [[EE:%.*]] = extractelement <2 x i32*> [[GEP]], i32 1
506 ; CHECK-NEXT: ret i32* [[EE]]
508 %gep = getelementptr i32, <2 x i32*> %base, i64 1
509 %ee = extractelement <2 x i32*> %gep, i32 1
513 define i32* @gep_splat_base_w_s_idx(i32* %base) {
514 ; CHECK-LABEL: @gep_splat_base_w_s_idx(
515 ; CHECK-NEXT: [[BASEVEC2:%.*]] = insertelement <2 x i32*> undef, i32* [[BASE:%.*]], i32 1
516 ; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, <2 x i32*> [[BASEVEC2]], i64 1
517 ; CHECK-NEXT: [[EE:%.*]] = extractelement <2 x i32*> [[GEP]], i32 1
518 ; CHECK-NEXT: ret i32* [[EE]]
520 %basevec1 = insertelement <2 x i32*> undef, i32* %base, i32 0
521 %basevec2 = shufflevector <2 x i32*> %basevec1, <2 x i32*> undef, <2 x i32> zeroinitializer
522 %gep = getelementptr i32, <2 x i32*> %basevec2, i64 1
523 %ee = extractelement <2 x i32*> %gep, i32 1
528 define i32* @gep_splat_base_w_cv_idx(i32* %base) {
529 ; CHECK-LABEL: @gep_splat_base_w_cv_idx(
530 ; CHECK-NEXT: [[BASEVEC2:%.*]] = insertelement <2 x i32*> undef, i32* [[BASE:%.*]], i32 1
531 ; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, <2 x i32*> [[BASEVEC2]], <2 x i64> <i64 undef, i64 1>
532 ; CHECK-NEXT: [[EE:%.*]] = extractelement <2 x i32*> [[GEP]], i32 1
533 ; CHECK-NEXT: ret i32* [[EE]]
535 %basevec1 = insertelement <2 x i32*> undef, i32* %base, i32 0
536 %basevec2 = shufflevector <2 x i32*> %basevec1, <2 x i32*> undef, <2 x i32> zeroinitializer
537 %gep = getelementptr i32, <2 x i32*> %basevec2, <2 x i64> <i64 0, i64 1>
538 %ee = extractelement <2 x i32*> %gep, i32 1
542 define i32* @gep_splat_base_w_vidx(i32* %base, <2 x i64> %idxvec) {
543 ; CHECK-LABEL: @gep_splat_base_w_vidx(
544 ; CHECK-NEXT: [[BASEVEC2:%.*]] = insertelement <2 x i32*> undef, i32* [[BASE:%.*]], i32 1
545 ; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, <2 x i32*> [[BASEVEC2]], <2 x i64> [[IDXVEC:%.*]]
546 ; CHECK-NEXT: [[EE:%.*]] = extractelement <2 x i32*> [[GEP]], i32 1
547 ; CHECK-NEXT: ret i32* [[EE]]
549 %basevec1 = insertelement <2 x i32*> undef, i32* %base, i32 0
550 %basevec2 = shufflevector <2 x i32*> %basevec1, <2 x i32*> undef, <2 x i32> zeroinitializer
551 %gep = getelementptr i32, <2 x i32*> %basevec2, <2 x i64> %idxvec
552 %ee = extractelement <2 x i32*> %gep, i32 1
557 @GLOBAL = internal global i32 zeroinitializer
559 define i32* @gep_cvbase_w_s_idx(<2 x i32*> %base, i64 %raw_addr) {
560 ; CHECK-LABEL: @gep_cvbase_w_s_idx(
561 ; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, <2 x i32*> <i32* undef, i32* @GLOBAL>, i64 [[RAW_ADDR:%.*]]
562 ; CHECK-NEXT: [[EE:%.*]] = extractelement <2 x i32*> [[GEP]], i32 1
563 ; CHECK-NEXT: ret i32* [[EE]]
565 %gep = getelementptr i32, <2 x i32*> <i32* @GLOBAL, i32* @GLOBAL>, i64 %raw_addr
566 %ee = extractelement <2 x i32*> %gep, i32 1
570 define i32* @gep_cvbase_w_cv_idx(<2 x i32*> %base, i64 %raw_addr) {
571 ; CHECK-LABEL: @gep_cvbase_w_cv_idx(
572 ; CHECK-NEXT: ret i32* extractelement (<2 x i32*> getelementptr (i32, <2 x i32*> <i32* @GLOBAL, i32* @GLOBAL>, <2 x i64> <i64 0, i64 1>), i32 1)
574 %gep = getelementptr i32, <2 x i32*> <i32* @GLOBAL, i32* @GLOBAL>, <2 x i64> <i64 0, i64 1>
575 %ee = extractelement <2 x i32*> %gep, i32 1
580 define i32* @gep_sbase_w_cv_idx(i32* %base) {
581 ; CHECK-LABEL: @gep_sbase_w_cv_idx(
582 ; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, i32* [[BASE:%.*]], <2 x i64> <i64 undef, i64 1>
583 ; CHECK-NEXT: [[EE:%.*]] = extractelement <2 x i32*> [[GEP]], i32 1
584 ; CHECK-NEXT: ret i32* [[EE]]
586 %gep = getelementptr i32, i32* %base, <2 x i64> <i64 0, i64 1>
587 %ee = extractelement <2 x i32*> %gep, i32 1
591 define i32* @gep_sbase_w_splat_idx(i32* %base, i64 %idx) {
592 ; CHECK-LABEL: @gep_sbase_w_splat_idx(
593 ; CHECK-NEXT: [[IDXVEC2:%.*]] = insertelement <2 x i64> undef, i64 [[IDX:%.*]], i32 1
594 ; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, i32* [[BASE:%.*]], <2 x i64> [[IDXVEC2]]
595 ; CHECK-NEXT: [[EE:%.*]] = extractelement <2 x i32*> [[GEP]], i32 1
596 ; CHECK-NEXT: ret i32* [[EE]]
598 %idxvec1 = insertelement <2 x i64> undef, i64 %idx, i32 0
599 %idxvec2 = shufflevector <2 x i64> %idxvec1, <2 x i64> undef, <2 x i32> zeroinitializer
600 %gep = getelementptr i32, i32* %base, <2 x i64> %idxvec2
601 %ee = extractelement <2 x i32*> %gep, i32 1
604 define i32* @gep_splat_both(i32* %base, i64 %idx) {
605 ; CHECK-LABEL: @gep_splat_both(
606 ; CHECK-NEXT: [[BASEVEC2:%.*]] = insertelement <2 x i32*> undef, i32* [[BASE:%.*]], i32 1
607 ; CHECK-NEXT: [[IDXVEC2:%.*]] = insertelement <2 x i64> undef, i64 [[IDX:%.*]], i32 1
608 ; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, <2 x i32*> [[BASEVEC2]], <2 x i64> [[IDXVEC2]]
609 ; CHECK-NEXT: [[EE:%.*]] = extractelement <2 x i32*> [[GEP]], i32 1
610 ; CHECK-NEXT: ret i32* [[EE]]
612 %basevec1 = insertelement <2 x i32*> undef, i32* %base, i32 0
613 %basevec2 = shufflevector <2 x i32*> %basevec1, <2 x i32*> undef, <2 x i32> zeroinitializer
614 %idxvec1 = insertelement <2 x i64> undef, i64 %idx, i32 0
615 %idxvec2 = shufflevector <2 x i64> %idxvec1, <2 x i64> undef, <2 x i32> zeroinitializer
616 %gep = getelementptr i32, <2 x i32*> %basevec2, <2 x i64> %idxvec2
617 %ee = extractelement <2 x i32*> %gep, i32 1
621 define <2 x i32*> @gep_all_lanes_undef(i32* %base, i64 %idx) {;
622 ; CHECK-LABEL: @gep_all_lanes_undef(
623 ; CHECK-NEXT: ret <2 x i32*> undef
625 %basevec = insertelement <2 x i32*> undef, i32* %base, i32 0
626 %idxvec = insertelement <2 x i64> undef, i64 %idx, i32 1
627 %gep = getelementptr i32, <2 x i32*> %basevec, <2 x i64> %idxvec
631 define i32* @gep_demanded_lane_undef(i32* %base, i64 %idx) {
632 ; CHECK-LABEL: @gep_demanded_lane_undef(
633 ; CHECK-NEXT: ret i32* undef
635 %basevec = insertelement <2 x i32*> undef, i32* %base, i32 0
636 %idxvec = insertelement <2 x i64> undef, i64 %idx, i32 1
637 %gep = getelementptr i32, <2 x i32*> %basevec, <2 x i64> %idxvec
638 %ee = extractelement <2 x i32*> %gep, i32 1
643 ;; LangRef has an odd quirk around FCAs which make it illegal to use undef
645 define i32* @PR41624(<2 x { i32, i32 }*> %a) {
646 ; CHECK-LABEL: @PR41624(
647 ; CHECK-NEXT: %w = getelementptr { i32, i32 }, <2 x { i32, i32 }*> %a, <2 x i64> <i64 5, i64 5>, <2 x i32> zeroinitializer
648 ; CHECK-NEXT: %r = extractelement <2 x i32*> %w, i32 0
649 ; CHECK-NEXT: ret i32* %r
650 %w = getelementptr { i32, i32 }, <2 x { i32, i32 }*> %a, <2 x i64> <i64 5, i64 5>, <2 x i32> zeroinitializer
651 %r = extractelement <2 x i32*> %w, i32 0