2 ; RUN: opt < %s -loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -instcombine -debug-only=loop-vectorize -disable-output -print-after=instcombine 2>&1 | FileCheck %s
3 ; RUN: opt < %s -loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -enable-interleaved-mem-accesses -instcombine -debug-only=loop-vectorize -disable-output -print-after=instcombine 2>&1 | FileCheck %s --check-prefix=INTER
5 target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
7 %pair = type { i32, i32 }
9 ; CHECK-LABEL: consecutive_ptr_forward
11 ; Check that a forward consecutive pointer is recognized as uniform and remains
12 ; uniform after vectorization.
14 ; CHECK: LV: Found uniform instruction: %tmp1 = getelementptr inbounds i32, i32* %a, i64 %i
16 ; CHECK: %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
17 ; CHECK-NOT: getelementptr
18 ; CHECK: getelementptr inbounds i32, i32* %a, i64 %index
19 ; CHECK-NOT: getelementptr
20 ; CHECK: br i1 {{.*}}, label %middle.block, label %vector.body
22 define i32 @consecutive_ptr_forward(i32* %a, i64 %n) {
27 %i = phi i64 [ %i.next, %for.body ], [ 0, %entry ]
28 %tmp0 = phi i32 [ %tmp3, %for.body ], [ 0, %entry ]
29 %tmp1 = getelementptr inbounds i32, i32* %a, i64 %i
30 %tmp2 = load i32, i32* %tmp1, align 8
31 %tmp3 = add i32 %tmp0, %tmp2
32 %i.next = add nuw nsw i64 %i, 1
33 %cond = icmp slt i64 %i.next, %n
34 br i1 %cond, label %for.body, label %for.end
37 %tmp4 = phi i32 [ %tmp3, %for.body ]
41 ; CHECK-LABEL: consecutive_ptr_reverse
43 ; Check that a reverse consecutive pointer is recognized as uniform and remains
44 ; uniform after vectorization.
46 ; CHECK: LV: Found uniform instruction: %tmp1 = getelementptr inbounds i32, i32* %a, i64 %i
48 ; CHECK: %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
49 ; CHECK: %offset.idx = sub i64 %n, %index
50 ; CHECK-NOT: getelementptr
51 ; CHECK: %[[G0:.+]] = getelementptr inbounds i32, i32* %a, i64 -3
52 ; CHECK: getelementptr inbounds i32, i32* %[[G0]], i64 %offset.idx
53 ; CHECK-NOT: getelementptr
54 ; CHECK: br i1 {{.*}}, label %middle.block, label %vector.body
56 define i32 @consecutive_ptr_reverse(i32* %a, i64 %n) {
61 %i = phi i64 [ %i.next, %for.body ], [ %n, %entry ]
62 %tmp0 = phi i32 [ %tmp3, %for.body ], [ 0, %entry ]
63 %tmp1 = getelementptr inbounds i32, i32* %a, i64 %i
64 %tmp2 = load i32, i32* %tmp1, align 8
65 %tmp3 = add i32 %tmp0, %tmp2
66 %i.next = add nuw nsw i64 %i, -1
67 %cond = icmp sgt i64 %i.next, 0
68 br i1 %cond, label %for.body, label %for.end
71 %tmp4 = phi i32 [ %tmp3, %for.body ]
75 ; CHECK-LABEL: interleaved_access_forward
76 ; INTER-LABEL: interleaved_access_forward
78 ; Check that a consecutive-like pointer used by a forward interleaved group is
79 ; recognized as uniform and remains uniform after vectorization. When
80 ; interleaved memory accesses aren't enabled, the pointer should not be
81 ; recognized as uniform, and it should not be uniform after vectorization.
83 ; CHECK-NOT: LV: Found uniform instruction: %tmp1 = getelementptr inbounds %pair, %pair* %p, i64 %i, i32 0
84 ; CHECK-NOT: LV: Found uniform instruction: %tmp2 = getelementptr inbounds %pair, %pair* %p, i64 %i, i32 1
86 ; CHECK: %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
87 ; CHECK: %[[I1:.+]] = or i64 %index, 1
88 ; CHECK: %[[I2:.+]] = or i64 %index, 2
89 ; CHECK: %[[I3:.+]] = or i64 %index, 3
90 ; CHECK: getelementptr inbounds %pair, %pair* %p, i64 %index, i32 0
91 ; CHECK: getelementptr inbounds %pair, %pair* %p, i64 %[[I1]], i32 0
92 ; CHECK: getelementptr inbounds %pair, %pair* %p, i64 %[[I2]], i32 0
93 ; CHECK: getelementptr inbounds %pair, %pair* %p, i64 %[[I3]], i32 0
94 ; CHECK: getelementptr inbounds %pair, %pair* %p, i64 %index, i32 1
95 ; CHECK: getelementptr inbounds %pair, %pair* %p, i64 %[[I1]], i32 1
96 ; CHECK: getelementptr inbounds %pair, %pair* %p, i64 %[[I2]], i32 1
97 ; CHECK: getelementptr inbounds %pair, %pair* %p, i64 %[[I3]], i32 1
98 ; CHECK: br i1 {{.*}}, label %middle.block, label %vector.body
100 ; INTER: LV: Found uniform instruction: %tmp1 = getelementptr inbounds %pair, %pair* %p, i64 %i, i32 0
101 ; INTER: LV: Found uniform instruction: %tmp2 = getelementptr inbounds %pair, %pair* %p, i64 %i, i32 1
103 ; INTER: %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
104 ; INTER-NOT: getelementptr
105 ; INTER: getelementptr inbounds %pair, %pair* %p, i64 %index, i32 0
106 ; INTER-NOT: getelementptr
107 ; INTER: br i1 {{.*}}, label %middle.block, label %vector.body
109 define i32 @interleaved_access_forward(%pair* %p, i64 %n) {
114 %i = phi i64 [ %i.next, %for.body ], [ 0, %entry ]
115 %tmp0 = phi i32 [ %tmp6, %for.body ], [ 0, %entry ]
116 %tmp1 = getelementptr inbounds %pair, %pair* %p, i64 %i, i32 0
117 %tmp2 = getelementptr inbounds %pair, %pair* %p, i64 %i, i32 1
118 %tmp3 = load i32, i32* %tmp1, align 8
119 %tmp4 = load i32, i32* %tmp2, align 8
120 %tmp5 = add i32 %tmp3, %tmp4
121 %tmp6 = add i32 %tmp0, %tmp5
122 %i.next = add nuw nsw i64 %i, 1
123 %cond = icmp slt i64 %i.next, %n
124 br i1 %cond, label %for.body, label %for.end
127 %tmp14 = phi i32 [ %tmp6, %for.body ]
131 ; CHECK-LABEL: interleaved_access_reverse
132 ; INTER-LABEL: interleaved_access_reverse
134 ; Check that a consecutive-like pointer used by a reverse interleaved group is
135 ; recognized as uniform and remains uniform after vectorization. When
136 ; interleaved memory accesses aren't enabled, the pointer should not be
137 ; recognized as uniform, and it should not be uniform after vectorization.
139 ; recognized as uniform, and it should not be uniform after vectorization.
140 ; CHECK-NOT: LV: Found uniform instruction: %tmp1 = getelementptr inbounds %pair, %pair* %p, i64 %i, i32 0
141 ; CHECK-NOT: LV: Found uniform instruction: %tmp2 = getelementptr inbounds %pair, %pair* %p, i64 %i, i32 1
143 ; CHECK: %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
144 ; CHECK: %offset.idx = sub i64 %n, %index
145 ; CHECK: %[[I1:.+]] = add i64 %offset.idx, -1
146 ; CHECK: %[[I2:.+]] = add i64 %offset.idx, -2
147 ; CHECK: %[[I3:.+]] = add i64 %offset.idx, -3
148 ; CHECK: getelementptr inbounds %pair, %pair* %p, i64 %offset.idx, i32 0
149 ; CHECK: getelementptr inbounds %pair, %pair* %p, i64 %[[I1]], i32 0
150 ; CHECK: getelementptr inbounds %pair, %pair* %p, i64 %[[I2]], i32 0
151 ; CHECK: getelementptr inbounds %pair, %pair* %p, i64 %[[I3]], i32 0
152 ; CHECK: getelementptr inbounds %pair, %pair* %p, i64 %offset.idx, i32 1
153 ; CHECK: getelementptr inbounds %pair, %pair* %p, i64 %[[I1]], i32 1
154 ; CHECK: getelementptr inbounds %pair, %pair* %p, i64 %[[I2]], i32 1
155 ; CHECK: getelementptr inbounds %pair, %pair* %p, i64 %[[I3]], i32 1
156 ; CHECK: br i1 {{.*}}, label %middle.block, label %vector.body
158 ; INTER: LV: Found uniform instruction: %tmp1 = getelementptr inbounds %pair, %pair* %p, i64 %i, i32 0
159 ; INTER: LV: Found uniform instruction: %tmp2 = getelementptr inbounds %pair, %pair* %p, i64 %i, i32 1
161 ; INTER: %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
162 ; INTER: %offset.idx = sub i64 %n, %index
163 ; INTER-NOT: getelementptr
164 ; INTER: %[[G0:.+]] = getelementptr inbounds %pair, %pair* %p, i64 %offset.idx, i32 0
165 ; INTER: getelementptr inbounds i32, i32* %[[G0]], i64 -6
166 ; INTER-NOT: getelementptr
167 ; INTER: br i1 {{.*}}, label %middle.block, label %vector.body
169 define i32 @interleaved_access_reverse(%pair* %p, i64 %n) {
174 %i = phi i64 [ %i.next, %for.body ], [ %n, %entry ]
175 %tmp0 = phi i32 [ %tmp6, %for.body ], [ 0, %entry ]
176 %tmp1 = getelementptr inbounds %pair, %pair* %p, i64 %i, i32 0
177 %tmp2 = getelementptr inbounds %pair, %pair* %p, i64 %i, i32 1
178 %tmp3 = load i32, i32* %tmp1, align 8
179 %tmp4 = load i32, i32* %tmp2, align 8
180 %tmp5 = add i32 %tmp3, %tmp4
181 %tmp6 = add i32 %tmp0, %tmp5
182 %i.next = add nuw nsw i64 %i, -1
183 %cond = icmp sgt i64 %i.next, 0
184 br i1 %cond, label %for.body, label %for.end
187 %tmp14 = phi i32 [ %tmp6, %for.body ]
191 ; INTER-LABEL: predicated_store
193 ; Check that a consecutive-like pointer used by a forward interleaved group and
194 ; scalarized store is not recognized as uniform and is not uniform after
195 ; vectorization. The store is scalarized because it's in a predicated block.
196 ; Even though the load in this example is vectorized and only uses the pointer
197 ; as if it were uniform, the store is scalarized, making the pointer
200 ; INTER-NOT: LV: Found uniform instruction: %tmp0 = getelementptr inbounds %pair, %pair* %p, i64 %i, i32 0
202 ; INTER: %index = phi i64 [ 0, %vector.ph ], [ %index.next, {{.*}} ]
203 ; INTER: %[[G0:.+]] = getelementptr inbounds %pair, %pair* %p, i64 %index, i32 0
204 ; INTER: %[[B0:.+]] = bitcast i32* %[[G0]] to <8 x i32>*
205 ; INTER: %wide.vec = load <8 x i32>, <8 x i32>* %[[B0]], align 8
206 ; INTER: %[[I1:.+]] = or i64 %index, 1
207 ; INTER: getelementptr inbounds %pair, %pair* %p, i64 %[[I1]], i32 0
208 ; INTER: %[[I2:.+]] = or i64 %index, 2
209 ; INTER: getelementptr inbounds %pair, %pair* %p, i64 %[[I2]], i32 0
210 ; INTER: %[[I3:.+]] = or i64 %index, 3
211 ; INTER: getelementptr inbounds %pair, %pair* %p, i64 %[[I3]], i32 0
212 ; INTER: br i1 {{.*}}, label %middle.block, label %vector.body
214 define void @predicated_store(%pair *%p, i32 %x, i64 %n) {
219 %i = phi i64 [ %i.next, %if.merge ], [ 0, %entry ]
220 %tmp0 = getelementptr inbounds %pair, %pair* %p, i64 %i, i32 0
221 %tmp1 = load i32, i32* %tmp0, align 8
222 %tmp2 = icmp eq i32 %tmp1, %x
223 br i1 %tmp2, label %if.then, label %if.merge
226 store i32 %tmp1, i32* %tmp0, align 8
230 %i.next = add nuw nsw i64 %i, 1
231 %cond = icmp slt i64 %i.next, %n
232 br i1 %cond, label %for.body, label %for.end
238 ; CHECK-LABEL: irregular_type
240 ; Check that a consecutive pointer used by a scalarized store is not recognized
241 ; as uniform and is not uniform after vectorization. The store is scalarized
242 ; because the stored type may required padding.
244 ; CHECK-NOT: LV: Found uniform instruction: %tmp1 = getelementptr inbounds x86_fp80, x86_fp80* %a, i64 %i
246 ; CHECK: %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
247 ; CHECK: %[[I1:.+]] = or i64 %index, 1
248 ; CHECK: %[[I2:.+]] = or i64 %index, 2
249 ; CHECK: %[[I3:.+]] = or i64 %index, 3
250 ; CHECK: getelementptr inbounds x86_fp80, x86_fp80* %a, i64 %index
251 ; CHECK: getelementptr inbounds x86_fp80, x86_fp80* %a, i64 %[[I1]]
252 ; CHECK: getelementptr inbounds x86_fp80, x86_fp80* %a, i64 %[[I2]]
253 ; CHECK: getelementptr inbounds x86_fp80, x86_fp80* %a, i64 %[[I3]]
254 ; CHECK: br i1 {{.*}}, label %middle.block, label %vector.body
256 define void @irregular_type(x86_fp80* %a, i64 %n) {
261 %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ]
262 %tmp0 = sitofp i32 1 to x86_fp80
263 %tmp1 = getelementptr inbounds x86_fp80, x86_fp80* %a, i64 %i
264 store x86_fp80 %tmp0, x86_fp80* %tmp1, align 16
265 %i.next = add i64 %i, 1
266 %cond = icmp slt i64 %i.next, %n
267 br i1 %cond, label %for.body, label %for.end
273 ; CHECK-LABEL: pointer_iv_uniform
275 ; Check that a pointer induction variable is recognized as uniform and remains
276 ; uniform after vectorization.
278 ; CHECK: LV: Found uniform instruction: %p = phi i32* [ %tmp03, %for.body ], [ %a, %entry ]
280 ; CHECK: %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
281 ; CHECK-NOT: getelementptr
282 ; CHECK: %next.gep = getelementptr i32, i32* %a, i64 %index
283 ; CHECK-NOT: getelementptr
284 ; CHECK: br i1 {{.*}}, label %middle.block, label %vector.body
286 define void @pointer_iv_uniform(i32* %a, i32 %x, i64 %n) {
291 %i = phi i64 [ %i.next, %for.body ], [ 0, %entry ]
292 %p = phi i32* [ %tmp03, %for.body ], [ %a, %entry ]
293 store i32 %x, i32* %p, align 8
294 %tmp03 = getelementptr inbounds i32, i32* %p, i32 1
295 %i.next = add nuw nsw i64 %i, 1
296 %cond = icmp slt i64 %i.next, %n
297 br i1 %cond, label %for.body, label %for.end
303 ; INTER-LABEL: pointer_iv_non_uniform_0
305 ; Check that a pointer induction variable with a non-uniform user is not
306 ; recognized as uniform and is not uniform after vectorization. The pointer
307 ; induction variable is used by getelementptr instructions that are non-uniform
308 ; due to scalarization of the stores.
310 ; INTER-NOT: LV: Found uniform instruction: %p = phi i32* [ %tmp03, %for.body ], [ %a, %entry ]
312 ; INTER: %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
313 ; INTER: %[[I0:.+]] = shl i64 %index, 2
314 ; INTER: %next.gep = getelementptr i32, i32* %a, i64 %[[I0]]
315 ; INTER: %[[S1:.+]] = shl i64 %index, 2
316 ; INTER: %[[I1:.+]] = or i64 %[[S1]], 4
317 ; INTER: %next.gep2 = getelementptr i32, i32* %a, i64 %[[I1]]
318 ; INTER: %[[S2:.+]] = shl i64 %index, 2
319 ; INTER: %[[I2:.+]] = or i64 %[[S2]], 8
320 ; INTER: %next.gep3 = getelementptr i32, i32* %a, i64 %[[I2]]
321 ; INTER: %[[S3:.+]] = shl i64 %index, 2
322 ; INTER: %[[I3:.+]] = or i64 %[[S3]], 12
323 ; INTER: %next.gep4 = getelementptr i32, i32* %a, i64 %[[I3]]
324 ; INTER: br i1 {{.*}}, label %middle.block, label %vector.body
326 define void @pointer_iv_non_uniform_0(i32* %a, i64 %n) {
331 %i = phi i64 [ %i.next, %for.body ], [ 0, %entry ]
332 %p = phi i32* [ %tmp03, %for.body ], [ %a, %entry ]
333 %tmp00 = load i32, i32* %p, align 8
334 %tmp01 = getelementptr inbounds i32, i32* %p, i32 1
335 %tmp02 = load i32, i32* %tmp01, align 8
336 %tmp03 = getelementptr inbounds i32, i32* %p, i32 4
337 %tmp04 = load i32, i32* %tmp03, align 8
338 %tmp05 = getelementptr inbounds i32, i32* %p, i32 5
339 %tmp06 = load i32, i32* %tmp05, align 8
340 %tmp07 = sub i32 %tmp04, %tmp00
341 %tmp08 = sub i32 %tmp02, %tmp02
342 %tmp09 = getelementptr inbounds i32, i32* %p, i32 2
343 store i32 %tmp07, i32* %tmp09, align 8
344 %tmp10 = getelementptr inbounds i32, i32* %p, i32 3
345 store i32 %tmp08, i32* %tmp10, align 8
346 %i.next = add nuw nsw i64 %i, 1
347 %cond = icmp slt i64 %i.next, %n
348 br i1 %cond, label %for.body, label %for.end
354 ; CHECK-LABEL: pointer_iv_non_uniform_1
356 ; Check that a pointer induction variable with a non-uniform user is not
357 ; recognized as uniform and is not uniform after vectorization. The pointer
358 ; induction variable is used by a store that will be scalarized.
360 ; CHECK-NOT: LV: Found uniform instruction: %p = phi x86_fp80* [%tmp1, %for.body], [%a, %entry]
362 ; CHECK: %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
363 ; CHECK: %next.gep = getelementptr x86_fp80, x86_fp80* %a, i64 %index
364 ; CHECK: %[[I1:.+]] = or i64 %index, 1
365 ; CHECK: %next.gep2 = getelementptr x86_fp80, x86_fp80* %a, i64 %[[I1]]
366 ; CHECK: %[[I2:.+]] = or i64 %index, 2
367 ; CHECK: %next.gep3 = getelementptr x86_fp80, x86_fp80* %a, i64 %[[I2]]
368 ; CHECK: %[[I3:.+]] = or i64 %index, 3
369 ; CHECK: %next.gep4 = getelementptr x86_fp80, x86_fp80* %a, i64 %[[I3]]
370 ; CHECK: br i1 {{.*}}, label %middle.block, label %vector.body
372 define void @pointer_iv_non_uniform_1(x86_fp80* %a, i64 %n) {
377 %i = phi i64 [ %i.next, %for.body ], [ 0, %entry ]
378 %p = phi x86_fp80* [%tmp1, %for.body], [%a, %entry]
379 %tmp0 = sitofp i32 1 to x86_fp80
380 store x86_fp80 %tmp0, x86_fp80* %p, align 16
381 %tmp1 = getelementptr inbounds x86_fp80, x86_fp80* %p, i32 1
382 %i.next = add i64 %i, 1
383 %cond = icmp slt i64 %i.next, %n
384 br i1 %cond, label %for.body, label %for.end
390 ; CHECK-LABEL: pointer_iv_mixed
392 ; Check multiple pointer induction variables where only one is recognized as
393 ; uniform and remains uniform after vectorization. The other pointer induction
394 ; variable is not recognized as uniform and is not uniform after vectorization
395 ; because it is stored to memory.
397 ; CHECK-NOT: LV: Found uniform instruction: %p = phi i32* [ %tmp3, %for.body ], [ %a, %entry ]
398 ; CHECK: LV: Found uniform instruction: %q = phi i32** [ %tmp4, %for.body ], [ %b, %entry ]
400 ; CHECK: %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
401 ; CHECK: %next.gep = getelementptr i32, i32* %a, i64 %index
402 ; CHECK: %[[I1:.+]] = or i64 %index, 1
403 ; CHECK: %next.gep10 = getelementptr i32, i32* %a, i64 %[[I1]]
404 ; CHECK: %[[I2:.+]] = or i64 %index, 2
405 ; CHECK: %next.gep11 = getelementptr i32, i32* %a, i64 %[[I2]]
406 ; CHECK: %[[I3:.+]] = or i64 %index, 3
407 ; CHECK: %next.gep12 = getelementptr i32, i32* %a, i64 %[[I3]]
408 ; CHECK: %[[V0:.+]] = insertelement <4 x i32*> undef, i32* %next.gep, i32 0
409 ; CHECK: %[[V1:.+]] = insertelement <4 x i32*> %[[V0]], i32* %next.gep10, i32 1
410 ; CHECK: %[[V2:.+]] = insertelement <4 x i32*> %[[V1]], i32* %next.gep11, i32 2
411 ; CHECK: %[[V3:.+]] = insertelement <4 x i32*> %[[V2]], i32* %next.gep12, i32 3
412 ; CHECK-NOT: getelementptr
413 ; CHECK: %next.gep13 = getelementptr i32*, i32** %b, i64 %index
414 ; CHECK-NOT: getelementptr
415 ; CHECK: %[[B0:.+]] = bitcast i32** %next.gep13 to <4 x i32*>*
416 ; CHECK: store <4 x i32*> %[[V3]], <4 x i32*>* %[[B0]], align 8
417 ; CHECK: br i1 {{.*}}, label %middle.block, label %vector.body
419 define i32 @pointer_iv_mixed(i32* %a, i32** %b, i64 %n) {
424 %i = phi i64 [ %i.next, %for.body ], [ 0, %entry ]
425 %p = phi i32* [ %tmp3, %for.body ], [ %a, %entry ]
426 %q = phi i32** [ %tmp4, %for.body ], [ %b, %entry ]
427 %tmp0 = phi i32 [ %tmp2, %for.body ], [ 0, %entry ]
428 %tmp1 = load i32, i32* %p, align 8
429 %tmp2 = add i32 %tmp1, %tmp0
430 store i32* %p, i32** %q, align 8
431 %tmp3 = getelementptr inbounds i32, i32* %p, i32 1
432 %tmp4 = getelementptr inbounds i32*, i32** %q, i32 1
433 %i.next = add nuw nsw i64 %i, 1
434 %cond = icmp slt i64 %i.next, %n
435 br i1 %cond, label %for.body, label %for.end
438 %tmp5 = phi i32 [ %tmp2, %for.body ]
442 ; INTER-LABEL: bitcast_pointer_operand
444 ; Check that a pointer operand having a user other than a memory access is
445 ; recognized as uniform after vectorization. In this test case, %tmp1 is a
446 ; bitcast that is used by a load and a getelementptr instruction (%tmp2). Once
447 ; %tmp2 is marked uniform, %tmp1 should be marked uniform as well.
449 ; INTER: LV: Found uniform instruction: %cond = icmp slt i64 %i.next, %n
450 ; INTER-NEXT: LV: Found uniform instruction: %tmp2 = getelementptr inbounds i8, i8* %tmp1, i64 3
451 ; INTER-NEXT: LV: Found uniform instruction: %tmp6 = getelementptr inbounds i8, i8* %B, i64 %i
452 ; INTER-NEXT: LV: Found uniform instruction: %tmp1 = bitcast i64* %tmp0 to i8*
453 ; INTER-NEXT: LV: Found uniform instruction: %tmp0 = getelementptr inbounds i64, i64* %A, i64 %i
454 ; INTER-NEXT: LV: Found uniform instruction: %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ]
455 ; INTER-NEXT: LV: Found uniform instruction: %i.next = add nuw nsw i64 %i, 1
456 ; INTER: vector.body:
457 ; INTER-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %vector.ph ], [ [[INDEX_NEXT:%.*]], %vector.body ]
458 ; INTER-NEXT: [[TMP4:%.*]] = getelementptr inbounds i64, i64* %A, i64 [[INDEX]]
459 ; INTER-NEXT: [[TMP5:%.*]] = bitcast i64* [[TMP4]] to <32 x i8>*
460 ; INTER-NEXT: [[WIDE_VEC:%.*]] = load <32 x i8>, <32 x i8>* [[TMP5]], align 1
461 ; INTER-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <32 x i8> [[WIDE_VEC]], <32 x i8> undef, <4 x i32> <i32 0, i32 8, i32 16, i32 24>
462 ; INTER-NEXT: [[STRIDED_VEC5:%.*]] = shufflevector <32 x i8> [[WIDE_VEC]], <32 x i8> undef, <4 x i32> <i32 3, i32 11, i32 19, i32 27>
463 ; INTER-NEXT: [[TMP6:%.*]] = xor <4 x i8> [[STRIDED_VEC5]], [[STRIDED_VEC]]
464 ; INTER-NEXT: [[TMP7:%.*]] = getelementptr inbounds i8, i8* %B, i64 [[INDEX]]
465 ; INTER-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to <4 x i8>*
466 ; INTER-NEXT: store <4 x i8> [[TMP6]], <4 x i8>* [[TMP8]], align 1
467 ; INTER-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4
468 ; INTER: br i1 {{.*}}, label %middle.block, label %vector.body
470 define void @bitcast_pointer_operand(i64* %A, i8* %B, i64 %n) {
475 %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ]
476 %tmp0 = getelementptr inbounds i64, i64* %A, i64 %i
477 %tmp1 = bitcast i64* %tmp0 to i8*
478 %tmp2 = getelementptr inbounds i8, i8* %tmp1, i64 3
479 %tmp3 = load i8, i8* %tmp2, align 1
480 %tmp4 = load i8, i8* %tmp1, align 1
481 %tmp5 = xor i8 %tmp3, %tmp4
482 %tmp6 = getelementptr inbounds i8, i8* %B, i64 %i
483 store i8 %tmp5, i8* %tmp6
484 %i.next = add nuw nsw i64 %i, 1
485 %cond = icmp slt i64 %i.next, %n
486 br i1 %cond, label %for.body, label %for.end