1 ; RUN: not opt -verify -S < %s 2>&1 | FileCheck %s
5 ; CHECK: Intrinsic has incorrect return type
6 ; CHECK-NEXT: llvm.aarch64.neon.ld2.v4i32
7 define { <4 x i64>, <4 x i32> } @test_ld2_ret(<4 x i32>* %ptr) {
8 %res = call { <4 x i64>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32(<4 x i32>* %ptr)
9 ret{ <4 x i64>, <4 x i32> } %res
11 declare { <4 x i64>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32(<4 x i32>* %ptr)
13 ; CHECK: Intrinsic has incorrect return type
14 ; CHECK-NEXT: llvm.aarch64.neon.ld2lane.v4i64
15 define { <4 x i64>, <4 x i32> } @test_ld2lane_ret(i8* %ptr, <4 x i64> %a, <4 x i64> %b) {
16 %res = call { <4 x i64>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i64(<4 x i64> %a, <4 x i64> %b, i64 0, i8* %ptr)
17 ret{ <4 x i64>, <4 x i32> } %res
19 declare { <4 x i64>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i64(<4 x i64>, <4 x i64>, i64, i8*)
21 ; CHECK: Intrinsic has incorrect argument type
22 ; CHECK-NEXT: llvm.aarch64.neon.ld2lane.v4i32
23 define { <4 x i32>, <4 x i32> } @test_ld2lane_arg(i8* %ptr, <4 x i64> %a, <4 x i32> %b) {
24 %res = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i32(<4 x i64> %a, <4 x i32> %b, i64 0, i8* %ptr)
25 ret{ <4 x i32>, <4 x i32> } %res
27 declare { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i32(<4 x i64>, <4 x i32>, i64, i8*)
31 ; CHECK: Intrinsic has incorrect return type
32 ; CHECK-NEXT: llvm.aarch64.neon.ld3.v4i32
33 define { <4 x i32>, <4 x i64>, <4 x i32> } @test_ld3_ret(<4 x i32>* %ptr) {
34 %res = call { <4 x i32>, <4 x i64>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32(<4 x i32>* %ptr)
35 ret{ <4 x i32>, <4 x i64>, <4 x i32> } %res
37 declare { <4 x i32>, <4 x i64>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32(<4 x i32>* %ptr)
39 ; CHECK: Intrinsic has incorrect return type
40 ; CHECK-NEXT: llvm.aarch64.neon.ld3lane.v4i64
41 define { <4 x i64>, <4 x i32>, <4 x i64> } @test_ld3lane_ret(i8* %ptr, <4 x i64> %a, <4 x i64> %b, <4 x i64> %c) {
42 %res = call { <4 x i64>, <4 x i32>, <4 x i64> } @llvm.aarch64.neon.ld3lane.v4i64(<4 x i64> %a, <4 x i64> %b, <4 x i64> %c, i64 0, i8* %ptr)
43 ret{ <4 x i64>, <4 x i32>, <4 x i64> } %res
45 declare { <4 x i64>, <4 x i32>, <4 x i64> } @llvm.aarch64.neon.ld3lane.v4i64(<4 x i64>, <4 x i64>, <4 x i64>, i64, i8*)
47 ; CHECK: Intrinsic has incorrect argument type
48 ; CHECK-NEXT: llvm.aarch64.neon.ld3lane.v4i32
49 define { <4 x i32>, <4 x i32>, <4 x i32> } @test_ld3lane_arg(i8* %ptr, <4 x i64> %a, <4 x i32> %b, <4 x i32> %c) {
50 %res = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3lane.v4i32(<4 x i64> %a, <4 x i32> %b, <4 x i32> %c, i64 0, i8* %ptr)
51 ret{ <4 x i32>, <4 x i32>, <4 x i32> } %res
53 declare { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3lane.v4i32(<4 x i64>, <4 x i32>, <4 x i32>, i64, i8*)
57 ; CHECK: Intrinsic has incorrect return type
58 ; CHECK-NEXT: llvm.aarch64.neon.ld4.v4i32
59 define { <4 x i32>, <4 x i32>, <4 x i64>, <4 x i32> } @test_ld4_ret(<4 x i32>* %ptr) {
60 %res = call { <4 x i32>, <4 x i32>, <4 x i64>, <4 x i32> } @llvm.aarch64.neon.ld4.v4i32(<4 x i32>* %ptr)
61 ret{ <4 x i32>, <4 x i32>, <4 x i64>, <4 x i32> } %res
63 declare { <4 x i32>, <4 x i32>, <4 x i64>, <4 x i32> } @llvm.aarch64.neon.ld4.v4i32(<4 x i32>* %ptr)
65 ; CHECK: Intrinsic has incorrect return type
66 ; CHECK-NEXT: llvm.aarch64.neon.ld4lane.v4i64
67 define { <4 x i64>, <4 x i64>, <4 x i32>, <4 x i64> } @test_ld4lane_ret(i8* %ptr, <4 x i64> %a, <4 x i64> %b, <4 x i64> %c, <4 x i64> %d) {
68 %res = call { <4 x i64>, <4 x i64>, <4 x i32>, <4 x i64> } @llvm.aarch64.neon.ld4lane.v4i64(<4 x i64> %a, <4 x i64> %b, <4 x i64> %c, <4 x i64> %d, i64 0, i8* %ptr)
69 ret{ <4 x i64>, <4 x i64>, <4 x i32>, <4 x i64> } %res
71 declare { <4 x i64>, <4 x i64>, <4 x i32>, <4 x i64> } @llvm.aarch64.neon.ld4lane.v4i64(<4 x i64>, <4 x i64>, <4 x i64>, <4 x i64>, i64, i8*)
73 ; CHECK: Intrinsic has incorrect argument type
74 ; CHECK-NEXT: llvm.aarch64.neon.ld4lane.v4i32
75 define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_ld4lane_arg(i8* %ptr, <4 x i64> %a, <4 x i32> %b, <4 x i32> %c, <4 x i32> %d) {
76 %res = call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4lane.v4i32(<4 x i64> %a, <4 x i32> %b, <4 x i32> %c, <4 x i32> %d, i64 0, i8* %ptr)
77 ret{ <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } %res
79 declare { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4lane.v4i32(<4 x i64>, <4 x i32>, <4 x i32>, <4 x i32>, i64, i8*)