[ARM] MVE integer min and max
[llvm-core.git] / lib / Target / RISCV / RISCV.h
blob834a1d17114359726babb684fc6b17404a5eb288
1 //===-- RISCV.h - Top-level interface for RISCV -----------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the entry points for global functions defined in the LLVM
10 // RISC-V back-end.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_RISCV_RISCV_H
15 #define LLVM_LIB_TARGET_RISCV_RISCV_H
17 #include "Utils/RISCVBaseInfo.h"
18 #include "llvm/Target/TargetMachine.h"
20 namespace llvm {
21 class RISCVTargetMachine;
22 class AsmPrinter;
23 class FunctionPass;
24 class MCInst;
25 class MCOperand;
26 class MachineInstr;
27 class MachineOperand;
28 class PassRegistry;
30 void LowerRISCVMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
31 const AsmPrinter &AP);
32 bool LowerRISCVMachineOperandToMCOperand(const MachineOperand &MO,
33 MCOperand &MCOp, const AsmPrinter &AP);
35 FunctionPass *createRISCVISelDag(RISCVTargetMachine &TM);
37 FunctionPass *createRISCVMergeBaseOffsetOptPass();
38 void initializeRISCVMergeBaseOffsetOptPass(PassRegistry &);
40 FunctionPass *createRISCVExpandPseudoPass();
41 void initializeRISCVExpandPseudoPass(PassRegistry &);
44 #endif