tools/llvm-exegesis/lib/RegisterAliasing.cpp

   1 //===-- RegisterAliasing.cpp ------------------------------------*- C++ -*-===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8
   9 #include "RegisterAliasing.h"
  10
  11 namespace llvm {
  12 namespace exegesis {
  13
  14 llvm::BitVector getAliasedBits(const llvm::MCRegisterInfo &RegInfo,
  15                                const llvm::BitVector &SourceBits) {
  16   llvm::BitVector AliasedBits(RegInfo.getNumRegs());
  17   for (const size_t PhysReg : SourceBits.set_bits()) {
  18     using RegAliasItr = llvm::MCRegAliasIterator;
  19     for (auto Itr = RegAliasItr(PhysReg, &RegInfo, true); Itr.isValid();
  20          ++Itr) {
  21       AliasedBits.set(*Itr);
  22     }
  23   }
  24   return AliasedBits;
  25 }
  26
  27 RegisterAliasingTracker::RegisterAliasingTracker(
  28     const llvm::MCRegisterInfo &RegInfo)
  29     : SourceBits(RegInfo.getNumRegs()), AliasedBits(RegInfo.getNumRegs()),
  30       Origins(RegInfo.getNumRegs()) {}
  31
  32 RegisterAliasingTracker::RegisterAliasingTracker(
  33     const llvm::MCRegisterInfo &RegInfo, const llvm::BitVector &ReservedReg,
  34     const llvm::MCRegisterClass &RegClass)
  35     : RegisterAliasingTracker(RegInfo) {
  36   for (llvm::MCPhysReg PhysReg : RegClass)
  37     if (!ReservedReg[PhysReg]) // Removing reserved registers.
  38       SourceBits.set(PhysReg);
  39   FillOriginAndAliasedBits(RegInfo, SourceBits);
  40 }
  41
  42 RegisterAliasingTracker::RegisterAliasingTracker(
  43     const llvm::MCRegisterInfo &RegInfo, const llvm::MCPhysReg PhysReg)
  44     : RegisterAliasingTracker(RegInfo) {
  45   SourceBits.set(PhysReg);
  46   FillOriginAndAliasedBits(RegInfo, SourceBits);
  47 }
  48
  49 void RegisterAliasingTracker::FillOriginAndAliasedBits(
  50     const llvm::MCRegisterInfo &RegInfo, const llvm::BitVector &SourceBits) {
  51   using RegAliasItr = llvm::MCRegAliasIterator;
  52   for (const size_t PhysReg : SourceBits.set_bits()) {
  53     for (auto Itr = RegAliasItr(PhysReg, &RegInfo, true); Itr.isValid();
  54          ++Itr) {
  55       AliasedBits.set(*Itr);
  56       Origins[*Itr] = PhysReg;
  57     }
  58   }
  59 }
  60
  61 RegisterAliasingTrackerCache::RegisterAliasingTrackerCache(
  62     const llvm::MCRegisterInfo &RegInfo, const llvm::BitVector &ReservedReg)
  63     : RegInfo(RegInfo), ReservedReg(ReservedReg),
  64       EmptyRegisters(RegInfo.getNumRegs()) {}
  65
  66 const RegisterAliasingTracker &
  67 RegisterAliasingTrackerCache::getRegister(llvm::MCPhysReg PhysReg) const {
  68   auto &Found = Registers[PhysReg];
  69   if (!Found)
  70     Found.reset(new RegisterAliasingTracker(RegInfo, PhysReg));
  71   return *Found;
  72 }
  73
  74 const RegisterAliasingTracker &
  75 RegisterAliasingTrackerCache::getRegisterClass(unsigned RegClassIndex) const {
  76   auto &Found = RegisterClasses[RegClassIndex];
  77   const auto &RegClass = RegInfo.getRegClass(RegClassIndex);
  78   if (!Found)
  79     Found.reset(new RegisterAliasingTracker(RegInfo, ReservedReg, RegClass));
  80   return *Found;
  81 }
  82
  83 } // namespace exegesis
  84 } // namespace llvm