lib/Target/Lanai/LanaiTargetMachine.cpp

   1 //===-- LanaiTargetMachine.cpp - Define TargetMachine for Lanai ---------===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // Implements the info about Lanai target spec.
  10 //
  11 //===----------------------------------------------------------------------===//
  12
  13 #include "LanaiTargetMachine.h"
  14
  15 #include "Lanai.h"
  16 #include "LanaiTargetObjectFile.h"
  17 #include "LanaiTargetTransformInfo.h"
  18 #include "TargetInfo/LanaiTargetInfo.h"
  19 #include "llvm/Analysis/TargetTransformInfo.h"
  20 #include "llvm/CodeGen/Passes.h"
  21 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
  22 #include "llvm/CodeGen/TargetPassConfig.h"
  23 #include "llvm/Support/FormattedStream.h"
  24 #include "llvm/Support/TargetRegistry.h"
  25 #include "llvm/Target/TargetOptions.h"
  26
  27 using namespace llvm;
  28
  29 namespace llvm {
  30 void initializeLanaiMemAluCombinerPass(PassRegistry &);
  31 } // namespace llvm
  32
  33 extern "C" void LLVMInitializeLanaiTarget() {
  34   // Register the target.
  35   RegisterTargetMachine<LanaiTargetMachine> registered_target(
  36       getTheLanaiTarget());
  37 }
  38
  39 static std::string computeDataLayout() {
  40   // Data layout (keep in sync with clang/lib/Basic/Targets.cpp)
  41   return "E"        // Big endian
  42          "-m:e"     // ELF name manging
  43          "-p:32:32" // 32-bit pointers, 32 bit aligned
  44          "-i64:64"  // 64 bit integers, 64 bit aligned
  45          "-a:0:32"  // 32 bit alignment of objects of aggregate type
  46          "-n32"     // 32 bit native integer width
  47          "-S64";    // 64 bit natural stack alignment
  48 }
  49
  50 static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) {
  51   if (!RM.hasValue())
  52     return Reloc::PIC_;
  53   return *RM;
  54 }
  55
  56 LanaiTargetMachine::LanaiTargetMachine(const Target &T, const Triple &TT,
  57                                        StringRef Cpu, StringRef FeatureString,
  58                                        const TargetOptions &Options,
  59                                        Optional<Reloc::Model> RM,
  60                                        Optional<CodeModel::Model> CodeModel,
  61                                        CodeGenOpt::Level OptLevel, bool JIT)
  62     : LLVMTargetMachine(T, computeDataLayout(), TT, Cpu, FeatureString, Options,
  63                         getEffectiveRelocModel(RM),
  64                         getEffectiveCodeModel(CodeModel, CodeModel::Medium),
  65                         OptLevel),
  66       Subtarget(TT, Cpu, FeatureString, *this, Options, getCodeModel(),
  67                 OptLevel),
  68       TLOF(new LanaiTargetObjectFile()) {
  69   initAsmInfo();
  70 }
  71
  72 TargetTransformInfo
  73 LanaiTargetMachine::getTargetTransformInfo(const Function &F) {
  74   return TargetTransformInfo(LanaiTTIImpl(this, F));
  75 }
  76
  77 namespace {
  78 // Lanai Code Generator Pass Configuration Options.
  79 class LanaiPassConfig : public TargetPassConfig {
  80 public:
  81   LanaiPassConfig(LanaiTargetMachine &TM, PassManagerBase *PassManager)
  82       : TargetPassConfig(TM, *PassManager) {}
  83
  84   LanaiTargetMachine &getLanaiTargetMachine() const {
  85     return getTM<LanaiTargetMachine>();
  86   }
  87
  88   bool addInstSelector() override;
  89   void addPreSched2() override;
  90   void addPreEmitPass() override;
  91 };
  92 } // namespace
  93
  94 TargetPassConfig *
  95 LanaiTargetMachine::createPassConfig(PassManagerBase &PassManager) {
  96   return new LanaiPassConfig(*this, &PassManager);
  97 }
  98
  99 // Install an instruction selector pass.
 100 bool LanaiPassConfig::addInstSelector() {
 101   addPass(createLanaiISelDag(getLanaiTargetMachine()));
 102   return false;
 103 }
 104
 105 // Implemented by targets that want to run passes immediately before
 106 // machine code is emitted.
 107 void LanaiPassConfig::addPreEmitPass() {
 108   addPass(createLanaiDelaySlotFillerPass(getLanaiTargetMachine()));
 109 }
 110
 111 // Run passes after prolog-epilog insertion and before the second instruction
 112 // scheduling pass.
 113 void LanaiPassConfig::addPreSched2() {
 114   addPass(createLanaiMemAluCombinerPass());
 115 }