| blob | 386e750ddd1b89fe29256d3565a6fead956afeeb |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=thumbv6m-none-eabi | FileCheck %s --check-prefix=CHECK-T1
3 ; RUN: llc < %s -mtriple=thumbv7m-none-eabi | FileCheck %s --check-prefix=CHECK-T2 --check-prefix=CHECK-T2NODSP
4 ; RUN: llc < %s -mtriple=thumbv7em-none-eabi | FileCheck %s --check-prefix=CHECK-T2 --check-prefix=CHECK-T2DSP
5 ; RUN: llc < %s -mtriple=armv5t-none-eabi | FileCheck %s --check-prefix=CHECK-ARM --check-prefix=CHECK-ARMNODPS
6 ; RUN: llc < %s -mtriple=armv5te-none-eabi | FileCheck %s --check-prefix=CHECK-ARM --check-prefix=CHECK-ARMBASEDSP
7 ; RUN: llc < %s -mtriple=armv6-none-eabi | FileCheck %s --check-prefix=CHECK-ARM --check-prefix=CHECK-ARMDSP
9 declare i4 @llvm.sadd.sat.i4(i4, i4)
10 declare i8 @llvm.sadd.sat.i8(i8, i8)
11 declare i16 @llvm.sadd.sat.i16(i16, i16)
12 declare i32 @llvm.sadd.sat.i32(i32, i32)
13 declare i64 @llvm.sadd.sat.i64(i64, i64)
15 define i32 @func(i32 %x, i32 %y) nounwind {
16 ; CHECK-T1-LABEL: func:
17 ; CHECK-T1: @ %bb.0:
18 ; CHECK-T1-NEXT: mov r2, r0
19 ; CHECK-T1-NEXT: movs r3, #1
20 ; CHECK-T1-NEXT: adds r0, r0, r1
21 ; CHECK-T1-NEXT: mov r1, r3
22 ; CHECK-T1-NEXT: bmi .LBB0_2
23 ; CHECK-T1-NEXT: @ %bb.1:
24 ; CHECK-T1-NEXT: movs r1, #0
25 ; CHECK-T1-NEXT: .LBB0_2:
26 ; CHECK-T1-NEXT: cmp r1, #0
27 ; CHECK-T1-NEXT: bne .LBB0_4
28 ; CHECK-T1-NEXT: @ %bb.3:
29 ; CHECK-T1-NEXT: lsls r1, r3, #31
30 ; CHECK-T1-NEXT: cmp r0, r2
31 ; CHECK-T1-NEXT: bvs .LBB0_5
32 ; CHECK-T1-NEXT: b .LBB0_6
33 ; CHECK-T1-NEXT: .LBB0_4:
34 ; CHECK-T1-NEXT: ldr r1, .LCPI0_0
35 ; CHECK-T1-NEXT: cmp r0, r2
36 ; CHECK-T1-NEXT: bvc .LBB0_6
37 ; CHECK-T1-NEXT: .LBB0_5:
38 ; CHECK-T1-NEXT: mov r0, r1
39 ; CHECK-T1-NEXT: .LBB0_6:
40 ; CHECK-T1-NEXT: bx lr
41 ; CHECK-T1-NEXT: .p2align 2
42 ; CHECK-T1-NEXT: @ %bb.7:
43 ; CHECK-T1-NEXT: .LCPI0_0:
44 ; CHECK-T1-NEXT: .long 2147483647 @ 0x7fffffff
45 ;
46 ; CHECK-T2NODSP-LABEL: func:
47 ; CHECK-T2NODSP: @ %bb.0:
48 ; CHECK-T2NODSP-NEXT: adds r2, r0, r1
49 ; CHECK-T2NODSP-NEXT: mov.w r3, #0
50 ; CHECK-T2NODSP-NEXT: mov.w r1, #-2147483648
51 ; CHECK-T2NODSP-NEXT: it mi
52 ; CHECK-T2NODSP-NEXT: movmi r3, #1
53 ; CHECK-T2NODSP-NEXT: cmp r3, #0
54 ; CHECK-T2NODSP-NEXT: it ne
55 ; CHECK-T2NODSP-NEXT: mvnne r1, #-2147483648
56 ; CHECK-T2NODSP-NEXT: cmp r2, r0
57 ; CHECK-T2NODSP-NEXT: it vc
58 ; CHECK-T2NODSP-NEXT: movvc r1, r2
59 ; CHECK-T2NODSP-NEXT: mov r0, r1
60 ; CHECK-T2NODSP-NEXT: bx lr
61 ;
62 ; CHECK-T2DSP-LABEL: func:
63 ; CHECK-T2DSP: @ %bb.0:
64 ; CHECK-T2DSP-NEXT: qadd r0, r0, r1
65 ; CHECK-T2DSP-NEXT: bx lr
66 ;
67 ; CHECK-ARMNODPS-LABEL: func:
68 ; CHECK-ARMNODPS: @ %bb.0:
69 ; CHECK-ARMNODPS-NEXT: adds r2, r0, r1
70 ; CHECK-ARMNODPS-NEXT: mov r3, #0
71 ; CHECK-ARMNODPS-NEXT: movmi r3, #1
72 ; CHECK-ARMNODPS-NEXT: mov r1, #-2147483648
73 ; CHECK-ARMNODPS-NEXT: cmp r3, #0
74 ; CHECK-ARMNODPS-NEXT: mvnne r1, #-2147483648
75 ; CHECK-ARMNODPS-NEXT: cmp r2, r0
76 ; CHECK-ARMNODPS-NEXT: movvc r1, r2
77 ; CHECK-ARMNODPS-NEXT: mov r0, r1
78 ; CHECK-ARMNODPS-NEXT: bx lr
79 ;
80 ; CHECK-ARMBASEDSP-LABEL: func:
81 ; CHECK-ARMBASEDSP: @ %bb.0:
82 ; CHECK-ARMBASEDSP-NEXT: qadd r0, r0, r1
83 ; CHECK-ARMBASEDSP-NEXT: bx lr
84 ;
85 ; CHECK-ARMDSP-LABEL: func:
86 ; CHECK-ARMDSP: @ %bb.0:
87 ; CHECK-ARMDSP-NEXT: qadd r0, r0, r1
88 ; CHECK-ARMDSP-NEXT: bx lr
89 %tmp = call i32 @llvm.sadd.sat.i32(i32 %x, i32 %y)
90 ret i32 %tmp
91 }
93 define i64 @func2(i64 %x, i64 %y) nounwind {
94 ; CHECK-T1-LABEL: func2:
95 ; CHECK-T1: @ %bb.0:
96 ; CHECK-T1-NEXT: .save {r4, r5, r6, r7, lr}
97 ; CHECK-T1-NEXT: push {r4, r5, r6, r7, lr}
98 ; CHECK-T1-NEXT: .pad #4
99 ; CHECK-T1-NEXT: sub sp, #4
100 ; CHECK-T1-NEXT: str r2, [sp] @ 4-byte Spill
101 ; CHECK-T1-NEXT: mov r2, r0
102 ; CHECK-T1-NEXT: movs r4, #1
103 ; CHECK-T1-NEXT: movs r0, #0
104 ; CHECK-T1-NEXT: cmp r3, #0
105 ; CHECK-T1-NEXT: mov r5, r4
106 ; CHECK-T1-NEXT: bge .LBB1_2
107 ; CHECK-T1-NEXT: @ %bb.1:
108 ; CHECK-T1-NEXT: mov r5, r0
109 ; CHECK-T1-NEXT: .LBB1_2:
110 ; CHECK-T1-NEXT: cmp r1, #0
111 ; CHECK-T1-NEXT: mov r7, r4
112 ; CHECK-T1-NEXT: bge .LBB1_4
113 ; CHECK-T1-NEXT: @ %bb.3:
114 ; CHECK-T1-NEXT: mov r7, r0
115 ; CHECK-T1-NEXT: .LBB1_4:
116 ; CHECK-T1-NEXT: subs r6, r7, r5
117 ; CHECK-T1-NEXT: rsbs r5, r6, #0
118 ; CHECK-T1-NEXT: adcs r5, r6
119 ; CHECK-T1-NEXT: ldr r6, [sp] @ 4-byte Reload
120 ; CHECK-T1-NEXT: adds r6, r2, r6
121 ; CHECK-T1-NEXT: adcs r1, r3
122 ; CHECK-T1-NEXT: cmp r1, #0
123 ; CHECK-T1-NEXT: mov r2, r4
124 ; CHECK-T1-NEXT: bge .LBB1_6
125 ; CHECK-T1-NEXT: @ %bb.5:
126 ; CHECK-T1-NEXT: mov r2, r0
127 ; CHECK-T1-NEXT: .LBB1_6:
128 ; CHECK-T1-NEXT: subs r0, r7, r2
129 ; CHECK-T1-NEXT: subs r2, r0, #1
130 ; CHECK-T1-NEXT: sbcs r0, r2
131 ; CHECK-T1-NEXT: ands r5, r0
132 ; CHECK-T1-NEXT: beq .LBB1_8
133 ; CHECK-T1-NEXT: @ %bb.7:
134 ; CHECK-T1-NEXT: asrs r6, r1, #31
135 ; CHECK-T1-NEXT: .LBB1_8:
136 ; CHECK-T1-NEXT: cmp r1, #0
137 ; CHECK-T1-NEXT: bmi .LBB1_10
138 ; CHECK-T1-NEXT: @ %bb.9:
139 ; CHECK-T1-NEXT: lsls r2, r4, #31
140 ; CHECK-T1-NEXT: cmp r5, #0
141 ; CHECK-T1-NEXT: beq .LBB1_11
142 ; CHECK-T1-NEXT: b .LBB1_12
143 ; CHECK-T1-NEXT: .LBB1_10:
144 ; CHECK-T1-NEXT: ldr r2, .LCPI1_0
145 ; CHECK-T1-NEXT: cmp r5, #0
146 ; CHECK-T1-NEXT: bne .LBB1_12
147 ; CHECK-T1-NEXT: .LBB1_11:
148 ; CHECK-T1-NEXT: mov r2, r1
149 ; CHECK-T1-NEXT: .LBB1_12:
150 ; CHECK-T1-NEXT: mov r0, r6
151 ; CHECK-T1-NEXT: mov r1, r2
152 ; CHECK-T1-NEXT: add sp, #4
153 ; CHECK-T1-NEXT: pop {r4, r5, r6, r7, pc}
154 ; CHECK-T1-NEXT: .p2align 2
155 ; CHECK-T1-NEXT: @ %bb.13:
156 ; CHECK-T1-NEXT: .LCPI1_0:
157 ; CHECK-T1-NEXT: .long 2147483647 @ 0x7fffffff
158 ;
159 ; CHECK-T2-LABEL: func2:
160 ; CHECK-T2: @ %bb.0:
161 ; CHECK-T2-NEXT: .save {r7, lr}
162 ; CHECK-T2-NEXT: push {r7, lr}
163 ; CHECK-T2-NEXT: cmp.w r1, #-1
164 ; CHECK-T2-NEXT: mov.w lr, #0
165 ; CHECK-T2-NEXT: it gt
166 ; CHECK-T2-NEXT: movgt.w lr, #1
167 ; CHECK-T2-NEXT: adds r0, r0, r2
168 ; CHECK-T2-NEXT: adc.w r2, r1, r3
169 ; CHECK-T2-NEXT: movs r1, #0
170 ; CHECK-T2-NEXT: cmp.w r2, #-1
171 ; CHECK-T2-NEXT: it gt
172 ; CHECK-T2-NEXT: movgt r1, #1
173 ; CHECK-T2-NEXT: subs.w r1, lr, r1
174 ; CHECK-T2-NEXT: mov.w r12, #0
175 ; CHECK-T2-NEXT: it ne
176 ; CHECK-T2-NEXT: movne r1, #1
177 ; CHECK-T2-NEXT: cmp.w r3, #-1
178 ; CHECK-T2-NEXT: it gt
179 ; CHECK-T2-NEXT: movgt.w r12, #1
180 ; CHECK-T2-NEXT: sub.w r3, lr, r12
181 ; CHECK-T2-NEXT: clz r3, r3
182 ; CHECK-T2-NEXT: lsrs r3, r3, #5
183 ; CHECK-T2-NEXT: ands r3, r1
184 ; CHECK-T2-NEXT: mov.w r1, #-2147483648
185 ; CHECK-T2-NEXT: it ne
186 ; CHECK-T2-NEXT: asrne r0, r2, #31
187 ; CHECK-T2-NEXT: cmp r2, #0
188 ; CHECK-T2-NEXT: it mi
189 ; CHECK-T2-NEXT: mvnmi r1, #-2147483648
190 ; CHECK-T2-NEXT: cmp r3, #0
191 ; CHECK-T2-NEXT: it eq
192 ; CHECK-T2-NEXT: moveq r1, r2
193 ; CHECK-T2-NEXT: pop {r7, pc}
194 ;
195 ; CHECK-ARM-LABEL: func2:
196 ; CHECK-ARM: @ %bb.0:
197 ; CHECK-ARM-NEXT: .save {r11, lr}
198 ; CHECK-ARM-NEXT: push {r11, lr}
199 ; CHECK-ARM-NEXT: cmn r1, #1
200 ; CHECK-ARM-NEXT: mov lr, #0
201 ; CHECK-ARM-NEXT: movgt lr, #1
202 ; CHECK-ARM-NEXT: adds r0, r0, r2
203 ; CHECK-ARM-NEXT: adc r2, r1, r3
204 ; CHECK-ARM-NEXT: mov r1, #0
205 ; CHECK-ARM-NEXT: cmn r2, #1
206 ; CHECK-ARM-NEXT: mov r12, #0
207 ; CHECK-ARM-NEXT: movgt r1, #1
208 ; CHECK-ARM-NEXT: subs r1, lr, r1
209 ; CHECK-ARM-NEXT: movne r1, #1
210 ; CHECK-ARM-NEXT: cmn r3, #1
211 ; CHECK-ARM-NEXT: movgt r12, #1
212 ; CHECK-ARM-NEXT: sub r3, lr, r12
213 ; CHECK-ARM-NEXT: clz r3, r3
214 ; CHECK-ARM-NEXT: lsr r3, r3, #5
215 ; CHECK-ARM-NEXT: ands r3, r3, r1
216 ; CHECK-ARM-NEXT: mov r1, #-2147483648
217 ; CHECK-ARM-NEXT: asrne r0, r2, #31
218 ; CHECK-ARM-NEXT: cmp r2, #0
219 ; CHECK-ARM-NEXT: mvnmi r1, #-2147483648
220 ; CHECK-ARM-NEXT: cmp r3, #0
221 ; CHECK-ARM-NEXT: moveq r1, r2
222 ; CHECK-ARM-NEXT: pop {r11, pc}
223 %tmp = call i64 @llvm.sadd.sat.i64(i64 %x, i64 %y)
224 ret i64 %tmp
225 }
227 define signext i16 @func16(i16 signext %x, i16 signext %y) nounwind {
228 ; CHECK-T1-LABEL: func16:
229 ; CHECK-T1: @ %bb.0:
230 ; CHECK-T1-NEXT: adds r0, r0, r1
231 ; CHECK-T1-NEXT: ldr r1, .LCPI2_0
232 ; CHECK-T1-NEXT: cmp r0, r1
233 ; CHECK-T1-NEXT: blt .LBB2_2
234 ; CHECK-T1-NEXT: @ %bb.1:
235 ; CHECK-T1-NEXT: mov r0, r1
236 ; CHECK-T1-NEXT: .LBB2_2:
237 ; CHECK-T1-NEXT: ldr r1, .LCPI2_1
238 ; CHECK-T1-NEXT: cmp r0, r1
239 ; CHECK-T1-NEXT: bgt .LBB2_4
240 ; CHECK-T1-NEXT: @ %bb.3:
241 ; CHECK-T1-NEXT: mov r0, r1
242 ; CHECK-T1-NEXT: .LBB2_4:
243 ; CHECK-T1-NEXT: bx lr
244 ; CHECK-T1-NEXT: .p2align 2
245 ; CHECK-T1-NEXT: @ %bb.5:
246 ; CHECK-T1-NEXT: .LCPI2_0:
247 ; CHECK-T1-NEXT: .long 32767 @ 0x7fff
248 ; CHECK-T1-NEXT: .LCPI2_1:
249 ; CHECK-T1-NEXT: .long 4294934528 @ 0xffff8000
250 ;
251 ; CHECK-T2NODSP-LABEL: func16:
252 ; CHECK-T2NODSP: @ %bb.0:
253 ; CHECK-T2NODSP-NEXT: add r0, r1
254 ; CHECK-T2NODSP-NEXT: movw r1, #32767
255 ; CHECK-T2NODSP-NEXT: cmp r0, r1
256 ; CHECK-T2NODSP-NEXT: it lt
257 ; CHECK-T2NODSP-NEXT: movlt r1, r0
258 ; CHECK-T2NODSP-NEXT: movw r0, #32768
259 ; CHECK-T2NODSP-NEXT: cmn.w r1, #32768
260 ; CHECK-T2NODSP-NEXT: movt r0, #65535
261 ; CHECK-T2NODSP-NEXT: it gt
262 ; CHECK-T2NODSP-NEXT: movgt r0, r1
263 ; CHECK-T2NODSP-NEXT: bx lr
264 ;
265 ; CHECK-T2DSP-LABEL: func16:
266 ; CHECK-T2DSP: @ %bb.0:
267 ; CHECK-T2DSP-NEXT: qadd16 r0, r0, r1
268 ; CHECK-T2DSP-NEXT: sxth r0, r0
269 ; CHECK-T2DSP-NEXT: bx lr
270 ;
271 ; CHECK-ARMNODPS-LABEL: func16:
272 ; CHECK-ARMNODPS: @ %bb.0:
273 ; CHECK-ARMNODPS-NEXT: add r0, r0, r1
274 ; CHECK-ARMNODPS-NEXT: mov r1, #255
275 ; CHECK-ARMNODPS-NEXT: orr r1, r1, #32512
276 ; CHECK-ARMNODPS-NEXT: cmp r0, r1
277 ; CHECK-ARMNODPS-NEXT: movlt r1, r0
278 ; CHECK-ARMNODPS-NEXT: ldr r0, .LCPI2_0
279 ; CHECK-ARMNODPS-NEXT: cmn r1, #32768
280 ; CHECK-ARMNODPS-NEXT: movgt r0, r1
281 ; CHECK-ARMNODPS-NEXT: bx lr
282 ; CHECK-ARMNODPS-NEXT: .p2align 2
283 ; CHECK-ARMNODPS-NEXT: @ %bb.1:
284 ; CHECK-ARMNODPS-NEXT: .LCPI2_0:
285 ; CHECK-ARMNODPS-NEXT: .long 4294934528 @ 0xffff8000
286 ;
287 ; CHECK-ARMBASEDSP-LABEL: func16:
288 ; CHECK-ARMBASEDSP: @ %bb.0:
289 ; CHECK-ARMBASEDSP-NEXT: lsl r0, r0, #16
290 ; CHECK-ARMBASEDSP-NEXT: lsl r1, r1, #16
291 ; CHECK-ARMBASEDSP-NEXT: qadd r0, r0, r1
292 ; CHECK-ARMBASEDSP-NEXT: asr r0, r0, #16
293 ; CHECK-ARMBASEDSP-NEXT: bx lr
294 ;
295 ; CHECK-ARMDSP-LABEL: func16:
296 ; CHECK-ARMDSP: @ %bb.0:
297 ; CHECK-ARMDSP-NEXT: qadd16 r0, r0, r1
298 ; CHECK-ARMDSP-NEXT: sxth r0, r0
299 ; CHECK-ARMDSP-NEXT: bx lr
300 %tmp = call i16 @llvm.sadd.sat.i16(i16 %x, i16 %y)
301 ret i16 %tmp
302 }
304 define signext i8 @func8(i8 signext %x, i8 signext %y) nounwind {
305 ; CHECK-T1-LABEL: func8:
306 ; CHECK-T1: @ %bb.0:
307 ; CHECK-T1-NEXT: adds r0, r0, r1
308 ; CHECK-T1-NEXT: movs r1, #127
309 ; CHECK-T1-NEXT: cmp r0, #127
310 ; CHECK-T1-NEXT: blt .LBB3_2
311 ; CHECK-T1-NEXT: @ %bb.1:
312 ; CHECK-T1-NEXT: mov r0, r1
313 ; CHECK-T1-NEXT: .LBB3_2:
314 ; CHECK-T1-NEXT: mvns r1, r1
315 ; CHECK-T1-NEXT: cmp r0, r1
316 ; CHECK-T1-NEXT: bgt .LBB3_4
317 ; CHECK-T1-NEXT: @ %bb.3:
318 ; CHECK-T1-NEXT: mov r0, r1
319 ; CHECK-T1-NEXT: .LBB3_4:
320 ; CHECK-T1-NEXT: bx lr
321 ;
322 ; CHECK-T2NODSP-LABEL: func8:
323 ; CHECK-T2NODSP: @ %bb.0:
324 ; CHECK-T2NODSP-NEXT: add r0, r1
325 ; CHECK-T2NODSP-NEXT: cmp r0, #127
326 ; CHECK-T2NODSP-NEXT: it ge
327 ; CHECK-T2NODSP-NEXT: movge r0, #127
328 ; CHECK-T2NODSP-NEXT: cmn.w r0, #128
329 ; CHECK-T2NODSP-NEXT: it le
330 ; CHECK-T2NODSP-NEXT: mvnle r0, #127
331 ; CHECK-T2NODSP-NEXT: bx lr
332 ;
333 ; CHECK-T2DSP-LABEL: func8:
334 ; CHECK-T2DSP: @ %bb.0:
335 ; CHECK-T2DSP-NEXT: qadd8 r0, r0, r1
336 ; CHECK-T2DSP-NEXT: sxtb r0, r0
337 ; CHECK-T2DSP-NEXT: bx lr
338 ;
339 ; CHECK-ARMNODPS-LABEL: func8:
340 ; CHECK-ARMNODPS: @ %bb.0:
341 ; CHECK-ARMNODPS-NEXT: add r0, r0, r1
342 ; CHECK-ARMNODPS-NEXT: cmp r0, #127
343 ; CHECK-ARMNODPS-NEXT: movge r0, #127
344 ; CHECK-ARMNODPS-NEXT: cmn r0, #128
345 ; CHECK-ARMNODPS-NEXT: mvnle r0, #127
346 ; CHECK-ARMNODPS-NEXT: bx lr
347 ;
348 ; CHECK-ARMBASEDSP-LABEL: func8:
349 ; CHECK-ARMBASEDSP: @ %bb.0:
350 ; CHECK-ARMBASEDSP-NEXT: lsl r0, r0, #24
351 ; CHECK-ARMBASEDSP-NEXT: lsl r1, r1, #24
352 ; CHECK-ARMBASEDSP-NEXT: qadd r0, r0, r1
353 ; CHECK-ARMBASEDSP-NEXT: asr r0, r0, #24
354 ; CHECK-ARMBASEDSP-NEXT: bx lr
355 ;
356 ; CHECK-ARMDSP-LABEL: func8:
357 ; CHECK-ARMDSP: @ %bb.0:
358 ; CHECK-ARMDSP-NEXT: qadd8 r0, r0, r1
359 ; CHECK-ARMDSP-NEXT: sxtb r0, r0
360 ; CHECK-ARMDSP-NEXT: bx lr
361 %tmp = call i8 @llvm.sadd.sat.i8(i8 %x, i8 %y)
362 ret i8 %tmp
363 }
365 define signext i4 @func3(i4 signext %x, i4 signext %y) nounwind {
366 ; CHECK-T1-LABEL: func3:
367 ; CHECK-T1: @ %bb.0:
368 ; CHECK-T1-NEXT: adds r0, r0, r1
369 ; CHECK-T1-NEXT: movs r1, #7
370 ; CHECK-T1-NEXT: cmp r0, #7
371 ; CHECK-T1-NEXT: blt .LBB4_2
372 ; CHECK-T1-NEXT: @ %bb.1:
373 ; CHECK-T1-NEXT: mov r0, r1
374 ; CHECK-T1-NEXT: .LBB4_2:
375 ; CHECK-T1-NEXT: mvns r1, r1
376 ; CHECK-T1-NEXT: cmp r0, r1
377 ; CHECK-T1-NEXT: bgt .LBB4_4
378 ; CHECK-T1-NEXT: @ %bb.3:
379 ; CHECK-T1-NEXT: mov r0, r1
380 ; CHECK-T1-NEXT: .LBB4_4:
381 ; CHECK-T1-NEXT: bx lr
382 ;
383 ; CHECK-T2NODSP-LABEL: func3:
384 ; CHECK-T2NODSP: @ %bb.0:
385 ; CHECK-T2NODSP-NEXT: add r0, r1
386 ; CHECK-T2NODSP-NEXT: cmp r0, #7
387 ; CHECK-T2NODSP-NEXT: it ge
388 ; CHECK-T2NODSP-NEXT: movge r0, #7
389 ; CHECK-T2NODSP-NEXT: cmn.w r0, #8
390 ; CHECK-T2NODSP-NEXT: it le
391 ; CHECK-T2NODSP-NEXT: mvnle r0, #7
392 ; CHECK-T2NODSP-NEXT: bx lr
393 ;
394 ; CHECK-T2DSP-LABEL: func3:
395 ; CHECK-T2DSP: @ %bb.0:
396 ; CHECK-T2DSP-NEXT: lsls r1, r1, #28
397 ; CHECK-T2DSP-NEXT: lsls r0, r0, #28
398 ; CHECK-T2DSP-NEXT: qadd r0, r0, r1
399 ; CHECK-T2DSP-NEXT: asrs r0, r0, #28
400 ; CHECK-T2DSP-NEXT: bx lr
401 ;
402 ; CHECK-ARMNODPS-LABEL: func3:
403 ; CHECK-ARMNODPS: @ %bb.0:
404 ; CHECK-ARMNODPS-NEXT: add r0, r0, r1
405 ; CHECK-ARMNODPS-NEXT: cmp r0, #7
406 ; CHECK-ARMNODPS-NEXT: movge r0, #7
407 ; CHECK-ARMNODPS-NEXT: cmn r0, #8
408 ; CHECK-ARMNODPS-NEXT: mvnle r0, #7
409 ; CHECK-ARMNODPS-NEXT: bx lr
410 ;
411 ; CHECK-ARMBASEDSP-LABEL: func3:
412 ; CHECK-ARMBASEDSP: @ %bb.0:
413 ; CHECK-ARMBASEDSP-NEXT: lsl r0, r0, #28
414 ; CHECK-ARMBASEDSP-NEXT: lsl r1, r1, #28
415 ; CHECK-ARMBASEDSP-NEXT: qadd r0, r0, r1
416 ; CHECK-ARMBASEDSP-NEXT: asr r0, r0, #28
417 ; CHECK-ARMBASEDSP-NEXT: bx lr
418 ;
419 ; CHECK-ARMDSP-LABEL: func3:
420 ; CHECK-ARMDSP: @ %bb.0:
421 ; CHECK-ARMDSP-NEXT: lsl r0, r0, #28
422 ; CHECK-ARMDSP-NEXT: lsl r1, r1, #28
423 ; CHECK-ARMDSP-NEXT: qadd r0, r0, r1
424 ; CHECK-ARMDSP-NEXT: asr r0, r0, #28
425 ; CHECK-ARMDSP-NEXT: bx lr
426 %tmp = call i4 @llvm.sadd.sat.i4(i4 %x, i4 %y)
427 ret i4 %tmp
428 }