test/MC/AArch64/arm64-spsel-sysreg.s

   1 // RUN: not llvm-mc -triple arm64 -show-encoding < %s 2>%t | FileCheck %s
   2 // RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
   3
   4 msr SPSel, #0
   5 msr SPSel, x0
   6 msr DAIFSet, #0
   7 msr ESR_EL1, x0
   8 mrs x0, SPSel
   9 mrs x0, ESR_EL1
  10
  11 // CHECK: msr SPSel, #0               // encoding: [0xbf,0x40,0x00,0xd5]
  12 // CHECK: msr SPSel, x0               // encoding: [0x00,0x42,0x18,0xd5]
  13 // CHECK: msr DAIFSet, #0             // encoding: [0xdf,0x40,0x03,0xd5]
  14 // CHECK: msr ESR_EL1, x0             // encoding: [0x00,0x52,0x18,0xd5]
  15 // CHECK: mrs x0, SPSel               // encoding: [0x00,0x42,0x38,0xd5]
  16 // CHECK: mrs x0, ESR_EL1             // encoding: [0x00,0x52,0x38,0xd5]
  17
  18
  19 msr DAIFSet, x0
  20 msr ESR_EL1, #0
  21 mrs x0, DAIFSet
  22 // CHECK-ERRORS: error: immediate must be an integer in range [0, 15]
  23 // CHECK-ERRORS: error: invalid operand for instruction
  24 // CHECK-ERRORS: error: expected readable system register