[InstCombine] Signed saturation patterns
[llvm-core.git] / test / MC / ARM / vorr-vbic-illegal-cases.s
blobba5ee085d164479765e83f93547471e379caca77
1 @ RUN: not llvm-mc -triple=armv7-linux-gnueabi %s 2>&1 | FileCheck %s
2 .text
4 vorr.i32 d2, #0xffffffff
5 vorr.i32 q2, #0xffffffff
6 vorr.i32 d2, #0xabababab
7 vorr.i32 q2, #0xabababab
8 vorr.i16 q2, #0xabab
9 vorr.i16 q2, #0xabab
11 @ CHECK: error: invalid instruction, any one of the following would fix this:
12 @ CHECK: operand must be a register in range [d0, d31]
13 @ CHECK: note: invalid operand for instruction
14 @ CHECK: vorr.i32 d2, #0xffffffff
15 @ CHECK: error: invalid instruction, any one of the following would fix this:
16 @ CHECK: note: operand must be a register in range [q0, q15]
17 @ CHECK: note: invalid operand for instruction
18 @ CHECK: vorr.i32 q2, #0xffffffff
19 @ CHECK: error: invalid instruction, any one of the following would fix this:
20 @ CHECK: operand must be a register in range [d0, d31]
21 @ CHECK: note: invalid operand for instruction
22 @ CHECK: vorr.i32 d2, #0xabababab
23 @ CHECK: error: invalid instruction, any one of the following would fix this:
24 @ CHECK: note: operand must be a register in range [q0, q15]
25 @ CHECK: note: invalid operand for instruction
26 @ CHECK: vorr.i32 q2, #0xabababab
27 @ CHECK: error: invalid instruction, any one of the following would fix this:
28 @ CHECK: note: operand must be a register in range [q0, q15]
29 @ CHECK: note: invalid operand for instruction
30 @ CHECK: vorr.i16 q2, #0xabab
31 @ CHECK: error: invalid instruction, any one of the following would fix this:
32 @ CHECK: note: operand must be a register in range [q0, q15]
33 @ CHECK: note: invalid operand for instruction
34 @ CHECK: vorr.i16 q2, #0xabab
36 vbic.i32 d2, #0xffffffff
37 vbic.i32 q2, #0xffffffff
38 vbic.i32 d2, #0xabababab
39 vbic.i32 q2, #0xabababab
40 vbic.i16 d2, #0xabab
41 vbic.i16 q2, #0xabab
43 @ CHECK: error: invalid operand for instruction
44 @ CHECK: vbic.i32 d2, #0xffffffff
45 @ CHECK: error: invalid operand for instruction
46 @ CHECK: vbic.i32 q2, #0xffffffff
47 @ CHECK: error: invalid operand for instruction
48 @ CHECK: vbic.i32 d2, #0xabababab
49 @ CHECK: error: invalid operand for instruction
50 @ CHECK: vbic.i32 q2, #0xabababab
51 @ CHECK: error: invalid operand for instruction
52 @ CHECK: vbic.i16 d2, #0xabab
53 @ CHECK: error: invalid operand for instruction
54 @ CHECK: vbic.i16 q2, #0xabab
56 vbic.i32 d2, #0x03ffffff
57 vbic.i32 q2, #0x03ffff
58 vbic.i32 d2, #0x03ff
59 vbic.i32 d2, #0xff00ff
60 vbic.i16 d2, #0x03ff
61 vbic.i16 q2, #0xf0f0
62 vbic.i16 q2, #0xf0f0f0
64 @ CHECK: error: invalid operand for instruction
65 @ CHECK: vbic.i32 d2, #0x03ffffff
66 @ CHECK: error: invalid operand for instruction
67 @ CHECK: vbic.i32 q2, #0x03ffff
68 @ CHECK: error: invalid operand for instruction
69 @ CHECK: vbic.i32 d2, #0x03ff
70 @ CHECK: error: invalid operand for instruction
71 @ CHECK: vbic.i32 d2, #0xff00ff
72 @ CHECK: error: invalid operand for instruction
73 @ CHECK: vbic.i16 d2, #0x03ff
74 @ CHECK: error: invalid operand for instruction
75 @ CHECK: vbic.i16 q2, #0xf0f0
76 @ CHECK: error: invalid operand for instruction
77 @ CHECK: vbic.i16 q2, #0xf0f0f0