[InstCombine] Signed saturation patterns
[llvm-core.git] / test / MC / Mips / macro-divu-bad.s
blobb5b492ec682807cb7b7f5ecc9448a7c9224ac169
1 # RUN: not llvm-mc %s -arch=mips -mcpu=mips32r6 2>&1 | \
2 # RUN: FileCheck %s --check-prefix=R6
3 # RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64r6 2>&1 | \
4 # RUN: FileCheck %s --check-prefix=R6
5 # RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 2>&1 | \
6 # RUN: FileCheck %s --check-prefix=NOT-R6
7 # RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 2>&1 | \
8 # RUN: FileCheck %s --check-prefix=NOT-R6
10 .text
11 divu $25, 11
12 # R6: :[[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled
14 divu $25, $0
15 # NOT-R6: :[[@LINE-1]]:3: warning: division by zero
17 divu $0,$0
18 # NOT-R6: :[[@LINE-1]]:3: warning: dividing zero by zero