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[InstCombine] Signed saturation patterns
[llvm-core.git]
/
test
/
TableGen
/
ListSlices.td
blob
cbb2326a95c003952d0a0960c34778ea6298ef8d
1
// RUN: llvm-tblgen %s
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// XFAIL: vg_leak
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def A {
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list<int> B = [10, 20, 30, 4, 1, 1231, 20];
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}
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def B {
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list<int> X = [10, 20, 30, 4, 1, 1231, 20] [2-4,2,2,0-6];
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list<int> Y = X[4,5];
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int Z = X[4];
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list<int> C = A.B[1-4];
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list<list<int>> AA = [X, Y];
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int BB = AA[0][1];
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}