1 ; RUN: opt < %s -early-cse-memssa -gvn-hoist -S | FileCheck %s
3 ; Make sure opt won't crash and that this pair of
4 ; instructions (load, icmp) is hoisted successfully
5 ; from bb45 and bb58 to bb41.
7 @g_10 = external global i32, align 4
8 @g_536 = external global i8*, align 8
9 @g_1629 = external global i32**, align 8
10 @g_963 = external global i32**, align 8
11 @g_1276 = external global i32**, align 8
13 ;CHECK-LABEL: @func_22
15 define void @func_22(i32* %arg, i32* %arg1) {
20 %tmp3.0 = phi i32 [ undef, %bb ], [ %tmp40, %bb36 ]
21 %tmp7.0 = phi i32 [ undef, %bb ], [ %spec.select, %bb36 ]
22 %tmp14 = icmp eq i32 %tmp3.0, 6
23 br i1 %tmp14, label %bb41, label %bb15
26 %tmp183 = trunc i16 0 to i8
27 %tmp20 = load i8*, i8** @g_536, align 8
28 %tmp21 = load i8, i8* %tmp20, align 1
29 %tmp23 = or i8 %tmp21, %tmp183
30 store i8 %tmp23, i8* %tmp20, align 1
31 %tmp5.i = icmp eq i8 %tmp23, 0
32 br i1 %tmp5.i, label %safe_div_func_uint8_t_u_u.exit, label %bb8.i
35 %0 = udiv i8 1, %tmp23
36 br label %safe_div_func_uint8_t_u_u.exit
38 safe_div_func_uint8_t_u_u.exit:
39 %tmp13.in.i = phi i8 [ %0, %bb8.i ], [ 1, %bb15 ]
40 %tmp31 = icmp eq i8 %tmp13.in.i, 0
41 %spec.select = select i1 %tmp31, i32 %tmp7.0, i32 53
42 %tmp35 = icmp eq i32 %spec.select, 0
43 br i1 %tmp35, label %bb36, label %bb41
46 %tmp38 = sext i32 %tmp3.0 to i64
47 %tmp40 = trunc i64 %tmp38 to i32
51 ;CHECK: %tmp47 = load i32, i32* %arg1, align 4
52 ;CHECK: %tmp48 = icmp eq i32 %tmp47, 0
55 %tmp43 = load i32, i32* %arg, align 4
56 %tmp44 = icmp eq i32 %tmp43, 0
57 br i1 %tmp44, label %bb52, label %bb45
60 ;CHECK-NOT: %tmp47 = load i32, i32* %arg1, align 4
61 ;CHECK-NOT: %tmp48 = icmp eq i32 %tmp47, 0
64 %tmp47 = load i32, i32* %arg1, align 4
65 %tmp48 = icmp eq i32 %tmp47, 0
66 br i1 %tmp48, label %bb50, label %bb64
69 %tmp51 = load volatile i32**, i32*** @g_963, align 8
73 %tmp8.0 = phi i32 [ undef, %bb41 ], [ %tmp57, %bb55 ]
74 %tmp54 = icmp slt i32 %tmp8.0, 3
75 br i1 %tmp54, label %bb55, label %bb58
78 %tmp57 = add nsw i32 %tmp8.0, 1
82 ;CHECK-NOT: %tmp60 = load i32, i32* %arg1, align 4
83 ;CHECK-NOT: %tmp61 = icmp eq i32 %tmp60, 0
86 %tmp60 = load i32, i32* %arg1, align 4
87 %tmp61 = icmp eq i32 %tmp60, 0
88 br i1 %tmp61, label %bb62, label %bb64
91 %tmp63 = load volatile i32**, i32*** @g_1276, align 8
95 %tmp65 = load volatile i32**, i32*** @g_1629, align 8
98 ; uselistorder directives
99 uselistorder i32 %spec.select, { 1, 0 }
100 uselistorder i32* %arg1, { 1, 0 }
101 uselistorder label %bb64, { 1, 0 }
102 uselistorder label %bb52, { 1, 0 }
103 uselistorder label %bb41, { 1, 0 }
104 uselistorder label %safe_div_func_uint8_t_u_u.exit, { 1, 0 }
107 define zeroext i8 @safe_div_func_uint8_t_u_u(i8 zeroext %arg, i8 zeroext %arg1) {
109 %tmp5 = icmp eq i8 %arg1, 0
110 br i1 %tmp5, label %bb12, label %bb8
113 %0 = udiv i8 %arg, %arg1
117 %tmp13.in = phi i8 [ %0, %bb8 ], [ %arg, %bb ]