[InstCombine] Signed saturation patterns
[llvm-core.git] / test / tools / llvm-mca / X86 / SkylakeServer / resources-clwb.s
blob3c4b5dc3f4482ad8f0e810f689aacbf58bebaa13
1 # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
2 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=skylake-avx512 -instruction-tables < %s | FileCheck %s
4 clwb (%rax)
6 # CHECK: Instruction Info:
7 # CHECK-NEXT: [1]: #uOps
8 # CHECK-NEXT: [2]: Latency
9 # CHECK-NEXT: [3]: RThroughput
10 # CHECK-NEXT: [4]: MayLoad
11 # CHECK-NEXT: [5]: MayStore
12 # CHECK-NEXT: [6]: HasSideEffects (U)
14 # CHECK: [1] [2] [3] [4] [5] [6] Instructions:
15 # CHECK-NEXT: 1 5 0.50 * * U clwb (%rax)
17 # CHECK: Resources:
18 # CHECK-NEXT: [0] - SKXDivider
19 # CHECK-NEXT: [1] - SKXFPDivider
20 # CHECK-NEXT: [2] - SKXPort0
21 # CHECK-NEXT: [3] - SKXPort1
22 # CHECK-NEXT: [4] - SKXPort2
23 # CHECK-NEXT: [5] - SKXPort3
24 # CHECK-NEXT: [6] - SKXPort4
25 # CHECK-NEXT: [7] - SKXPort5
26 # CHECK-NEXT: [8] - SKXPort6
27 # CHECK-NEXT: [9] - SKXPort7
29 # CHECK: Resource pressure per iteration:
30 # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9]
31 # CHECK-NEXT: - - - - 0.50 0.50 - - - -
33 # CHECK: Resource pressure by instruction:
34 # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
35 # CHECK-NEXT: - - - - 0.50 0.50 - - - - clwb (%rax)