1 # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
2 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=skylake-avx512 -instruction-tables < %s | FileCheck %s
9 # CHECK: Instruction Info:
10 # CHECK-NEXT: [1]: #uOps
11 # CHECK-NEXT: [2]: Latency
12 # CHECK-NEXT: [3]: RThroughput
13 # CHECK-NEXT: [4]: MayLoad
14 # CHECK-NEXT: [5]: MayStore
15 # CHECK-NEXT: [6]: HasSideEffects (U)
17 # CHECK: [1] [2] [3] [4] [5] [6] Instructions:
18 # CHECK-NEXT: 14 16 2.75 * * cmpxchg8b (%rax)
19 # CHECK-NEXT: 19 23 4.00 * * cmpxchg16b (%rax)
20 # CHECK-NEXT: 14 16 2.75 * * lock cmpxchg8b (%rax)
21 # CHECK-NEXT: 19 23 4.00 * * lock cmpxchg16b (%rax)
24 # CHECK-NEXT: [0] - SKXDivider
25 # CHECK-NEXT: [1] - SKXFPDivider
26 # CHECK-NEXT: [2] - SKXPort0
27 # CHECK-NEXT: [3] - SKXPort1
28 # CHECK-NEXT: [4] - SKXPort2
29 # CHECK-NEXT: [5] - SKXPort3
30 # CHECK-NEXT: [6] - SKXPort4
31 # CHECK-NEXT: [7] - SKXPort5
32 # CHECK-NEXT: [8] - SKXPort6
33 # CHECK-NEXT: [9] - SKXPort7
35 # CHECK: Resource pressure per iteration:
36 # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9]
37 # CHECK-NEXT: - - 17.50 7.50 3.33 3.33 4.00 15.50 13.50 1.33
39 # CHECK: Resource pressure by instruction:
40 # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
41 # CHECK-NEXT: - - 3.25 2.25 0.83 0.83 1.00 2.25 3.25 0.33 cmpxchg8b (%rax)
42 # CHECK-NEXT: - - 5.50 1.50 0.83 0.83 1.00 5.50 3.50 0.33 cmpxchg16b (%rax)
43 # CHECK-NEXT: - - 3.25 2.25 0.83 0.83 1.00 2.25 3.25 0.33 lock cmpxchg8b (%rax)
44 # CHECK-NEXT: - - 5.50 1.50 0.83 0.83 1.00 5.50 3.50 0.33 lock cmpxchg16b (%rax)