1 ; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tahiti -verify-machineinstrs< %s | FileCheck -check-prefixes=GCN,SICIVI,FUNC %s
2 ; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefixes=GCN,SICIVI,FUNC %s
3 ; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx900 -verify-machineinstrs< %s | FileCheck -check-prefixes=GCN,GFX9,FUNC %s
6 declare { i32, i1 } @llvm.sadd.with.overflow.i32(i32, i32) nounwind readnone
7 declare { i64, i1 } @llvm.sadd.with.overflow.i64(i64, i64) nounwind readnone
10 declare { <2 x i32>, <2 x i1> } @llvm.sadd.with.overflow.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
12 ; FUNC-LABEL: {{^}}saddo_i64_zext:
13 define amdgpu_kernel void @saddo_i64_zext(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind {
14 %sadd = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %a, i64 %b) nounwind
15 %val = extractvalue { i64, i1 } %sadd, 0
16 %carry = extractvalue { i64, i1 } %sadd, 1
17 %ext = zext i1 %carry to i64
18 %add2 = add i64 %val, %ext
19 store i64 %add2, i64 addrspace(1)* %out, align 8
23 ; FUNC-LABEL: {{^}}s_saddo_i32:
24 define amdgpu_kernel void @s_saddo_i32(i32 addrspace(1)* %out, i1 addrspace(1)* %carryout, i32 %a, i32 %b) nounwind {
25 %sadd = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %a, i32 %b) nounwind
26 %val = extractvalue { i32, i1 } %sadd, 0
27 %carry = extractvalue { i32, i1 } %sadd, 1
28 store i32 %val, i32 addrspace(1)* %out, align 4
29 store i1 %carry, i1 addrspace(1)* %carryout
33 ; FUNC-LABEL: {{^}}v_saddo_i32:
34 define amdgpu_kernel void @v_saddo_i32(i32 addrspace(1)* %out, i1 addrspace(1)* %carryout, i32 addrspace(1)* %aptr, i32 addrspace(1)* %bptr) nounwind {
35 %a = load i32, i32 addrspace(1)* %aptr, align 4
36 %b = load i32, i32 addrspace(1)* %bptr, align 4
37 %sadd = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %a, i32 %b) nounwind
38 %val = extractvalue { i32, i1 } %sadd, 0
39 %carry = extractvalue { i32, i1 } %sadd, 1
40 store i32 %val, i32 addrspace(1)* %out, align 4
41 store i1 %carry, i1 addrspace(1)* %carryout
45 ; FUNC-LABEL: {{^}}s_saddo_i64:
46 define amdgpu_kernel void @s_saddo_i64(i64 addrspace(1)* %out, i1 addrspace(1)* %carryout, i64 %a, i64 %b) nounwind {
47 %sadd = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %a, i64 %b) nounwind
48 %val = extractvalue { i64, i1 } %sadd, 0
49 %carry = extractvalue { i64, i1 } %sadd, 1
50 store i64 %val, i64 addrspace(1)* %out, align 8
51 store i1 %carry, i1 addrspace(1)* %carryout
55 ; FUNC-LABEL: {{^}}v_saddo_i64:
56 ; SICIVI: v_add_{{[iu]}}32_e32 v{{[0-9]+}}, vcc
57 ; SICIVI: v_addc_u32_e32 v{{[0-9]+}}, vcc
59 ; GFX9: v_add_co_u32_e32 v{{[0-9]+}}, vcc
60 ; GFX9: v_addc_co_u32_e32 v{{[0-9]+}}, vcc
61 define amdgpu_kernel void @v_saddo_i64(i64 addrspace(1)* %out, i1 addrspace(1)* %carryout, i64 addrspace(1)* %aptr, i64 addrspace(1)* %bptr) nounwind {
62 %a = load i64, i64 addrspace(1)* %aptr, align 4
63 %b = load i64, i64 addrspace(1)* %bptr, align 4
64 %sadd = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %a, i64 %b) nounwind
65 %val = extractvalue { i64, i1 } %sadd, 0
66 %carry = extractvalue { i64, i1 } %sadd, 1
67 store i64 %val, i64 addrspace(1)* %out, align 8
68 store i1 %carry, i1 addrspace(1)* %carryout
72 ; FUNC-LABEL: {{^}}v_saddo_v2i32:
73 ; SICIVI: v_cmp_lt_i32
74 ; SICIVI: v_cmp_lt_i32
75 ; SICIVI: v_add_{{[iu]}}32
76 ; SICIVI: v_cmp_lt_i32
77 ; SICIVI: v_cmp_lt_i32
78 ; SICIVI: v_add_{{[iu]}}32
79 define amdgpu_kernel void @v_saddo_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %carryout, <2 x i32> addrspace(1)* %aptr, <2 x i32> addrspace(1)* %bptr) nounwind {
80 %a = load <2 x i32>, <2 x i32> addrspace(1)* %aptr, align 4
81 %b = load <2 x i32>, <2 x i32> addrspace(1)* %bptr, align 4
82 %sadd = call { <2 x i32>, <2 x i1> } @llvm.sadd.with.overflow.v2i32(<2 x i32> %a, <2 x i32> %b) nounwind
83 %val = extractvalue { <2 x i32>, <2 x i1> } %sadd, 0
84 %carry = extractvalue { <2 x i32>, <2 x i1> } %sadd, 1
85 store <2 x i32> %val, <2 x i32> addrspace(1)* %out, align 4
86 %carry.ext = zext <2 x i1> %carry to <2 x i32>
87 store <2 x i32> %carry.ext, <2 x i32> addrspace(1)* %carryout