| commit | 14c68ddd6dd6e074c2405421eb13b0abb2f555fd | |
| author | David Green <david.green@arm.com> | |
| Tue, 3 Sep 2019 09:57:02 +0000 (3 09:57 +0000) | ||
| committer | David Green <david.green@arm.com> | |
| Tue, 3 Sep 2019 09:57:02 +0000 (3 09:57 +0000) | ||
| tree | 4497d46b90931e554f3b13240b4e2fba18b40789 | treesnapshot (tar.gz zip) |
| parent | 6e6a89a79276314c40c702a6107a385f048c15ba | commitdiff |
[ARM] Fix MVE ldst offset ranges
We were using isShiftedInt<7, Shift>(RHSC) to detect the ranges of offsets to
fold into MVE loads/stores. The instructions actually take a 7 bit unsigned
integer which is either added or subtracted. So something more like
isShiftedUInt<7, Shift>(abs(RHSC)).
Instead I've changes this to use the isScaledConstantInRange method, same as in
SelectT2AddrModeImm7Offset used by pre/post inc, which seemed to already be
getting this correct.
Differential revision: https://reviews.llvm.org/D66997
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@370731 91177308-0d34-0410-b5e6-96231b3b80d8
We were using isShiftedInt<7, Shift>(RHSC) to detect the ranges of offsets to
fold into MVE loads/stores. The instructions actually take a 7 bit unsigned
integer which is either added or subtracted. So something more like
isShiftedUInt<7, Shift>(abs(RHSC)).
Instead I've changes this to use the isScaledConstantInRange method, same as in
SelectT2AddrModeImm7Offset used by pre/post inc, which seemed to already be
getting this correct.
Differential revision: https://reviews.llvm.org/D66997
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@370731 91177308-0d34-0410-b5e6-96231b3b80d8
| lib/Target/ARM/ARMISelDAGToDAG.cpp | diffblobblamehistory | |
| test/CodeGen/Thumb2/mve-ldst-offset.ll | diffblobblamehistory | |
| test/CodeGen/Thumb2/mve-loadstore.ll | diffblobblamehistory |