| commit | 210c72c1b12e72d1d7fd69951ba40ffb1a2b0b3d | |
| author | Craig Topper <craig.topper@intel.com> | |
| Mon, 13 May 2019 21:01:24 +0000 (13 21:01 +0000) | ||
| committer | Craig Topper <craig.topper@intel.com> | |
| Mon, 13 May 2019 21:01:24 +0000 (13 21:01 +0000) | ||
| tree | e9a6fc7ec0cfef008179e3ba06e12868875c9256 | treesnapshot (tar.gz zip) |
| parent | 803e94e6d3d837dcdf034ebd1c414c6b92d5a119 | commitdiff |
[X86] Various type corrections to the code that creates LOCK_OR32mi8/OR32mi8Locked to the stack for idempotent atomic rmw and atomic fence.
These are updates to match how isel table would emit a LOCK_OR32mi8 node.
-Use i32 for the immediate zero even though only 8 bits are encoded.
-Use i16 for segment register.
-Use LOCK_OR32mi8 for idempotent atomic operations in 32-bit mode to match
64-bit mode. I'm not sure why OR32mi8Locked and LOCK_OR32mi8 both exist. The
only difference seems to be that OR32mi8Locked is marked as UnmodeledSideEffects=1.
-Emit an extra i32 result for the flags output.
I don't know if the types here really matter just noticed it was inconsistent
with normal behavior.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@360619 91177308-0d34-0410-b5e6-96231b3b80d8
These are updates to match how isel table would emit a LOCK_OR32mi8 node.
-Use i32 for the immediate zero even though only 8 bits are encoded.
-Use i16 for segment register.
-Use LOCK_OR32mi8 for idempotent atomic operations in 32-bit mode to match
64-bit mode. I'm not sure why OR32mi8Locked and LOCK_OR32mi8 both exist. The
only difference seems to be that OR32mi8Locked is marked as UnmodeledSideEffects=1.
-Emit an extra i32 result for the flags output.
I don't know if the types here really matter just noticed it was inconsistent
with normal behavior.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@360619 91177308-0d34-0410-b5e6-96231b3b80d8
| lib/Target/X86/X86ISelLowering.cpp | diffblobblamehistory |