Reland: Fix and test inter-procedural register allocation for ARM
commit61d2734e2d937641e31843162960cf06d64d668f
authorOliver Stannard <oliver.stannard@linaro.org>
Mon, 5 Aug 2019 09:04:10 +0000 (5 09:04 +0000)
committerOliver Stannard <oliver.stannard@linaro.org>
Mon, 5 Aug 2019 09:04:10 +0000 (5 09:04 +0000)
tree2a449682c1f1e154bfb0b3ff902b4a1bb6bc6342
parentf76a78bfee3b4125e6db9361ffbd7848e77252f6
Reland: Fix and test inter-procedural register allocation for ARM

Add an explicit construction of the ArrayRef, gcc 5 and earlier don't
seem to select the ArrayRef constructor which takes a C array when the
construction is implicit.

Original commit message:

- Avoid a crash when IPRA calls ARMFrameLowering::determineCalleeSaves
  with a null RegScavenger. Simply not updating the register scavenger
  is fine because IPRA only cares about the SavedRegs vector, the acutal
  code of the function has already been generated at this point.
- Add a new hook to TargetRegisterInfo to get the set of registers which
  can be clobbered inside a call, even if the compiler can see both
  sides, by linker-generated code.

Differential revision: https://reviews.llvm.org/D64908

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367819 91177308-0d34-0410-b5e6-96231b3b80d8
include/llvm/CodeGen/TargetRegisterInfo.h
lib/CodeGen/RegUsageInfoCollector.cpp
lib/Target/ARM/ARMBaseRegisterInfo.cpp
lib/Target/ARM/ARMBaseRegisterInfo.h
lib/Target/ARM/ARMFrameLowering.cpp
test/CodeGen/ARM/ipra.ll [new file with mode: 0644]