| commit | 62dd6f64a054b4188e4d7d76c0967311e10d3460 | |
| author | Craig Topper <craig.topper@intel.com> | |
| Sat, 26 Jan 2019 01:17:09 +0000 (26 01:17 +0000) | ||
| committer | Craig Topper <craig.topper@intel.com> | |
| Sat, 26 Jan 2019 01:17:09 +0000 (26 01:17 +0000) | ||
| tree | 996388675c205552424524fab8a0270fb70068e0 | treesnapshot (tar.gz zip) |
| parent | 020a696694df6bd919e68f26f81d91e457c739dc | commitdiff |
[X86] Add DAG combine to merge vzext_movl with the various fp<->int conversion operations that only write the lower 64-bits of an xmm register and zero the rest.
Summary: We have isel patterns for this, but we're missing some load patterns and all broadcast patterns. A DAG combine seems like a better fit for this.
Reviewers: RKSimon, spatel
Reviewed By: RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D56971
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352260 91177308-0d34-0410-b5e6-96231b3b80d8
Summary: We have isel patterns for this, but we're missing some load patterns and all broadcast patterns. A DAG combine seems like a better fit for this.
Reviewers: RKSimon, spatel
Reviewed By: RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D56971
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352260 91177308-0d34-0410-b5e6-96231b3b80d8