[PowerPC] Sign-extend negative constant stores
commit6c0ae87241fcdd95aacfd89d70216fb3fb9aba07
authorNemanja Ivanovic <nemanja.i.ibm@gmail.com>
Mon, 11 Dec 2017 14:35:48 +0000 (11 14:35 +0000)
committerNemanja Ivanovic <nemanja.i.ibm@gmail.com>
Mon, 11 Dec 2017 14:35:48 +0000 (11 14:35 +0000)
tree1af8f627e653e74869d522c0df257809be372c76
parent3386088d3ed65b1d5a446bce6eab00d6dbebffc8
[PowerPC] Sign-extend negative constant stores

Second part of https://reviews.llvm.org/D40348.
Revision r318436 has extended all constants feeding a store to 64 bits
to allow for CSE on the SDAG. However, negative constants were zero extended
which made the constant being loaded appear to be a positive value larger than
16 bits. This resulted in long sequences to materialize such constants
rather than simply a "load immediate". This patch just sign-extends those
updated constants so that they remain 16-bit signed immediates if they started
out that way.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320368 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/PowerPC/PPCISelLowering.cpp
test/CodeGen/PowerPC/testComparesigeui.ll
test/CodeGen/PowerPC/testComparesllgeui.ll