clang/test/OpenMP/distribute_parallel_for_simd_num_threads_codegen.cpp

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
   2 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK1
   3 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
   4 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2
   5
   6 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK3
   7 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
   8 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4
   9
  10 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK5
  11 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
  12 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6
  13
  14 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK7
  15 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
  16 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK8
  17
  18 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK9
  19 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
  20 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10
  21
  22 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK11
  23 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
  24 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12
  25
  26 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK13
  27 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
  28 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK14
  29
  30 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK15
  31 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
  32 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK16
  33
  34 // expected-no-diagnostics
  35 #ifndef HEADER
  36 #define HEADER
  37
  38 typedef __INTPTR_TYPE__ intptr_t;
  39
  40
  41 void foo();
  42
  43 struct S {
  44   intptr_t a, b, c;
  45   S(intptr_t a) : a(a) {}
  46   operator char() {  extern void mayThrow(); mayThrow(); return a; }
  47   ~S() {}
  48 };
  49
  50 template <typename T, int C>
  51 int tmain() {
  52 #pragma omp target
  53 #pragma omp teams
  54 #pragma omp distribute parallel for simd num_threads(C)
  55   for (int i = 0; i < 100; i++)
  56     foo();
  57 #pragma omp target
  58 #pragma omp teams
  59 #pragma omp distribute parallel for simd num_threads(T(23))
  60   for (int i = 0; i < 100; i++)
  61     foo();
  62   return 0;
  63 }
  64
  65 int main() {
  66   S s(0);
  67   char a = s;
  68 #pragma omp target
  69 #pragma omp teams
  70 #pragma omp distribute parallel for simd num_threads(2)
  71   for (int i = 0; i < 100; i++) {
  72     foo();
  73   }
  74 #pragma omp target
  75 #pragma omp teams
  76
  77 #pragma omp distribute parallel for simd num_threads(a)
  78   for (int i = 0; i < 100; i++) {
  79     foo();
  80   }
  81   return a + tmain<char, 5>() + tmain<S, 1>();
  82 }
  83
  84 // tmain 5
  85
  86 // tmain 1
  87
  88
  89
  90
  91
  92
  93
  94
  95 #endif
  96 // CHECK1-LABEL: define {{[^@]+}}@main
  97 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
  98 // CHECK1-NEXT:  entry:
  99 // CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
 100 // CHECK1-NEXT:    [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
 101 // CHECK1-NEXT:    [[A:%.*]] = alloca i8, align 1
 102 // CHECK1-NEXT:    [[EXN_SLOT:%.*]] = alloca i8*, align 8
 103 // CHECK1-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
 104 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 105 // CHECK1-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
 106 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
 107 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
 108 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
 109 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
 110 // CHECK1-NEXT:    store i32 0, i32* [[RETVAL]], align 4
 111 // CHECK1-NEXT:    call void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[S]], i64 0)
 112 // CHECK1-NEXT:    [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[S]])
 113 // CHECK1-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
 114 // CHECK1:       invoke.cont:
 115 // CHECK1-NEXT:    store i8 [[CALL]], i8* [[A]], align 1
 116 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100)
 117 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
 118 // CHECK1-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
 119 // CHECK1-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
 120 // CHECK1:       omp_offload.failed:
 121 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR6:[0-9]+]]
 122 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
 123 // CHECK1:       lpad:
 124 // CHECK1-NEXT:    [[TMP2:%.*]] = landingpad { i8*, i32 }
 125 // CHECK1-NEXT:    cleanup
 126 // CHECK1-NEXT:    [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0
 127 // CHECK1-NEXT:    store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8
 128 // CHECK1-NEXT:    [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1
 129 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4
 130 // CHECK1-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
 131 // CHECK1-NEXT:    br label [[EH_RESUME:%.*]]
 132 // CHECK1:       omp_offload.cont:
 133 // CHECK1-NEXT:    [[TMP5:%.*]] = load i8, i8* [[A]], align 1
 134 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8*
 135 // CHECK1-NEXT:    store i8 [[TMP5]], i8* [[CONV]], align 1
 136 // CHECK1-NEXT:    [[TMP6:%.*]] = load i64, i64* [[A_CASTED]], align 8
 137 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 138 // CHECK1-NEXT:    [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
 139 // CHECK1-NEXT:    store i64 [[TMP6]], i64* [[TMP8]], align 8
 140 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 141 // CHECK1-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
 142 // CHECK1-NEXT:    store i64 [[TMP6]], i64* [[TMP10]], align 8
 143 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
 144 // CHECK1-NEXT:    store i8* null, i8** [[TMP11]], align 8
 145 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 146 // CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 147 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
 148 // CHECK1-NEXT:    [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, i32 1, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
 149 // CHECK1-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
 150 // CHECK1-NEXT:    br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
 151 // CHECK1:       omp_offload.failed2:
 152 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP6]]) #[[ATTR6]]
 153 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
 154 // CHECK1:       omp_offload.cont3:
 155 // CHECK1-NEXT:    [[TMP16:%.*]] = load i8, i8* [[A]], align 1
 156 // CHECK1-NEXT:    [[CONV4:%.*]] = sext i8 [[TMP16]] to i32
 157 // CHECK1-NEXT:    [[CALL6:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv()
 158 // CHECK1-NEXT:    to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]]
 159 // CHECK1:       invoke.cont5:
 160 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[CONV4]], [[CALL6]]
 161 // CHECK1-NEXT:    [[CALL8:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv()
 162 // CHECK1-NEXT:    to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD]]
 163 // CHECK1:       invoke.cont7:
 164 // CHECK1-NEXT:    [[ADD9:%.*]] = add nsw i32 [[ADD]], [[CALL8]]
 165 // CHECK1-NEXT:    store i32 [[ADD9]], i32* [[RETVAL]], align 4
 166 // CHECK1-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
 167 // CHECK1-NEXT:    [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4
 168 // CHECK1-NEXT:    ret i32 [[TMP17]]
 169 // CHECK1:       eh.resume:
 170 // CHECK1-NEXT:    [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8
 171 // CHECK1-NEXT:    [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
 172 // CHECK1-NEXT:    [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
 173 // CHECK1-NEXT:    [[LPAD_VAL10:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
 174 // CHECK1-NEXT:    resume { i8*, i32 } [[LPAD_VAL10]]
 175 //
 176 //
 177 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SC1El
 178 // CHECK1-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
 179 // CHECK1-NEXT:  entry:
 180 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
 181 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
 182 // CHECK1-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
 183 // CHECK1-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
 184 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
 185 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
 186 // CHECK1-NEXT:    call void @_ZN1SC2El(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]], i64 [[TMP0]])
 187 // CHECK1-NEXT:    ret void
 188 //
 189 //
 190 // CHECK1-LABEL: define {{[^@]+}}@_ZN1ScvcEv
 191 // CHECK1-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 {
 192 // CHECK1-NEXT:  entry:
 193 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
 194 // CHECK1-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
 195 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
 196 // CHECK1-NEXT:    call void @_Z8mayThrowv()
 197 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
 198 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A]], align 8
 199 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i8
 200 // CHECK1-NEXT:    ret i8 [[CONV]]
 201 //
 202 //
 203 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
 204 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] {
 205 // CHECK1-NEXT:  entry:
 206 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
 207 // CHECK1-NEXT:    ret void
 208 //
 209 //
 210 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
 211 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
 212 // CHECK1-NEXT:  entry:
 213 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
 214 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
 215 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 216 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 217 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 218 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 219 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 220 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 221 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 222 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
 223 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
 224 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
 225 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
 226 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
 227 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
 228 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
 229 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
 230 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
 231 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
 232 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
 233 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 234 // CHECK1:       cond.true:
 235 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 236 // CHECK1:       cond.false:
 237 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
 238 // CHECK1-NEXT:    br label [[COND_END]]
 239 // CHECK1:       cond.end:
 240 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
 241 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
 242 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
 243 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
 244 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 245 // CHECK1:       omp.inner.for.cond:
 246 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
 247 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !9
 248 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
 249 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 250 // CHECK1:       omp.inner.for.body:
 251 // CHECK1-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2), !llvm.access.group !9
 252 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !9
 253 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
 254 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !9
 255 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
 256 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !9
 257 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 258 // CHECK1:       omp.inner.for.inc:
 259 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
 260 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !9
 261 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
 262 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
 263 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
 264 // CHECK1:       omp.inner.for.end:
 265 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 266 // CHECK1:       omp.loop.exit:
 267 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
 268 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
 269 // CHECK1-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
 270 // CHECK1-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 271 // CHECK1:       .omp.final.then:
 272 // CHECK1-NEXT:    store i32 100, i32* [[I]], align 4
 273 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 274 // CHECK1:       .omp.final.done:
 275 // CHECK1-NEXT:    ret void
 276 //
 277 //
 278 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
 279 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
 280 // CHECK1-NEXT:  entry:
 281 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
 282 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
 283 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 284 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 285 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 286 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 287 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 288 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 289 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 290 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 291 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 292 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
 293 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
 294 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
 295 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
 296 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
 297 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
 298 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
 299 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
 300 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
 301 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
 302 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
 303 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
 304 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
 305 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
 306 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
 307 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
 308 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
 309 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
 310 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
 311 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 312 // CHECK1:       cond.true:
 313 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 314 // CHECK1:       cond.false:
 315 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
 316 // CHECK1-NEXT:    br label [[COND_END]]
 317 // CHECK1:       cond.end:
 318 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
 319 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
 320 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
 321 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
 322 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 323 // CHECK1:       omp.inner.for.cond:
 324 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
 325 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
 326 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
 327 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 328 // CHECK1:       omp.inner.for.body:
 329 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
 330 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
 331 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 332 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
 333 // CHECK1-NEXT:    invoke void @_Z3foov()
 334 // CHECK1-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !13
 335 // CHECK1:       invoke.cont:
 336 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 337 // CHECK1:       omp.body.continue:
 338 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 339 // CHECK1:       omp.inner.for.inc:
 340 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
 341 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
 342 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
 343 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
 344 // CHECK1:       omp.inner.for.end:
 345 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 346 // CHECK1:       omp.loop.exit:
 347 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
 348 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
 349 // CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
 350 // CHECK1-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 351 // CHECK1:       .omp.final.then:
 352 // CHECK1-NEXT:    store i32 100, i32* [[I]], align 4
 353 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 354 // CHECK1:       .omp.final.done:
 355 // CHECK1-NEXT:    ret void
 356 // CHECK1:       terminate.lpad:
 357 // CHECK1-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
 358 // CHECK1-NEXT:    catch i8* null
 359 // CHECK1-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
 360 // CHECK1-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10:[0-9]+]], !llvm.access.group !13
 361 // CHECK1-NEXT:    unreachable
 362 //
 363 //
 364 // CHECK1-LABEL: define {{[^@]+}}@__clang_call_terminate
 365 // CHECK1-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat {
 366 // CHECK1-NEXT:    [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]]
 367 // CHECK1-NEXT:    call void @_ZSt9terminatev() #[[ATTR10]]
 368 // CHECK1-NEXT:    unreachable
 369 //
 370 //
 371 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74
 372 // CHECK1-SAME: (i64 [[A:%.*]]) #[[ATTR3]] {
 373 // CHECK1-NEXT:  entry:
 374 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
 375 // CHECK1-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
 376 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8*
 377 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i8* [[CONV]])
 378 // CHECK1-NEXT:    ret void
 379 //
 380 //
 381 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2
 382 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i8* nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] {
 383 // CHECK1-NEXT:  entry:
 384 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
 385 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
 386 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca i8*, align 8
 387 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 388 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 389 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 390 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 391 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 392 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 393 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 394 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
 395 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
 396 // CHECK1-NEXT:    store i8* [[A]], i8** [[A_ADDR]], align 8
 397 // CHECK1-NEXT:    [[TMP0:%.*]] = load i8*, i8** [[A_ADDR]], align 8
 398 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
 399 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
 400 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
 401 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
 402 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
 403 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
 404 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
 405 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
 406 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
 407 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 408 // CHECK1:       cond.true:
 409 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 410 // CHECK1:       cond.false:
 411 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
 412 // CHECK1-NEXT:    br label [[COND_END]]
 413 // CHECK1:       cond.end:
 414 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
 415 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
 416 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
 417 // CHECK1-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
 418 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 419 // CHECK1:       omp.inner.for.cond:
 420 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
 421 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !18
 422 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
 423 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 424 // CHECK1:       omp.inner.for.body:
 425 // CHECK1-NEXT:    [[TMP8:%.*]] = load i8, i8* [[TMP0]], align 1, !llvm.access.group !18
 426 // CHECK1-NEXT:    [[TMP9:%.*]] = sext i8 [[TMP8]] to i32
 427 // CHECK1-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]]), !llvm.access.group !18
 428 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !18
 429 // CHECK1-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
 430 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !18
 431 // CHECK1-NEXT:    [[TMP13:%.*]] = zext i32 [[TMP12]] to i64
 432 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]]), !llvm.access.group !18
 433 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 434 // CHECK1:       omp.inner.for.inc:
 435 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
 436 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !18
 437 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
 438 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
 439 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
 440 // CHECK1:       omp.inner.for.end:
 441 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 442 // CHECK1:       omp.loop.exit:
 443 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
 444 // CHECK1-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
 445 // CHECK1-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
 446 // CHECK1-NEXT:    br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 447 // CHECK1:       .omp.final.then:
 448 // CHECK1-NEXT:    store i32 100, i32* [[I]], align 4
 449 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 450 // CHECK1:       .omp.final.done:
 451 // CHECK1-NEXT:    ret void
 452 //
 453 //
 454 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3
 455 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
 456 // CHECK1-NEXT:  entry:
 457 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
 458 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
 459 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 460 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 461 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 462 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 463 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 464 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 465 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 466 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 467 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 468 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
 469 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
 470 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
 471 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
 472 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
 473 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
 474 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
 475 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
 476 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
 477 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
 478 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
 479 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
 480 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
 481 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
 482 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
 483 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
 484 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
 485 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
 486 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
 487 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 488 // CHECK1:       cond.true:
 489 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 490 // CHECK1:       cond.false:
 491 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
 492 // CHECK1-NEXT:    br label [[COND_END]]
 493 // CHECK1:       cond.end:
 494 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
 495 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
 496 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
 497 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
 498 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 499 // CHECK1:       omp.inner.for.cond:
 500 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
 501 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21
 502 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
 503 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 504 // CHECK1:       omp.inner.for.body:
 505 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
 506 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
 507 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 508 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21
 509 // CHECK1-NEXT:    invoke void @_Z3foov()
 510 // CHECK1-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !21
 511 // CHECK1:       invoke.cont:
 512 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 513 // CHECK1:       omp.body.continue:
 514 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 515 // CHECK1:       omp.inner.for.inc:
 516 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
 517 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
 518 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
 519 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
 520 // CHECK1:       omp.inner.for.end:
 521 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 522 // CHECK1:       omp.loop.exit:
 523 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
 524 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
 525 // CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
 526 // CHECK1-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 527 // CHECK1:       .omp.final.then:
 528 // CHECK1-NEXT:    store i32 100, i32* [[I]], align 4
 529 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 530 // CHECK1:       .omp.final.done:
 531 // CHECK1-NEXT:    ret void
 532 // CHECK1:       terminate.lpad:
 533 // CHECK1-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
 534 // CHECK1-NEXT:    catch i8* null
 535 // CHECK1-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
 536 // CHECK1-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !21
 537 // CHECK1-NEXT:    unreachable
 538 //
 539 //
 540 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv
 541 // CHECK1-SAME: () #[[ATTR7:[0-9]+]] comdat {
 542 // CHECK1-NEXT:  entry:
 543 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 544 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
 545 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
 546 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
 547 // CHECK1-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
 548 // CHECK1-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
 549 // CHECK1:       omp_offload.failed:
 550 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR6]]
 551 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
 552 // CHECK1:       omp_offload.cont:
 553 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
 554 // CHECK1-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
 555 // CHECK1-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
 556 // CHECK1-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
 557 // CHECK1:       omp_offload.failed2:
 558 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR6]]
 559 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
 560 // CHECK1:       omp_offload.cont3:
 561 // CHECK1-NEXT:    ret i32 0
 562 //
 563 //
 564 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv
 565 // CHECK1-SAME: () #[[ATTR7]] comdat {
 566 // CHECK1-NEXT:  entry:
 567 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 568 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
 569 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
 570 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
 571 // CHECK1-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
 572 // CHECK1-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
 573 // CHECK1:       omp_offload.failed:
 574 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR6]]
 575 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
 576 // CHECK1:       omp_offload.cont:
 577 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
 578 // CHECK1-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
 579 // CHECK1-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
 580 // CHECK1-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
 581 // CHECK1:       omp_offload.failed2:
 582 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR6]]
 583 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
 584 // CHECK1:       omp_offload.cont3:
 585 // CHECK1-NEXT:    ret i32 0
 586 //
 587 //
 588 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SD1Ev
 589 // CHECK1-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 {
 590 // CHECK1-NEXT:  entry:
 591 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
 592 // CHECK1-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
 593 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
 594 // CHECK1-NEXT:    call void @_ZN1SD2Ev(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR6]]
 595 // CHECK1-NEXT:    ret void
 596 //
 597 //
 598 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SC2El
 599 // CHECK1-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
 600 // CHECK1-NEXT:  entry:
 601 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
 602 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
 603 // CHECK1-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
 604 // CHECK1-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
 605 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
 606 // CHECK1-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
 607 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
 608 // CHECK1-NEXT:    store i64 [[TMP0]], i64* [[A2]], align 8
 609 // CHECK1-NEXT:    ret void
 610 //
 611 //
 612 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SD2Ev
 613 // CHECK1-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
 614 // CHECK1-NEXT:  entry:
 615 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
 616 // CHECK1-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
 617 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
 618 // CHECK1-NEXT:    ret void
 619 //
 620 //
 621 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52
 622 // CHECK1-SAME: () #[[ATTR3]] {
 623 // CHECK1-NEXT:  entry:
 624 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
 625 // CHECK1-NEXT:    ret void
 626 //
 627 //
 628 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4
 629 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
 630 // CHECK1-NEXT:  entry:
 631 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
 632 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
 633 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 634 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 635 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 636 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 637 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 638 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 639 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 640 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
 641 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
 642 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
 643 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
 644 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
 645 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
 646 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
 647 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
 648 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
 649 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
 650 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
 651 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 652 // CHECK1:       cond.true:
 653 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 654 // CHECK1:       cond.false:
 655 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
 656 // CHECK1-NEXT:    br label [[COND_END]]
 657 // CHECK1:       cond.end:
 658 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
 659 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
 660 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
 661 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
 662 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 663 // CHECK1:       omp.inner.for.cond:
 664 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
 665 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !24
 666 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
 667 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 668 // CHECK1:       omp.inner.for.body:
 669 // CHECK1-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5), !llvm.access.group !24
 670 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !24
 671 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
 672 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !24
 673 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
 674 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !24
 675 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 676 // CHECK1:       omp.inner.for.inc:
 677 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
 678 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !24
 679 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
 680 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
 681 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
 682 // CHECK1:       omp.inner.for.end:
 683 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 684 // CHECK1:       omp.loop.exit:
 685 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
 686 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
 687 // CHECK1-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
 688 // CHECK1-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 689 // CHECK1:       .omp.final.then:
 690 // CHECK1-NEXT:    store i32 100, i32* [[I]], align 4
 691 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 692 // CHECK1:       .omp.final.done:
 693 // CHECK1-NEXT:    ret void
 694 //
 695 //
 696 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5
 697 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
 698 // CHECK1-NEXT:  entry:
 699 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
 700 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
 701 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 702 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 703 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 704 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 705 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 706 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 707 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 708 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 709 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 710 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
 711 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
 712 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
 713 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
 714 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
 715 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
 716 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
 717 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
 718 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
 719 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
 720 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
 721 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
 722 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
 723 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
 724 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
 725 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
 726 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
 727 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
 728 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
 729 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 730 // CHECK1:       cond.true:
 731 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 732 // CHECK1:       cond.false:
 733 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
 734 // CHECK1-NEXT:    br label [[COND_END]]
 735 // CHECK1:       cond.end:
 736 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
 737 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
 738 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
 739 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
 740 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 741 // CHECK1:       omp.inner.for.cond:
 742 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
 743 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !27
 744 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
 745 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 746 // CHECK1:       omp.inner.for.body:
 747 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
 748 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
 749 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 750 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !27
 751 // CHECK1-NEXT:    invoke void @_Z3foov()
 752 // CHECK1-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !27
 753 // CHECK1:       invoke.cont:
 754 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 755 // CHECK1:       omp.body.continue:
 756 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 757 // CHECK1:       omp.inner.for.inc:
 758 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
 759 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
 760 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
 761 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]
 762 // CHECK1:       omp.inner.for.end:
 763 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 764 // CHECK1:       omp.loop.exit:
 765 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
 766 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
 767 // CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
 768 // CHECK1-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 769 // CHECK1:       .omp.final.then:
 770 // CHECK1-NEXT:    store i32 100, i32* [[I]], align 4
 771 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 772 // CHECK1:       .omp.final.done:
 773 // CHECK1-NEXT:    ret void
 774 // CHECK1:       terminate.lpad:
 775 // CHECK1-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
 776 // CHECK1-NEXT:    catch i8* null
 777 // CHECK1-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
 778 // CHECK1-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !27
 779 // CHECK1-NEXT:    unreachable
 780 //
 781 //
 782 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57
 783 // CHECK1-SAME: () #[[ATTR3]] {
 784 // CHECK1-NEXT:  entry:
 785 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
 786 // CHECK1-NEXT:    ret void
 787 //
 788 //
 789 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6
 790 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
 791 // CHECK1-NEXT:  entry:
 792 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
 793 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
 794 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 795 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 796 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 797 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 798 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 799 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 800 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 801 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
 802 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
 803 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
 804 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
 805 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
 806 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
 807 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
 808 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
 809 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
 810 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
 811 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
 812 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 813 // CHECK1:       cond.true:
 814 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 815 // CHECK1:       cond.false:
 816 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
 817 // CHECK1-NEXT:    br label [[COND_END]]
 818 // CHECK1:       cond.end:
 819 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
 820 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
 821 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
 822 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
 823 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 824 // CHECK1:       omp.inner.for.cond:
 825 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30
 826 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !30
 827 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
 828 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 829 // CHECK1:       omp.inner.for.body:
 830 // CHECK1-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23), !llvm.access.group !30
 831 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !30
 832 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
 833 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !30
 834 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
 835 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !30
 836 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 837 // CHECK1:       omp.inner.for.inc:
 838 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30
 839 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !30
 840 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
 841 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30
 842 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]
 843 // CHECK1:       omp.inner.for.end:
 844 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 845 // CHECK1:       omp.loop.exit:
 846 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
 847 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
 848 // CHECK1-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
 849 // CHECK1-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 850 // CHECK1:       .omp.final.then:
 851 // CHECK1-NEXT:    store i32 100, i32* [[I]], align 4
 852 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 853 // CHECK1:       .omp.final.done:
 854 // CHECK1-NEXT:    ret void
 855 //
 856 //
 857 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7
 858 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
 859 // CHECK1-NEXT:  entry:
 860 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
 861 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
 862 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 863 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 864 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 865 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 866 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 867 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 868 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 869 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 870 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 871 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
 872 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
 873 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
 874 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
 875 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
 876 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
 877 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
 878 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
 879 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
 880 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
 881 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
 882 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
 883 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
 884 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
 885 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
 886 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
 887 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
 888 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
 889 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
 890 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 891 // CHECK1:       cond.true:
 892 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 893 // CHECK1:       cond.false:
 894 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
 895 // CHECK1-NEXT:    br label [[COND_END]]
 896 // CHECK1:       cond.end:
 897 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
 898 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
 899 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
 900 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
 901 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 902 // CHECK1:       omp.inner.for.cond:
 903 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
 904 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !33
 905 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
 906 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 907 // CHECK1:       omp.inner.for.body:
 908 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
 909 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
 910 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 911 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !33
 912 // CHECK1-NEXT:    invoke void @_Z3foov()
 913 // CHECK1-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !33
 914 // CHECK1:       invoke.cont:
 915 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 916 // CHECK1:       omp.body.continue:
 917 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 918 // CHECK1:       omp.inner.for.inc:
 919 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
 920 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
 921 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
 922 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
 923 // CHECK1:       omp.inner.for.end:
 924 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 925 // CHECK1:       omp.loop.exit:
 926 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
 927 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
 928 // CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
 929 // CHECK1-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 930 // CHECK1:       .omp.final.then:
 931 // CHECK1-NEXT:    store i32 100, i32* [[I]], align 4
 932 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 933 // CHECK1:       .omp.final.done:
 934 // CHECK1-NEXT:    ret void
 935 // CHECK1:       terminate.lpad:
 936 // CHECK1-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
 937 // CHECK1-NEXT:    catch i8* null
 938 // CHECK1-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
 939 // CHECK1-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !33
 940 // CHECK1-NEXT:    unreachable
 941 //
 942 //
 943 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52
 944 // CHECK1-SAME: () #[[ATTR3]] {
 945 // CHECK1-NEXT:  entry:
 946 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*))
 947 // CHECK1-NEXT:    ret void
 948 //
 949 //
 950 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..8
 951 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
 952 // CHECK1-NEXT:  entry:
 953 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
 954 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
 955 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 956 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 957 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 958 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 959 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 960 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 961 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 962 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
 963 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
 964 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
 965 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
 966 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
 967 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
 968 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
 969 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
 970 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
 971 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
 972 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
 973 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 974 // CHECK1:       cond.true:
 975 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 976 // CHECK1:       cond.false:
 977 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
 978 // CHECK1-NEXT:    br label [[COND_END]]
 979 // CHECK1:       cond.end:
 980 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
 981 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
 982 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
 983 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
 984 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 985 // CHECK1:       omp.inner.for.cond:
 986 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36
 987 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !36
 988 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
 989 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 990 // CHECK1:       omp.inner.for.body:
 991 // CHECK1-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1), !llvm.access.group !36
 992 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !36
 993 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
 994 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !36
 995 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
 996 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !36
 997 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 998 // CHECK1:       omp.inner.for.inc:
 999 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36
1000 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !36
1001 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1002 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36
1003 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]]
1004 // CHECK1:       omp.inner.for.end:
1005 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1006 // CHECK1:       omp.loop.exit:
1007 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1008 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1009 // CHECK1-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1010 // CHECK1-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1011 // CHECK1:       .omp.final.then:
1012 // CHECK1-NEXT:    store i32 100, i32* [[I]], align 4
1013 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1014 // CHECK1:       .omp.final.done:
1015 // CHECK1-NEXT:    ret void
1016 //
1017 //
1018 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..9
1019 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
1020 // CHECK1-NEXT:  entry:
1021 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1022 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1023 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1024 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1025 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1026 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1027 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1028 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1029 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1030 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1031 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1032 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1033 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1034 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1035 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1036 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1037 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
1038 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1039 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1040 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1041 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1042 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1043 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1044 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1045 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1046 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1047 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1048 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1049 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1050 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1051 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1052 // CHECK1:       cond.true:
1053 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1054 // CHECK1:       cond.false:
1055 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1056 // CHECK1-NEXT:    br label [[COND_END]]
1057 // CHECK1:       cond.end:
1058 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1059 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1060 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1061 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1062 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1063 // CHECK1:       omp.inner.for.cond:
1064 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
1065 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !39
1066 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1067 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1068 // CHECK1:       omp.inner.for.body:
1069 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
1070 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1071 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1072 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !39
1073 // CHECK1-NEXT:    invoke void @_Z3foov()
1074 // CHECK1-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !39
1075 // CHECK1:       invoke.cont:
1076 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1077 // CHECK1:       omp.body.continue:
1078 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1079 // CHECK1:       omp.inner.for.inc:
1080 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
1081 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1082 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
1083 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
1084 // CHECK1:       omp.inner.for.end:
1085 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1086 // CHECK1:       omp.loop.exit:
1087 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1088 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1089 // CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1090 // CHECK1-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1091 // CHECK1:       .omp.final.then:
1092 // CHECK1-NEXT:    store i32 100, i32* [[I]], align 4
1093 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1094 // CHECK1:       .omp.final.done:
1095 // CHECK1-NEXT:    ret void
1096 // CHECK1:       terminate.lpad:
1097 // CHECK1-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
1098 // CHECK1-NEXT:    catch i8* null
1099 // CHECK1-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
1100 // CHECK1-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !39
1101 // CHECK1-NEXT:    unreachable
1102 //
1103 //
1104 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57
1105 // CHECK1-SAME: () #[[ATTR3]] {
1106 // CHECK1-NEXT:  entry:
1107 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
1108 // CHECK1-NEXT:    ret void
1109 //
1110 //
1111 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10
1112 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
1113 // CHECK1-NEXT:  entry:
1114 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1115 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1116 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1117 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1118 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1119 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1120 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1121 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1122 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1123 // CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8
1124 // CHECK1-NEXT:    [[EXN_SLOT:%.*]] = alloca i8*, align 8
1125 // CHECK1-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
1126 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1127 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1128 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1129 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1130 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1131 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1132 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1133 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1134 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1135 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1136 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1137 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1138 // CHECK1:       cond.true:
1139 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1140 // CHECK1:       cond.false:
1141 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1142 // CHECK1-NEXT:    br label [[COND_END]]
1143 // CHECK1:       cond.end:
1144 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1145 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1146 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1147 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1148 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1149 // CHECK1:       omp.inner.for.cond:
1150 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !42
1151 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !42
1152 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1153 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1154 // CHECK1:       omp.inner.for.body:
1155 // CHECK1-NEXT:    invoke void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 23)
1156 // CHECK1-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !42
1157 // CHECK1:       invoke.cont:
1158 // CHECK1-NEXT:    [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]])
1159 // CHECK1-NEXT:    to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD:%.*]], !llvm.access.group !42
1160 // CHECK1:       invoke.cont2:
1161 // CHECK1-NEXT:    [[TMP7:%.*]] = sext i8 [[CALL]] to i32
1162 // CHECK1-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]]), !llvm.access.group !42
1163 // CHECK1-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]], !llvm.access.group !42
1164 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !42
1165 // CHECK1-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1166 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !42
1167 // CHECK1-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1168 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]), !llvm.access.group !42
1169 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1170 // CHECK1:       omp.inner.for.inc:
1171 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !42
1172 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !42
1173 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1174 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !42
1175 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP43:![0-9]+]]
1176 // CHECK1:       lpad:
1177 // CHECK1-NEXT:    [[TMP14:%.*]] = landingpad { i8*, i32 }
1178 // CHECK1-NEXT:    catch i8* null
1179 // CHECK1-NEXT:    [[TMP15:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 0
1180 // CHECK1-NEXT:    store i8* [[TMP15]], i8** [[EXN_SLOT]], align 8, !llvm.access.group !42
1181 // CHECK1-NEXT:    [[TMP16:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 1
1182 // CHECK1-NEXT:    store i32 [[TMP16]], i32* [[EHSELECTOR_SLOT]], align 4, !llvm.access.group !42
1183 // CHECK1-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]], !llvm.access.group !42
1184 // CHECK1-NEXT:    br label [[TERMINATE_HANDLER:%.*]]
1185 // CHECK1:       omp.inner.for.end:
1186 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1187 // CHECK1:       omp.loop.exit:
1188 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1189 // CHECK1-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1190 // CHECK1-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
1191 // CHECK1-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1192 // CHECK1:       .omp.final.then:
1193 // CHECK1-NEXT:    store i32 100, i32* [[I]], align 4
1194 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1195 // CHECK1:       .omp.final.done:
1196 // CHECK1-NEXT:    ret void
1197 // CHECK1:       terminate.lpad:
1198 // CHECK1-NEXT:    [[TMP19:%.*]] = landingpad { i8*, i32 }
1199 // CHECK1-NEXT:    catch i8* null
1200 // CHECK1-NEXT:    [[TMP20:%.*]] = extractvalue { i8*, i32 } [[TMP19]], 0
1201 // CHECK1-NEXT:    call void @__clang_call_terminate(i8* [[TMP20]]) #[[ATTR10]], !llvm.access.group !42
1202 // CHECK1-NEXT:    unreachable
1203 // CHECK1:       terminate.handler:
1204 // CHECK1-NEXT:    [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8, !llvm.access.group !42
1205 // CHECK1-NEXT:    call void @__clang_call_terminate(i8* [[EXN]]) #[[ATTR10]], !llvm.access.group !42
1206 // CHECK1-NEXT:    unreachable
1207 //
1208 //
1209 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11
1210 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
1211 // CHECK1-NEXT:  entry:
1212 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1213 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1214 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1215 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1216 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1217 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1218 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1219 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1220 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1221 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1222 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1223 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1224 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1225 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1226 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1227 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1228 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
1229 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1230 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1231 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1232 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1233 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1234 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1235 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1236 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1237 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1238 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1239 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1240 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1241 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1242 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1243 // CHECK1:       cond.true:
1244 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1245 // CHECK1:       cond.false:
1246 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1247 // CHECK1-NEXT:    br label [[COND_END]]
1248 // CHECK1:       cond.end:
1249 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1250 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1251 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1252 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1253 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1254 // CHECK1:       omp.inner.for.cond:
1255 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !45
1256 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !45
1257 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1258 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1259 // CHECK1:       omp.inner.for.body:
1260 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !45
1261 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1262 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1263 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !45
1264 // CHECK1-NEXT:    invoke void @_Z3foov()
1265 // CHECK1-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !45
1266 // CHECK1:       invoke.cont:
1267 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1268 // CHECK1:       omp.body.continue:
1269 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1270 // CHECK1:       omp.inner.for.inc:
1271 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !45
1272 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1273 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !45
1274 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP46:![0-9]+]]
1275 // CHECK1:       omp.inner.for.end:
1276 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1277 // CHECK1:       omp.loop.exit:
1278 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1279 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1280 // CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1281 // CHECK1-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1282 // CHECK1:       .omp.final.then:
1283 // CHECK1-NEXT:    store i32 100, i32* [[I]], align 4
1284 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1285 // CHECK1:       .omp.final.done:
1286 // CHECK1-NEXT:    ret void
1287 // CHECK1:       terminate.lpad:
1288 // CHECK1-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
1289 // CHECK1-NEXT:    catch i8* null
1290 // CHECK1-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
1291 // CHECK1-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !45
1292 // CHECK1-NEXT:    unreachable
1293 //
1294 //
1295 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1296 // CHECK1-SAME: () #[[ATTR9:[0-9]+]] {
1297 // CHECK1-NEXT:  entry:
1298 // CHECK1-NEXT:    call void @__tgt_register_requires(i64 1)
1299 // CHECK1-NEXT:    ret void
1300 //
1301 //
1302 // CHECK2-LABEL: define {{[^@]+}}@main
1303 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
1304 // CHECK2-NEXT:  entry:
1305 // CHECK2-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
1306 // CHECK2-NEXT:    [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
1307 // CHECK2-NEXT:    [[A:%.*]] = alloca i8, align 1
1308 // CHECK2-NEXT:    [[EXN_SLOT:%.*]] = alloca i8*, align 8
1309 // CHECK2-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
1310 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1311 // CHECK2-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
1312 // CHECK2-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
1313 // CHECK2-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
1314 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
1315 // CHECK2-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1316 // CHECK2-NEXT:    store i32 0, i32* [[RETVAL]], align 4
1317 // CHECK2-NEXT:    call void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[S]], i64 0)
1318 // CHECK2-NEXT:    [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[S]])
1319 // CHECK2-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
1320 // CHECK2:       invoke.cont:
1321 // CHECK2-NEXT:    store i8 [[CALL]], i8* [[A]], align 1
1322 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100)
1323 // CHECK2-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
1324 // CHECK2-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
1325 // CHECK2-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1326 // CHECK2:       omp_offload.failed:
1327 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR6:[0-9]+]]
1328 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1329 // CHECK2:       lpad:
1330 // CHECK2-NEXT:    [[TMP2:%.*]] = landingpad { i8*, i32 }
1331 // CHECK2-NEXT:    cleanup
1332 // CHECK2-NEXT:    [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0
1333 // CHECK2-NEXT:    store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8
1334 // CHECK2-NEXT:    [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1
1335 // CHECK2-NEXT:    store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4
1336 // CHECK2-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
1337 // CHECK2-NEXT:    br label [[EH_RESUME:%.*]]
1338 // CHECK2:       omp_offload.cont:
1339 // CHECK2-NEXT:    [[TMP5:%.*]] = load i8, i8* [[A]], align 1
1340 // CHECK2-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8*
1341 // CHECK2-NEXT:    store i8 [[TMP5]], i8* [[CONV]], align 1
1342 // CHECK2-NEXT:    [[TMP6:%.*]] = load i64, i64* [[A_CASTED]], align 8
1343 // CHECK2-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1344 // CHECK2-NEXT:    [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
1345 // CHECK2-NEXT:    store i64 [[TMP6]], i64* [[TMP8]], align 8
1346 // CHECK2-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1347 // CHECK2-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
1348 // CHECK2-NEXT:    store i64 [[TMP6]], i64* [[TMP10]], align 8
1349 // CHECK2-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1350 // CHECK2-NEXT:    store i8* null, i8** [[TMP11]], align 8
1351 // CHECK2-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1352 // CHECK2-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1353 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
1354 // CHECK2-NEXT:    [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, i32 1, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
1355 // CHECK2-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
1356 // CHECK2-NEXT:    br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
1357 // CHECK2:       omp_offload.failed2:
1358 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP6]]) #[[ATTR6]]
1359 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
1360 // CHECK2:       omp_offload.cont3:
1361 // CHECK2-NEXT:    [[TMP16:%.*]] = load i8, i8* [[A]], align 1
1362 // CHECK2-NEXT:    [[CONV4:%.*]] = sext i8 [[TMP16]] to i32
1363 // CHECK2-NEXT:    [[CALL6:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv()
1364 // CHECK2-NEXT:    to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]]
1365 // CHECK2:       invoke.cont5:
1366 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[CONV4]], [[CALL6]]
1367 // CHECK2-NEXT:    [[CALL8:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv()
1368 // CHECK2-NEXT:    to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD]]
1369 // CHECK2:       invoke.cont7:
1370 // CHECK2-NEXT:    [[ADD9:%.*]] = add nsw i32 [[ADD]], [[CALL8]]
1371 // CHECK2-NEXT:    store i32 [[ADD9]], i32* [[RETVAL]], align 4
1372 // CHECK2-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
1373 // CHECK2-NEXT:    [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4
1374 // CHECK2-NEXT:    ret i32 [[TMP17]]
1375 // CHECK2:       eh.resume:
1376 // CHECK2-NEXT:    [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8
1377 // CHECK2-NEXT:    [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
1378 // CHECK2-NEXT:    [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
1379 // CHECK2-NEXT:    [[LPAD_VAL10:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
1380 // CHECK2-NEXT:    resume { i8*, i32 } [[LPAD_VAL10]]
1381 //
1382 //
1383 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SC1El
1384 // CHECK2-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
1385 // CHECK2-NEXT:  entry:
1386 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1387 // CHECK2-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
1388 // CHECK2-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1389 // CHECK2-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
1390 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1391 // CHECK2-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
1392 // CHECK2-NEXT:    call void @_ZN1SC2El(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]], i64 [[TMP0]])
1393 // CHECK2-NEXT:    ret void
1394 //
1395 //
1396 // CHECK2-LABEL: define {{[^@]+}}@_ZN1ScvcEv
1397 // CHECK2-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 {
1398 // CHECK2-NEXT:  entry:
1399 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1400 // CHECK2-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1401 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1402 // CHECK2-NEXT:    call void @_Z8mayThrowv()
1403 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1404 // CHECK2-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A]], align 8
1405 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i8
1406 // CHECK2-NEXT:    ret i8 [[CONV]]
1407 //
1408 //
1409 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
1410 // CHECK2-SAME: () #[[ATTR3:[0-9]+]] {
1411 // CHECK2-NEXT:  entry:
1412 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
1413 // CHECK2-NEXT:    ret void
1414 //
1415 //
1416 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined.
1417 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
1418 // CHECK2-NEXT:  entry:
1419 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1420 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1421 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1422 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1423 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1424 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1425 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1426 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1427 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1428 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1429 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1430 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1431 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1432 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1433 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1434 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1435 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1436 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1437 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1438 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1439 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1440 // CHECK2:       cond.true:
1441 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1442 // CHECK2:       cond.false:
1443 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1444 // CHECK2-NEXT:    br label [[COND_END]]
1445 // CHECK2:       cond.end:
1446 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1447 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1448 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1449 // CHECK2-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1450 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1451 // CHECK2:       omp.inner.for.cond:
1452 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
1453 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !9
1454 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1455 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1456 // CHECK2:       omp.inner.for.body:
1457 // CHECK2-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2), !llvm.access.group !9
1458 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !9
1459 // CHECK2-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1460 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !9
1461 // CHECK2-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1462 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !9
1463 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1464 // CHECK2:       omp.inner.for.inc:
1465 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
1466 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !9
1467 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1468 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
1469 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
1470 // CHECK2:       omp.inner.for.end:
1471 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1472 // CHECK2:       omp.loop.exit:
1473 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1474 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1475 // CHECK2-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1476 // CHECK2-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1477 // CHECK2:       .omp.final.then:
1478 // CHECK2-NEXT:    store i32 100, i32* [[I]], align 4
1479 // CHECK2-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1480 // CHECK2:       .omp.final.done:
1481 // CHECK2-NEXT:    ret void
1482 //
1483 //
1484 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1
1485 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
1486 // CHECK2-NEXT:  entry:
1487 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1488 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1489 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1490 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1491 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1492 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1493 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1494 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1495 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1496 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1497 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1498 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1499 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1500 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1501 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1502 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1503 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
1504 // CHECK2-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1505 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1506 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1507 // CHECK2-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1508 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1509 // CHECK2-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1510 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1511 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1512 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1513 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1514 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1515 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1516 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1517 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1518 // CHECK2:       cond.true:
1519 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1520 // CHECK2:       cond.false:
1521 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1522 // CHECK2-NEXT:    br label [[COND_END]]
1523 // CHECK2:       cond.end:
1524 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1525 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1526 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1527 // CHECK2-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1528 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1529 // CHECK2:       omp.inner.for.cond:
1530 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1531 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
1532 // CHECK2-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1533 // CHECK2-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1534 // CHECK2:       omp.inner.for.body:
1535 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1536 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1537 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1538 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
1539 // CHECK2-NEXT:    invoke void @_Z3foov()
1540 // CHECK2-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !13
1541 // CHECK2:       invoke.cont:
1542 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1543 // CHECK2:       omp.body.continue:
1544 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1545 // CHECK2:       omp.inner.for.inc:
1546 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1547 // CHECK2-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1548 // CHECK2-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1549 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
1550 // CHECK2:       omp.inner.for.end:
1551 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1552 // CHECK2:       omp.loop.exit:
1553 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1554 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1555 // CHECK2-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1556 // CHECK2-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1557 // CHECK2:       .omp.final.then:
1558 // CHECK2-NEXT:    store i32 100, i32* [[I]], align 4
1559 // CHECK2-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1560 // CHECK2:       .omp.final.done:
1561 // CHECK2-NEXT:    ret void
1562 // CHECK2:       terminate.lpad:
1563 // CHECK2-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
1564 // CHECK2-NEXT:    catch i8* null
1565 // CHECK2-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
1566 // CHECK2-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10:[0-9]+]], !llvm.access.group !13
1567 // CHECK2-NEXT:    unreachable
1568 //
1569 //
1570 // CHECK2-LABEL: define {{[^@]+}}@__clang_call_terminate
1571 // CHECK2-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat {
1572 // CHECK2-NEXT:    [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]]
1573 // CHECK2-NEXT:    call void @_ZSt9terminatev() #[[ATTR10]]
1574 // CHECK2-NEXT:    unreachable
1575 //
1576 //
1577 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74
1578 // CHECK2-SAME: (i64 [[A:%.*]]) #[[ATTR3]] {
1579 // CHECK2-NEXT:  entry:
1580 // CHECK2-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
1581 // CHECK2-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
1582 // CHECK2-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8*
1583 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i8* [[CONV]])
1584 // CHECK2-NEXT:    ret void
1585 //
1586 //
1587 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..2
1588 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i8* nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] {
1589 // CHECK2-NEXT:  entry:
1590 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1591 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1592 // CHECK2-NEXT:    [[A_ADDR:%.*]] = alloca i8*, align 8
1593 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1594 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1595 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1596 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1597 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1598 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1599 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1600 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1601 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1602 // CHECK2-NEXT:    store i8* [[A]], i8** [[A_ADDR]], align 8
1603 // CHECK2-NEXT:    [[TMP0:%.*]] = load i8*, i8** [[A_ADDR]], align 8
1604 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1605 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1606 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1607 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1608 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1609 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1610 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1611 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1612 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
1613 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1614 // CHECK2:       cond.true:
1615 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1616 // CHECK2:       cond.false:
1617 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1618 // CHECK2-NEXT:    br label [[COND_END]]
1619 // CHECK2:       cond.end:
1620 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1621 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1622 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1623 // CHECK2-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1624 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1625 // CHECK2:       omp.inner.for.cond:
1626 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
1627 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !18
1628 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1629 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1630 // CHECK2:       omp.inner.for.body:
1631 // CHECK2-NEXT:    [[TMP8:%.*]] = load i8, i8* [[TMP0]], align 1, !llvm.access.group !18
1632 // CHECK2-NEXT:    [[TMP9:%.*]] = sext i8 [[TMP8]] to i32
1633 // CHECK2-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]]), !llvm.access.group !18
1634 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !18
1635 // CHECK2-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1636 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !18
1637 // CHECK2-NEXT:    [[TMP13:%.*]] = zext i32 [[TMP12]] to i64
1638 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]]), !llvm.access.group !18
1639 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1640 // CHECK2:       omp.inner.for.inc:
1641 // CHECK2-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
1642 // CHECK2-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !18
1643 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
1644 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
1645 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
1646 // CHECK2:       omp.inner.for.end:
1647 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1648 // CHECK2:       omp.loop.exit:
1649 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1650 // CHECK2-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1651 // CHECK2-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
1652 // CHECK2-NEXT:    br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1653 // CHECK2:       .omp.final.then:
1654 // CHECK2-NEXT:    store i32 100, i32* [[I]], align 4
1655 // CHECK2-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1656 // CHECK2:       .omp.final.done:
1657 // CHECK2-NEXT:    ret void
1658 //
1659 //
1660 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..3
1661 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
1662 // CHECK2-NEXT:  entry:
1663 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1664 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1665 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1666 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1667 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1668 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1669 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1670 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1671 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1672 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1673 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1674 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1675 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1676 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1677 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1678 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1679 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
1680 // CHECK2-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1681 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1682 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1683 // CHECK2-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1684 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1685 // CHECK2-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1686 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1687 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1688 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1689 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1690 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1691 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1692 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1693 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1694 // CHECK2:       cond.true:
1695 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1696 // CHECK2:       cond.false:
1697 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1698 // CHECK2-NEXT:    br label [[COND_END]]
1699 // CHECK2:       cond.end:
1700 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1701 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1702 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1703 // CHECK2-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1704 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1705 // CHECK2:       omp.inner.for.cond:
1706 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
1707 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21
1708 // CHECK2-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1709 // CHECK2-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1710 // CHECK2:       omp.inner.for.body:
1711 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
1712 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1713 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1714 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21
1715 // CHECK2-NEXT:    invoke void @_Z3foov()
1716 // CHECK2-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !21
1717 // CHECK2:       invoke.cont:
1718 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1719 // CHECK2:       omp.body.continue:
1720 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1721 // CHECK2:       omp.inner.for.inc:
1722 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
1723 // CHECK2-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1724 // CHECK2-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
1725 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
1726 // CHECK2:       omp.inner.for.end:
1727 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1728 // CHECK2:       omp.loop.exit:
1729 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1730 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1731 // CHECK2-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1732 // CHECK2-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1733 // CHECK2:       .omp.final.then:
1734 // CHECK2-NEXT:    store i32 100, i32* [[I]], align 4
1735 // CHECK2-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1736 // CHECK2:       .omp.final.done:
1737 // CHECK2-NEXT:    ret void
1738 // CHECK2:       terminate.lpad:
1739 // CHECK2-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
1740 // CHECK2-NEXT:    catch i8* null
1741 // CHECK2-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
1742 // CHECK2-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !21
1743 // CHECK2-NEXT:    unreachable
1744 //
1745 //
1746 // CHECK2-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv
1747 // CHECK2-SAME: () #[[ATTR7:[0-9]+]] comdat {
1748 // CHECK2-NEXT:  entry:
1749 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1750 // CHECK2-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1751 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
1752 // CHECK2-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
1753 // CHECK2-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
1754 // CHECK2-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1755 // CHECK2:       omp_offload.failed:
1756 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR6]]
1757 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1758 // CHECK2:       omp_offload.cont:
1759 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
1760 // CHECK2-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
1761 // CHECK2-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
1762 // CHECK2-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
1763 // CHECK2:       omp_offload.failed2:
1764 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR6]]
1765 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
1766 // CHECK2:       omp_offload.cont3:
1767 // CHECK2-NEXT:    ret i32 0
1768 //
1769 //
1770 // CHECK2-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv
1771 // CHECK2-SAME: () #[[ATTR7]] comdat {
1772 // CHECK2-NEXT:  entry:
1773 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1774 // CHECK2-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1775 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
1776 // CHECK2-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
1777 // CHECK2-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
1778 // CHECK2-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1779 // CHECK2:       omp_offload.failed:
1780 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR6]]
1781 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1782 // CHECK2:       omp_offload.cont:
1783 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
1784 // CHECK2-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
1785 // CHECK2-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
1786 // CHECK2-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
1787 // CHECK2:       omp_offload.failed2:
1788 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR6]]
1789 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
1790 // CHECK2:       omp_offload.cont3:
1791 // CHECK2-NEXT:    ret i32 0
1792 //
1793 //
1794 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SD1Ev
1795 // CHECK2-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 {
1796 // CHECK2-NEXT:  entry:
1797 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1798 // CHECK2-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1799 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1800 // CHECK2-NEXT:    call void @_ZN1SD2Ev(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR6]]
1801 // CHECK2-NEXT:    ret void
1802 //
1803 //
1804 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SC2El
1805 // CHECK2-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
1806 // CHECK2-NEXT:  entry:
1807 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1808 // CHECK2-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
1809 // CHECK2-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1810 // CHECK2-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
1811 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1812 // CHECK2-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1813 // CHECK2-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
1814 // CHECK2-NEXT:    store i64 [[TMP0]], i64* [[A2]], align 8
1815 // CHECK2-NEXT:    ret void
1816 //
1817 //
1818 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SD2Ev
1819 // CHECK2-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
1820 // CHECK2-NEXT:  entry:
1821 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1822 // CHECK2-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1823 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1824 // CHECK2-NEXT:    ret void
1825 //
1826 //
1827 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52
1828 // CHECK2-SAME: () #[[ATTR3]] {
1829 // CHECK2-NEXT:  entry:
1830 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
1831 // CHECK2-NEXT:    ret void
1832 //
1833 //
1834 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..4
1835 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
1836 // CHECK2-NEXT:  entry:
1837 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1838 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1839 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1840 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1841 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1842 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1843 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1844 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1845 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1846 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1847 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1848 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1849 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1850 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1851 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1852 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1853 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1854 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1855 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1856 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1857 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1858 // CHECK2:       cond.true:
1859 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1860 // CHECK2:       cond.false:
1861 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1862 // CHECK2-NEXT:    br label [[COND_END]]
1863 // CHECK2:       cond.end:
1864 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1865 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1866 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1867 // CHECK2-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1868 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1869 // CHECK2:       omp.inner.for.cond:
1870 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
1871 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !24
1872 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1873 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1874 // CHECK2:       omp.inner.for.body:
1875 // CHECK2-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5), !llvm.access.group !24
1876 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !24
1877 // CHECK2-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1878 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !24
1879 // CHECK2-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1880 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !24
1881 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1882 // CHECK2:       omp.inner.for.inc:
1883 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
1884 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !24
1885 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1886 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
1887 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
1888 // CHECK2:       omp.inner.for.end:
1889 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1890 // CHECK2:       omp.loop.exit:
1891 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1892 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1893 // CHECK2-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1894 // CHECK2-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1895 // CHECK2:       .omp.final.then:
1896 // CHECK2-NEXT:    store i32 100, i32* [[I]], align 4
1897 // CHECK2-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1898 // CHECK2:       .omp.final.done:
1899 // CHECK2-NEXT:    ret void
1900 //
1901 //
1902 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..5
1903 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
1904 // CHECK2-NEXT:  entry:
1905 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1906 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1907 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1908 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1909 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1910 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1911 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1912 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1913 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1914 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1915 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1916 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1917 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1918 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1919 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1920 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1921 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
1922 // CHECK2-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1923 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1924 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1925 // CHECK2-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1926 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1927 // CHECK2-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1928 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1929 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1930 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1931 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1932 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1933 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1934 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1935 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1936 // CHECK2:       cond.true:
1937 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1938 // CHECK2:       cond.false:
1939 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1940 // CHECK2-NEXT:    br label [[COND_END]]
1941 // CHECK2:       cond.end:
1942 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1943 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1944 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1945 // CHECK2-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1946 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1947 // CHECK2:       omp.inner.for.cond:
1948 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
1949 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !27
1950 // CHECK2-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1951 // CHECK2-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1952 // CHECK2:       omp.inner.for.body:
1953 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
1954 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1955 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1956 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !27
1957 // CHECK2-NEXT:    invoke void @_Z3foov()
1958 // CHECK2-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !27
1959 // CHECK2:       invoke.cont:
1960 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1961 // CHECK2:       omp.body.continue:
1962 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1963 // CHECK2:       omp.inner.for.inc:
1964 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
1965 // CHECK2-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1966 // CHECK2-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
1967 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]
1968 // CHECK2:       omp.inner.for.end:
1969 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1970 // CHECK2:       omp.loop.exit:
1971 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1972 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1973 // CHECK2-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1974 // CHECK2-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1975 // CHECK2:       .omp.final.then:
1976 // CHECK2-NEXT:    store i32 100, i32* [[I]], align 4
1977 // CHECK2-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1978 // CHECK2:       .omp.final.done:
1979 // CHECK2-NEXT:    ret void
1980 // CHECK2:       terminate.lpad:
1981 // CHECK2-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
1982 // CHECK2-NEXT:    catch i8* null
1983 // CHECK2-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
1984 // CHECK2-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !27
1985 // CHECK2-NEXT:    unreachable
1986 //
1987 //
1988 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57
1989 // CHECK2-SAME: () #[[ATTR3]] {
1990 // CHECK2-NEXT:  entry:
1991 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
1992 // CHECK2-NEXT:    ret void
1993 //
1994 //
1995 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..6
1996 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
1997 // CHECK2-NEXT:  entry:
1998 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1999 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2000 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2001 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2002 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2003 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2004 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2005 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2006 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
2007 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2008 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2009 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2010 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2011 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2012 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2013 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2014 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2015 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2016 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2017 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2018 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2019 // CHECK2:       cond.true:
2020 // CHECK2-NEXT:    br label [[COND_END:%.*]]
2021 // CHECK2:       cond.false:
2022 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2023 // CHECK2-NEXT:    br label [[COND_END]]
2024 // CHECK2:       cond.end:
2025 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2026 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2027 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2028 // CHECK2-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2029 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2030 // CHECK2:       omp.inner.for.cond:
2031 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30
2032 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !30
2033 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2034 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2035 // CHECK2:       omp.inner.for.body:
2036 // CHECK2-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23), !llvm.access.group !30
2037 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !30
2038 // CHECK2-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2039 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !30
2040 // CHECK2-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2041 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !30
2042 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2043 // CHECK2:       omp.inner.for.inc:
2044 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30
2045 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !30
2046 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
2047 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30
2048 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]
2049 // CHECK2:       omp.inner.for.end:
2050 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2051 // CHECK2:       omp.loop.exit:
2052 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2053 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2054 // CHECK2-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
2055 // CHECK2-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2056 // CHECK2:       .omp.final.then:
2057 // CHECK2-NEXT:    store i32 100, i32* [[I]], align 4
2058 // CHECK2-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2059 // CHECK2:       .omp.final.done:
2060 // CHECK2-NEXT:    ret void
2061 //
2062 //
2063 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..7
2064 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
2065 // CHECK2-NEXT:  entry:
2066 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2067 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2068 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2069 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2070 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2071 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2072 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2073 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2074 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2075 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2076 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
2077 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2078 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2079 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2080 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2081 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2082 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
2083 // CHECK2-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2084 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2085 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2086 // CHECK2-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2087 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2088 // CHECK2-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2089 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2090 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2091 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2092 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2093 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2094 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2095 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2096 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2097 // CHECK2:       cond.true:
2098 // CHECK2-NEXT:    br label [[COND_END:%.*]]
2099 // CHECK2:       cond.false:
2100 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2101 // CHECK2-NEXT:    br label [[COND_END]]
2102 // CHECK2:       cond.end:
2103 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2104 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2105 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2106 // CHECK2-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2107 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2108 // CHECK2:       omp.inner.for.cond:
2109 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
2110 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !33
2111 // CHECK2-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2112 // CHECK2-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2113 // CHECK2:       omp.inner.for.body:
2114 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
2115 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2116 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2117 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !33
2118 // CHECK2-NEXT:    invoke void @_Z3foov()
2119 // CHECK2-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !33
2120 // CHECK2:       invoke.cont:
2121 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2122 // CHECK2:       omp.body.continue:
2123 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2124 // CHECK2:       omp.inner.for.inc:
2125 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
2126 // CHECK2-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2127 // CHECK2-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
2128 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
2129 // CHECK2:       omp.inner.for.end:
2130 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2131 // CHECK2:       omp.loop.exit:
2132 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2133 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2134 // CHECK2-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
2135 // CHECK2-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2136 // CHECK2:       .omp.final.then:
2137 // CHECK2-NEXT:    store i32 100, i32* [[I]], align 4
2138 // CHECK2-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2139 // CHECK2:       .omp.final.done:
2140 // CHECK2-NEXT:    ret void
2141 // CHECK2:       terminate.lpad:
2142 // CHECK2-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
2143 // CHECK2-NEXT:    catch i8* null
2144 // CHECK2-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
2145 // CHECK2-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !33
2146 // CHECK2-NEXT:    unreachable
2147 //
2148 //
2149 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52
2150 // CHECK2-SAME: () #[[ATTR3]] {
2151 // CHECK2-NEXT:  entry:
2152 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*))
2153 // CHECK2-NEXT:    ret void
2154 //
2155 //
2156 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..8
2157 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
2158 // CHECK2-NEXT:  entry:
2159 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2160 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2161 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2162 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2163 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2164 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2165 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2166 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2167 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
2168 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2169 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2170 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2171 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2172 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2173 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2174 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2175 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2176 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2177 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2178 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2179 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2180 // CHECK2:       cond.true:
2181 // CHECK2-NEXT:    br label [[COND_END:%.*]]
2182 // CHECK2:       cond.false:
2183 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2184 // CHECK2-NEXT:    br label [[COND_END]]
2185 // CHECK2:       cond.end:
2186 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2187 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2188 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2189 // CHECK2-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2190 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2191 // CHECK2:       omp.inner.for.cond:
2192 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36
2193 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !36
2194 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2195 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2196 // CHECK2:       omp.inner.for.body:
2197 // CHECK2-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1), !llvm.access.group !36
2198 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !36
2199 // CHECK2-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2200 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !36
2201 // CHECK2-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2202 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !36
2203 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2204 // CHECK2:       omp.inner.for.inc:
2205 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36
2206 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !36
2207 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
2208 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36
2209 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]]
2210 // CHECK2:       omp.inner.for.end:
2211 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2212 // CHECK2:       omp.loop.exit:
2213 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2214 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2215 // CHECK2-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
2216 // CHECK2-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2217 // CHECK2:       .omp.final.then:
2218 // CHECK2-NEXT:    store i32 100, i32* [[I]], align 4
2219 // CHECK2-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2220 // CHECK2:       .omp.final.done:
2221 // CHECK2-NEXT:    ret void
2222 //
2223 //
2224 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..9
2225 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
2226 // CHECK2-NEXT:  entry:
2227 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2228 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2229 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2230 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2231 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2232 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2233 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2234 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2235 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2236 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2237 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
2238 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2239 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2240 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2241 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2242 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2243 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
2244 // CHECK2-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2245 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2246 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2247 // CHECK2-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2248 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2249 // CHECK2-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2250 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2251 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2252 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2253 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2254 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2255 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2256 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2257 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2258 // CHECK2:       cond.true:
2259 // CHECK2-NEXT:    br label [[COND_END:%.*]]
2260 // CHECK2:       cond.false:
2261 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2262 // CHECK2-NEXT:    br label [[COND_END]]
2263 // CHECK2:       cond.end:
2264 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2265 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2266 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2267 // CHECK2-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2268 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2269 // CHECK2:       omp.inner.for.cond:
2270 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
2271 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !39
2272 // CHECK2-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2273 // CHECK2-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2274 // CHECK2:       omp.inner.for.body:
2275 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
2276 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2277 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2278 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !39
2279 // CHECK2-NEXT:    invoke void @_Z3foov()
2280 // CHECK2-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !39
2281 // CHECK2:       invoke.cont:
2282 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2283 // CHECK2:       omp.body.continue:
2284 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2285 // CHECK2:       omp.inner.for.inc:
2286 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
2287 // CHECK2-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2288 // CHECK2-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
2289 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
2290 // CHECK2:       omp.inner.for.end:
2291 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2292 // CHECK2:       omp.loop.exit:
2293 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2294 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2295 // CHECK2-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
2296 // CHECK2-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2297 // CHECK2:       .omp.final.then:
2298 // CHECK2-NEXT:    store i32 100, i32* [[I]], align 4
2299 // CHECK2-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2300 // CHECK2:       .omp.final.done:
2301 // CHECK2-NEXT:    ret void
2302 // CHECK2:       terminate.lpad:
2303 // CHECK2-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
2304 // CHECK2-NEXT:    catch i8* null
2305 // CHECK2-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
2306 // CHECK2-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !39
2307 // CHECK2-NEXT:    unreachable
2308 //
2309 //
2310 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57
2311 // CHECK2-SAME: () #[[ATTR3]] {
2312 // CHECK2-NEXT:  entry:
2313 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
2314 // CHECK2-NEXT:    ret void
2315 //
2316 //
2317 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..10
2318 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
2319 // CHECK2-NEXT:  entry:
2320 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2321 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2322 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2323 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2324 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2325 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2326 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2327 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2328 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
2329 // CHECK2-NEXT:    [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8
2330 // CHECK2-NEXT:    [[EXN_SLOT:%.*]] = alloca i8*, align 8
2331 // CHECK2-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
2332 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2333 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2334 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2335 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2336 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2337 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2338 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2339 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2340 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2341 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2342 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2343 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2344 // CHECK2:       cond.true:
2345 // CHECK2-NEXT:    br label [[COND_END:%.*]]
2346 // CHECK2:       cond.false:
2347 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2348 // CHECK2-NEXT:    br label [[COND_END]]
2349 // CHECK2:       cond.end:
2350 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2351 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2352 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2353 // CHECK2-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2354 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2355 // CHECK2:       omp.inner.for.cond:
2356 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !42
2357 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !42
2358 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2359 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2360 // CHECK2:       omp.inner.for.body:
2361 // CHECK2-NEXT:    invoke void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 23)
2362 // CHECK2-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !42
2363 // CHECK2:       invoke.cont:
2364 // CHECK2-NEXT:    [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]])
2365 // CHECK2-NEXT:    to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD:%.*]], !llvm.access.group !42
2366 // CHECK2:       invoke.cont2:
2367 // CHECK2-NEXT:    [[TMP7:%.*]] = sext i8 [[CALL]] to i32
2368 // CHECK2-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]]), !llvm.access.group !42
2369 // CHECK2-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]], !llvm.access.group !42
2370 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !42
2371 // CHECK2-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2372 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !42
2373 // CHECK2-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2374 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]), !llvm.access.group !42
2375 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2376 // CHECK2:       omp.inner.for.inc:
2377 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !42
2378 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !42
2379 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2380 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !42
2381 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP43:![0-9]+]]
2382 // CHECK2:       lpad:
2383 // CHECK2-NEXT:    [[TMP14:%.*]] = landingpad { i8*, i32 }
2384 // CHECK2-NEXT:    catch i8* null
2385 // CHECK2-NEXT:    [[TMP15:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 0
2386 // CHECK2-NEXT:    store i8* [[TMP15]], i8** [[EXN_SLOT]], align 8, !llvm.access.group !42
2387 // CHECK2-NEXT:    [[TMP16:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 1
2388 // CHECK2-NEXT:    store i32 [[TMP16]], i32* [[EHSELECTOR_SLOT]], align 4, !llvm.access.group !42
2389 // CHECK2-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]], !llvm.access.group !42
2390 // CHECK2-NEXT:    br label [[TERMINATE_HANDLER:%.*]]
2391 // CHECK2:       omp.inner.for.end:
2392 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2393 // CHECK2:       omp.loop.exit:
2394 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2395 // CHECK2-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2396 // CHECK2-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
2397 // CHECK2-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2398 // CHECK2:       .omp.final.then:
2399 // CHECK2-NEXT:    store i32 100, i32* [[I]], align 4
2400 // CHECK2-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2401 // CHECK2:       .omp.final.done:
2402 // CHECK2-NEXT:    ret void
2403 // CHECK2:       terminate.lpad:
2404 // CHECK2-NEXT:    [[TMP19:%.*]] = landingpad { i8*, i32 }
2405 // CHECK2-NEXT:    catch i8* null
2406 // CHECK2-NEXT:    [[TMP20:%.*]] = extractvalue { i8*, i32 } [[TMP19]], 0
2407 // CHECK2-NEXT:    call void @__clang_call_terminate(i8* [[TMP20]]) #[[ATTR10]], !llvm.access.group !42
2408 // CHECK2-NEXT:    unreachable
2409 // CHECK2:       terminate.handler:
2410 // CHECK2-NEXT:    [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8, !llvm.access.group !42
2411 // CHECK2-NEXT:    call void @__clang_call_terminate(i8* [[EXN]]) #[[ATTR10]], !llvm.access.group !42
2412 // CHECK2-NEXT:    unreachable
2413 //
2414 //
2415 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..11
2416 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
2417 // CHECK2-NEXT:  entry:
2418 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2419 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2420 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2421 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2422 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2423 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2424 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2425 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2426 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2427 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2428 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
2429 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2430 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2431 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2432 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2433 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2434 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
2435 // CHECK2-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2436 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2437 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2438 // CHECK2-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2439 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2440 // CHECK2-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2441 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2442 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2443 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2444 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2445 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2446 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2447 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2448 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2449 // CHECK2:       cond.true:
2450 // CHECK2-NEXT:    br label [[COND_END:%.*]]
2451 // CHECK2:       cond.false:
2452 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2453 // CHECK2-NEXT:    br label [[COND_END]]
2454 // CHECK2:       cond.end:
2455 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2456 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2457 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2458 // CHECK2-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2459 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2460 // CHECK2:       omp.inner.for.cond:
2461 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !45
2462 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !45
2463 // CHECK2-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2464 // CHECK2-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2465 // CHECK2:       omp.inner.for.body:
2466 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !45
2467 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2468 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2469 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !45
2470 // CHECK2-NEXT:    invoke void @_Z3foov()
2471 // CHECK2-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !45
2472 // CHECK2:       invoke.cont:
2473 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2474 // CHECK2:       omp.body.continue:
2475 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2476 // CHECK2:       omp.inner.for.inc:
2477 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !45
2478 // CHECK2-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2479 // CHECK2-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !45
2480 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP46:![0-9]+]]
2481 // CHECK2:       omp.inner.for.end:
2482 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2483 // CHECK2:       omp.loop.exit:
2484 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2485 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2486 // CHECK2-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
2487 // CHECK2-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2488 // CHECK2:       .omp.final.then:
2489 // CHECK2-NEXT:    store i32 100, i32* [[I]], align 4
2490 // CHECK2-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2491 // CHECK2:       .omp.final.done:
2492 // CHECK2-NEXT:    ret void
2493 // CHECK2:       terminate.lpad:
2494 // CHECK2-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
2495 // CHECK2-NEXT:    catch i8* null
2496 // CHECK2-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
2497 // CHECK2-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !45
2498 // CHECK2-NEXT:    unreachable
2499 //
2500 //
2501 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2502 // CHECK2-SAME: () #[[ATTR9:[0-9]+]] {
2503 // CHECK2-NEXT:  entry:
2504 // CHECK2-NEXT:    call void @__tgt_register_requires(i64 1)
2505 // CHECK2-NEXT:    ret void
2506 //
2507 //
2508 // CHECK3-LABEL: define {{[^@]+}}@main
2509 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
2510 // CHECK3-NEXT:  entry:
2511 // CHECK3-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
2512 // CHECK3-NEXT:    [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
2513 // CHECK3-NEXT:    [[A:%.*]] = alloca i8, align 1
2514 // CHECK3-NEXT:    [[EXN_SLOT:%.*]] = alloca i8*, align 8
2515 // CHECK3-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
2516 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2517 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2518 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2519 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2520 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2521 // CHECK3-NEXT:    [[_TMP3:%.*]] = alloca i32, align 4
2522 // CHECK3-NEXT:    [[DOTOMP_LB4:%.*]] = alloca i32, align 4
2523 // CHECK3-NEXT:    [[DOTOMP_UB5:%.*]] = alloca i32, align 4
2524 // CHECK3-NEXT:    [[DOTOMP_IV6:%.*]] = alloca i32, align 4
2525 // CHECK3-NEXT:    [[I7:%.*]] = alloca i32, align 4
2526 // CHECK3-NEXT:    store i32 0, i32* [[RETVAL]], align 4
2527 // CHECK3-NEXT:    call void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[S]], i64 0)
2528 // CHECK3-NEXT:    [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[S]])
2529 // CHECK3-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
2530 // CHECK3:       invoke.cont:
2531 // CHECK3-NEXT:    store i8 [[CALL]], i8* [[A]], align 1
2532 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2533 // CHECK3-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
2534 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2535 // CHECK3-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
2536 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2537 // CHECK3:       omp.inner.for.cond:
2538 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
2539 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
2540 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
2541 // CHECK3-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2542 // CHECK3:       omp.inner.for.body:
2543 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
2544 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
2545 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2546 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
2547 // CHECK3-NEXT:    invoke void @_Z3foov()
2548 // CHECK3-NEXT:    to label [[INVOKE_CONT1:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !2
2549 // CHECK3:       invoke.cont1:
2550 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2551 // CHECK3:       omp.body.continue:
2552 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2553 // CHECK3:       omp.inner.for.inc:
2554 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
2555 // CHECK3-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP4]], 1
2556 // CHECK3-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
2557 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
2558 // CHECK3:       lpad:
2559 // CHECK3-NEXT:    [[TMP5:%.*]] = landingpad { i8*, i32 }
2560 // CHECK3-NEXT:    cleanup
2561 // CHECK3-NEXT:    [[TMP6:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 0
2562 // CHECK3-NEXT:    store i8* [[TMP6]], i8** [[EXN_SLOT]], align 8
2563 // CHECK3-NEXT:    [[TMP7:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 1
2564 // CHECK3-NEXT:    store i32 [[TMP7]], i32* [[EHSELECTOR_SLOT]], align 4
2565 // CHECK3-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR7:[0-9]+]]
2566 // CHECK3-NEXT:    br label [[EH_RESUME:%.*]]
2567 // CHECK3:       omp.inner.for.end:
2568 // CHECK3-NEXT:    store i32 100, i32* [[I]], align 4
2569 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB4]], align 4
2570 // CHECK3-NEXT:    store i32 99, i32* [[DOTOMP_UB5]], align 4
2571 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB4]], align 4
2572 // CHECK3-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV6]], align 4
2573 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND8:%.*]]
2574 // CHECK3:       omp.inner.for.cond8:
2575 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
2576 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB5]], align 4, !llvm.access.group !6
2577 // CHECK3-NEXT:    [[CMP9:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
2578 // CHECK3-NEXT:    br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END17:%.*]]
2579 // CHECK3:       omp.inner.for.body10:
2580 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
2581 // CHECK3-NEXT:    [[MUL11:%.*]] = mul nsw i32 [[TMP11]], 1
2582 // CHECK3-NEXT:    [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
2583 // CHECK3-NEXT:    store i32 [[ADD12]], i32* [[I7]], align 4, !llvm.access.group !6
2584 // CHECK3-NEXT:    invoke void @_Z3foov()
2585 // CHECK3-NEXT:    to label [[INVOKE_CONT13:%.*]] unwind label [[TERMINATE_LPAD]], !llvm.access.group !6
2586 // CHECK3:       invoke.cont13:
2587 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE14:%.*]]
2588 // CHECK3:       omp.body.continue14:
2589 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC15:%.*]]
2590 // CHECK3:       omp.inner.for.inc15:
2591 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
2592 // CHECK3-NEXT:    [[ADD16:%.*]] = add nsw i32 [[TMP12]], 1
2593 // CHECK3-NEXT:    store i32 [[ADD16]], i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
2594 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP7:![0-9]+]]
2595 // CHECK3:       omp.inner.for.end17:
2596 // CHECK3-NEXT:    store i32 100, i32* [[I7]], align 4
2597 // CHECK3-NEXT:    [[TMP13:%.*]] = load i8, i8* [[A]], align 1
2598 // CHECK3-NEXT:    [[CONV:%.*]] = sext i8 [[TMP13]] to i32
2599 // CHECK3-NEXT:    [[CALL19:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv()
2600 // CHECK3-NEXT:    to label [[INVOKE_CONT18:%.*]] unwind label [[LPAD]]
2601 // CHECK3:       invoke.cont18:
2602 // CHECK3-NEXT:    [[ADD20:%.*]] = add nsw i32 [[CONV]], [[CALL19]]
2603 // CHECK3-NEXT:    [[CALL22:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv()
2604 // CHECK3-NEXT:    to label [[INVOKE_CONT21:%.*]] unwind label [[LPAD]]
2605 // CHECK3:       invoke.cont21:
2606 // CHECK3-NEXT:    [[ADD23:%.*]] = add nsw i32 [[ADD20]], [[CALL22]]
2607 // CHECK3-NEXT:    store i32 [[ADD23]], i32* [[RETVAL]], align 4
2608 // CHECK3-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR7]]
2609 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4
2610 // CHECK3-NEXT:    ret i32 [[TMP14]]
2611 // CHECK3:       eh.resume:
2612 // CHECK3-NEXT:    [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8
2613 // CHECK3-NEXT:    [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
2614 // CHECK3-NEXT:    [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
2615 // CHECK3-NEXT:    [[LPAD_VAL24:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
2616 // CHECK3-NEXT:    resume { i8*, i32 } [[LPAD_VAL24]]
2617 // CHECK3:       terminate.lpad:
2618 // CHECK3-NEXT:    [[TMP15:%.*]] = landingpad { i8*, i32 }
2619 // CHECK3-NEXT:    catch i8* null
2620 // CHECK3-NEXT:    [[TMP16:%.*]] = extractvalue { i8*, i32 } [[TMP15]], 0
2621 // CHECK3-NEXT:    call void @__clang_call_terminate(i8* [[TMP16]]) #[[ATTR8:[0-9]+]], !llvm.access.group !2
2622 // CHECK3-NEXT:    unreachable
2623 //
2624 //
2625 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SC1El
2626 // CHECK3-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
2627 // CHECK3-NEXT:  entry:
2628 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2629 // CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2630 // CHECK3-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2631 // CHECK3-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
2632 // CHECK3-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2633 // CHECK3-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
2634 // CHECK3-NEXT:    call void @_ZN1SC2El(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]], i64 [[TMP0]])
2635 // CHECK3-NEXT:    ret void
2636 //
2637 //
2638 // CHECK3-LABEL: define {{[^@]+}}@_ZN1ScvcEv
2639 // CHECK3-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 {
2640 // CHECK3-NEXT:  entry:
2641 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2642 // CHECK3-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2643 // CHECK3-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2644 // CHECK3-NEXT:    call void @_Z8mayThrowv()
2645 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
2646 // CHECK3-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A]], align 8
2647 // CHECK3-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i8
2648 // CHECK3-NEXT:    ret i8 [[CONV]]
2649 //
2650 //
2651 // CHECK3-LABEL: define {{[^@]+}}@__clang_call_terminate
2652 // CHECK3-SAME: (i8* [[TMP0:%.*]]) #[[ATTR4:[0-9]+]] comdat {
2653 // CHECK3-NEXT:    [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR7]]
2654 // CHECK3-NEXT:    call void @_ZSt9terminatev() #[[ATTR8]]
2655 // CHECK3-NEXT:    unreachable
2656 //
2657 //
2658 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv
2659 // CHECK3-SAME: () #[[ATTR5:[0-9]+]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
2660 // CHECK3-NEXT:  entry:
2661 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2662 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2663 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2664 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2665 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2666 // CHECK3-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
2667 // CHECK3-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
2668 // CHECK3-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
2669 // CHECK3-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
2670 // CHECK3-NEXT:    [[I6:%.*]] = alloca i32, align 4
2671 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2672 // CHECK3-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
2673 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2674 // CHECK3-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
2675 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2676 // CHECK3:       omp.inner.for.cond:
2677 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
2678 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9
2679 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
2680 // CHECK3-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2681 // CHECK3:       omp.inner.for.body:
2682 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
2683 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
2684 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2685 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9
2686 // CHECK3-NEXT:    invoke void @_Z3foov()
2687 // CHECK3-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !9
2688 // CHECK3:       invoke.cont:
2689 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2690 // CHECK3:       omp.body.continue:
2691 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2692 // CHECK3:       omp.inner.for.inc:
2693 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
2694 // CHECK3-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
2695 // CHECK3-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
2696 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
2697 // CHECK3:       omp.inner.for.end:
2698 // CHECK3-NEXT:    store i32 100, i32* [[I]], align 4
2699 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB3]], align 4
2700 // CHECK3-NEXT:    store i32 99, i32* [[DOTOMP_UB4]], align 4
2701 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
2702 // CHECK3-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
2703 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
2704 // CHECK3:       omp.inner.for.cond7:
2705 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !12
2706 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !12
2707 // CHECK3-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2708 // CHECK3-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]]
2709 // CHECK3:       omp.inner.for.body9:
2710 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !12
2711 // CHECK3-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
2712 // CHECK3-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
2713 // CHECK3-NEXT:    store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !12
2714 // CHECK3-NEXT:    invoke void @_Z3foov()
2715 // CHECK3-NEXT:    to label [[INVOKE_CONT12:%.*]] unwind label [[TERMINATE_LPAD]], !llvm.access.group !12
2716 // CHECK3:       invoke.cont12:
2717 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE13:%.*]]
2718 // CHECK3:       omp.body.continue13:
2719 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC14:%.*]]
2720 // CHECK3:       omp.inner.for.inc14:
2721 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !12
2722 // CHECK3-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP9]], 1
2723 // CHECK3-NEXT:    store i32 [[ADD15]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !12
2724 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP13:![0-9]+]]
2725 // CHECK3:       omp.inner.for.end16:
2726 // CHECK3-NEXT:    store i32 100, i32* [[I6]], align 4
2727 // CHECK3-NEXT:    ret i32 0
2728 // CHECK3:       terminate.lpad:
2729 // CHECK3-NEXT:    [[TMP10:%.*]] = landingpad { i8*, i32 }
2730 // CHECK3-NEXT:    catch i8* null
2731 // CHECK3-NEXT:    [[TMP11:%.*]] = extractvalue { i8*, i32 } [[TMP10]], 0
2732 // CHECK3-NEXT:    call void @__clang_call_terminate(i8* [[TMP11]]) #[[ATTR8]], !llvm.access.group !9
2733 // CHECK3-NEXT:    unreachable
2734 //
2735 //
2736 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv
2737 // CHECK3-SAME: () #[[ATTR5]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
2738 // CHECK3-NEXT:  entry:
2739 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2740 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2741 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2742 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2743 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2744 // CHECK3-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
2745 // CHECK3-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
2746 // CHECK3-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
2747 // CHECK3-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
2748 // CHECK3-NEXT:    [[I6:%.*]] = alloca i32, align 4
2749 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2750 // CHECK3-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
2751 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2752 // CHECK3-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
2753 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2754 // CHECK3:       omp.inner.for.cond:
2755 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
2756 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15
2757 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
2758 // CHECK3-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2759 // CHECK3:       omp.inner.for.body:
2760 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
2761 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
2762 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2763 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !15
2764 // CHECK3-NEXT:    invoke void @_Z3foov()
2765 // CHECK3-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !15
2766 // CHECK3:       invoke.cont:
2767 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2768 // CHECK3:       omp.body.continue:
2769 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2770 // CHECK3:       omp.inner.for.inc:
2771 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
2772 // CHECK3-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
2773 // CHECK3-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
2774 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
2775 // CHECK3:       omp.inner.for.end:
2776 // CHECK3-NEXT:    store i32 100, i32* [[I]], align 4
2777 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB3]], align 4
2778 // CHECK3-NEXT:    store i32 99, i32* [[DOTOMP_UB4]], align 4
2779 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
2780 // CHECK3-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
2781 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
2782 // CHECK3:       omp.inner.for.cond7:
2783 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !18
2784 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !18
2785 // CHECK3-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2786 // CHECK3-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]]
2787 // CHECK3:       omp.inner.for.body9:
2788 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !18
2789 // CHECK3-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
2790 // CHECK3-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
2791 // CHECK3-NEXT:    store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !18
2792 // CHECK3-NEXT:    invoke void @_Z3foov()
2793 // CHECK3-NEXT:    to label [[INVOKE_CONT12:%.*]] unwind label [[TERMINATE_LPAD]], !llvm.access.group !18
2794 // CHECK3:       invoke.cont12:
2795 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE13:%.*]]
2796 // CHECK3:       omp.body.continue13:
2797 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC14:%.*]]
2798 // CHECK3:       omp.inner.for.inc14:
2799 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !18
2800 // CHECK3-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP9]], 1
2801 // CHECK3-NEXT:    store i32 [[ADD15]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !18
2802 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP19:![0-9]+]]
2803 // CHECK3:       omp.inner.for.end16:
2804 // CHECK3-NEXT:    store i32 100, i32* [[I6]], align 4
2805 // CHECK3-NEXT:    ret i32 0
2806 // CHECK3:       terminate.lpad:
2807 // CHECK3-NEXT:    [[TMP10:%.*]] = landingpad { i8*, i32 }
2808 // CHECK3-NEXT:    catch i8* null
2809 // CHECK3-NEXT:    [[TMP11:%.*]] = extractvalue { i8*, i32 } [[TMP10]], 0
2810 // CHECK3-NEXT:    call void @__clang_call_terminate(i8* [[TMP11]]) #[[ATTR8]], !llvm.access.group !15
2811 // CHECK3-NEXT:    unreachable
2812 //
2813 //
2814 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SD1Ev
2815 // CHECK3-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6:[0-9]+]] comdat align 2 {
2816 // CHECK3-NEXT:  entry:
2817 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2818 // CHECK3-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2819 // CHECK3-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2820 // CHECK3-NEXT:    call void @_ZN1SD2Ev(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR7]]
2821 // CHECK3-NEXT:    ret void
2822 //
2823 //
2824 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SC2El
2825 // CHECK3-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
2826 // CHECK3-NEXT:  entry:
2827 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2828 // CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2829 // CHECK3-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2830 // CHECK3-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
2831 // CHECK3-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2832 // CHECK3-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
2833 // CHECK3-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
2834 // CHECK3-NEXT:    store i64 [[TMP0]], i64* [[A2]], align 8
2835 // CHECK3-NEXT:    ret void
2836 //
2837 //
2838 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SD2Ev
2839 // CHECK3-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
2840 // CHECK3-NEXT:  entry:
2841 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2842 // CHECK3-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2843 // CHECK3-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2844 // CHECK3-NEXT:    ret void
2845 //
2846 //
2847 // CHECK4-LABEL: define {{[^@]+}}@main
2848 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
2849 // CHECK4-NEXT:  entry:
2850 // CHECK4-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
2851 // CHECK4-NEXT:    [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
2852 // CHECK4-NEXT:    [[A:%.*]] = alloca i8, align 1
2853 // CHECK4-NEXT:    [[EXN_SLOT:%.*]] = alloca i8*, align 8
2854 // CHECK4-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
2855 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2856 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2857 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2858 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2859 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
2860 // CHECK4-NEXT:    [[_TMP3:%.*]] = alloca i32, align 4
2861 // CHECK4-NEXT:    [[DOTOMP_LB4:%.*]] = alloca i32, align 4
2862 // CHECK4-NEXT:    [[DOTOMP_UB5:%.*]] = alloca i32, align 4
2863 // CHECK4-NEXT:    [[DOTOMP_IV6:%.*]] = alloca i32, align 4
2864 // CHECK4-NEXT:    [[I7:%.*]] = alloca i32, align 4
2865 // CHECK4-NEXT:    store i32 0, i32* [[RETVAL]], align 4
2866 // CHECK4-NEXT:    call void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[S]], i64 0)
2867 // CHECK4-NEXT:    [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[S]])
2868 // CHECK4-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
2869 // CHECK4:       invoke.cont:
2870 // CHECK4-NEXT:    store i8 [[CALL]], i8* [[A]], align 1
2871 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2872 // CHECK4-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
2873 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2874 // CHECK4-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
2875 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2876 // CHECK4:       omp.inner.for.cond:
2877 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
2878 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
2879 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
2880 // CHECK4-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2881 // CHECK4:       omp.inner.for.body:
2882 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
2883 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
2884 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2885 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
2886 // CHECK4-NEXT:    invoke void @_Z3foov()
2887 // CHECK4-NEXT:    to label [[INVOKE_CONT1:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !2
2888 // CHECK4:       invoke.cont1:
2889 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2890 // CHECK4:       omp.body.continue:
2891 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2892 // CHECK4:       omp.inner.for.inc:
2893 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
2894 // CHECK4-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP4]], 1
2895 // CHECK4-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
2896 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
2897 // CHECK4:       lpad:
2898 // CHECK4-NEXT:    [[TMP5:%.*]] = landingpad { i8*, i32 }
2899 // CHECK4-NEXT:    cleanup
2900 // CHECK4-NEXT:    [[TMP6:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 0
2901 // CHECK4-NEXT:    store i8* [[TMP6]], i8** [[EXN_SLOT]], align 8
2902 // CHECK4-NEXT:    [[TMP7:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 1
2903 // CHECK4-NEXT:    store i32 [[TMP7]], i32* [[EHSELECTOR_SLOT]], align 4
2904 // CHECK4-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR7:[0-9]+]]
2905 // CHECK4-NEXT:    br label [[EH_RESUME:%.*]]
2906 // CHECK4:       omp.inner.for.end:
2907 // CHECK4-NEXT:    store i32 100, i32* [[I]], align 4
2908 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB4]], align 4
2909 // CHECK4-NEXT:    store i32 99, i32* [[DOTOMP_UB5]], align 4
2910 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB4]], align 4
2911 // CHECK4-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV6]], align 4
2912 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND8:%.*]]
2913 // CHECK4:       omp.inner.for.cond8:
2914 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
2915 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB5]], align 4, !llvm.access.group !6
2916 // CHECK4-NEXT:    [[CMP9:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
2917 // CHECK4-NEXT:    br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END17:%.*]]
2918 // CHECK4:       omp.inner.for.body10:
2919 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
2920 // CHECK4-NEXT:    [[MUL11:%.*]] = mul nsw i32 [[TMP11]], 1
2921 // CHECK4-NEXT:    [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
2922 // CHECK4-NEXT:    store i32 [[ADD12]], i32* [[I7]], align 4, !llvm.access.group !6
2923 // CHECK4-NEXT:    invoke void @_Z3foov()
2924 // CHECK4-NEXT:    to label [[INVOKE_CONT13:%.*]] unwind label [[TERMINATE_LPAD]], !llvm.access.group !6
2925 // CHECK4:       invoke.cont13:
2926 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE14:%.*]]
2927 // CHECK4:       omp.body.continue14:
2928 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC15:%.*]]
2929 // CHECK4:       omp.inner.for.inc15:
2930 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
2931 // CHECK4-NEXT:    [[ADD16:%.*]] = add nsw i32 [[TMP12]], 1
2932 // CHECK4-NEXT:    store i32 [[ADD16]], i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
2933 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP7:![0-9]+]]
2934 // CHECK4:       omp.inner.for.end17:
2935 // CHECK4-NEXT:    store i32 100, i32* [[I7]], align 4
2936 // CHECK4-NEXT:    [[TMP13:%.*]] = load i8, i8* [[A]], align 1
2937 // CHECK4-NEXT:    [[CONV:%.*]] = sext i8 [[TMP13]] to i32
2938 // CHECK4-NEXT:    [[CALL19:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv()
2939 // CHECK4-NEXT:    to label [[INVOKE_CONT18:%.*]] unwind label [[LPAD]]
2940 // CHECK4:       invoke.cont18:
2941 // CHECK4-NEXT:    [[ADD20:%.*]] = add nsw i32 [[CONV]], [[CALL19]]
2942 // CHECK4-NEXT:    [[CALL22:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv()
2943 // CHECK4-NEXT:    to label [[INVOKE_CONT21:%.*]] unwind label [[LPAD]]
2944 // CHECK4:       invoke.cont21:
2945 // CHECK4-NEXT:    [[ADD23:%.*]] = add nsw i32 [[ADD20]], [[CALL22]]
2946 // CHECK4-NEXT:    store i32 [[ADD23]], i32* [[RETVAL]], align 4
2947 // CHECK4-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR7]]
2948 // CHECK4-NEXT:    [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4
2949 // CHECK4-NEXT:    ret i32 [[TMP14]]
2950 // CHECK4:       eh.resume:
2951 // CHECK4-NEXT:    [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8
2952 // CHECK4-NEXT:    [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
2953 // CHECK4-NEXT:    [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
2954 // CHECK4-NEXT:    [[LPAD_VAL24:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
2955 // CHECK4-NEXT:    resume { i8*, i32 } [[LPAD_VAL24]]
2956 // CHECK4:       terminate.lpad:
2957 // CHECK4-NEXT:    [[TMP15:%.*]] = landingpad { i8*, i32 }
2958 // CHECK4-NEXT:    catch i8* null
2959 // CHECK4-NEXT:    [[TMP16:%.*]] = extractvalue { i8*, i32 } [[TMP15]], 0
2960 // CHECK4-NEXT:    call void @__clang_call_terminate(i8* [[TMP16]]) #[[ATTR8:[0-9]+]], !llvm.access.group !2
2961 // CHECK4-NEXT:    unreachable
2962 //
2963 //
2964 // CHECK4-LABEL: define {{[^@]+}}@_ZN1SC1El
2965 // CHECK4-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
2966 // CHECK4-NEXT:  entry:
2967 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2968 // CHECK4-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2969 // CHECK4-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2970 // CHECK4-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
2971 // CHECK4-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2972 // CHECK4-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
2973 // CHECK4-NEXT:    call void @_ZN1SC2El(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]], i64 [[TMP0]])
2974 // CHECK4-NEXT:    ret void
2975 //
2976 //
2977 // CHECK4-LABEL: define {{[^@]+}}@_ZN1ScvcEv
2978 // CHECK4-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 {
2979 // CHECK4-NEXT:  entry:
2980 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2981 // CHECK4-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2982 // CHECK4-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2983 // CHECK4-NEXT:    call void @_Z8mayThrowv()
2984 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
2985 // CHECK4-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A]], align 8
2986 // CHECK4-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i8
2987 // CHECK4-NEXT:    ret i8 [[CONV]]
2988 //
2989 //
2990 // CHECK4-LABEL: define {{[^@]+}}@__clang_call_terminate
2991 // CHECK4-SAME: (i8* [[TMP0:%.*]]) #[[ATTR4:[0-9]+]] comdat {
2992 // CHECK4-NEXT:    [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR7]]
2993 // CHECK4-NEXT:    call void @_ZSt9terminatev() #[[ATTR8]]
2994 // CHECK4-NEXT:    unreachable
2995 //
2996 //
2997 // CHECK4-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv
2998 // CHECK4-SAME: () #[[ATTR5:[0-9]+]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
2999 // CHECK4-NEXT:  entry:
3000 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3001 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3002 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3003 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3004 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
3005 // CHECK4-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
3006 // CHECK4-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
3007 // CHECK4-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
3008 // CHECK4-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
3009 // CHECK4-NEXT:    [[I6:%.*]] = alloca i32, align 4
3010 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3011 // CHECK4-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
3012 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3013 // CHECK4-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
3014 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3015 // CHECK4:       omp.inner.for.cond:
3016 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
3017 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9
3018 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
3019 // CHECK4-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3020 // CHECK4:       omp.inner.for.body:
3021 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
3022 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
3023 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3024 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9
3025 // CHECK4-NEXT:    invoke void @_Z3foov()
3026 // CHECK4-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !9
3027 // CHECK4:       invoke.cont:
3028 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3029 // CHECK4:       omp.body.continue:
3030 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3031 // CHECK4:       omp.inner.for.inc:
3032 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
3033 // CHECK4-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
3034 // CHECK4-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
3035 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
3036 // CHECK4:       omp.inner.for.end:
3037 // CHECK4-NEXT:    store i32 100, i32* [[I]], align 4
3038 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB3]], align 4
3039 // CHECK4-NEXT:    store i32 99, i32* [[DOTOMP_UB4]], align 4
3040 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
3041 // CHECK4-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
3042 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
3043 // CHECK4:       omp.inner.for.cond7:
3044 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !12
3045 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !12
3046 // CHECK4-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3047 // CHECK4-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]]
3048 // CHECK4:       omp.inner.for.body9:
3049 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !12
3050 // CHECK4-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
3051 // CHECK4-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
3052 // CHECK4-NEXT:    store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !12
3053 // CHECK4-NEXT:    invoke void @_Z3foov()
3054 // CHECK4-NEXT:    to label [[INVOKE_CONT12:%.*]] unwind label [[TERMINATE_LPAD]], !llvm.access.group !12
3055 // CHECK4:       invoke.cont12:
3056 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE13:%.*]]
3057 // CHECK4:       omp.body.continue13:
3058 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC14:%.*]]
3059 // CHECK4:       omp.inner.for.inc14:
3060 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !12
3061 // CHECK4-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP9]], 1
3062 // CHECK4-NEXT:    store i32 [[ADD15]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !12
3063 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP13:![0-9]+]]
3064 // CHECK4:       omp.inner.for.end16:
3065 // CHECK4-NEXT:    store i32 100, i32* [[I6]], align 4
3066 // CHECK4-NEXT:    ret i32 0
3067 // CHECK4:       terminate.lpad:
3068 // CHECK4-NEXT:    [[TMP10:%.*]] = landingpad { i8*, i32 }
3069 // CHECK4-NEXT:    catch i8* null
3070 // CHECK4-NEXT:    [[TMP11:%.*]] = extractvalue { i8*, i32 } [[TMP10]], 0
3071 // CHECK4-NEXT:    call void @__clang_call_terminate(i8* [[TMP11]]) #[[ATTR8]], !llvm.access.group !9
3072 // CHECK4-NEXT:    unreachable
3073 //
3074 //
3075 // CHECK4-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv
3076 // CHECK4-SAME: () #[[ATTR5]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
3077 // CHECK4-NEXT:  entry:
3078 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3079 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3080 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3081 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3082 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
3083 // CHECK4-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
3084 // CHECK4-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
3085 // CHECK4-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
3086 // CHECK4-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
3087 // CHECK4-NEXT:    [[I6:%.*]] = alloca i32, align 4
3088 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3089 // CHECK4-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
3090 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3091 // CHECK4-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
3092 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3093 // CHECK4:       omp.inner.for.cond:
3094 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
3095 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15
3096 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
3097 // CHECK4-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3098 // CHECK4:       omp.inner.for.body:
3099 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
3100 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
3101 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3102 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !15
3103 // CHECK4-NEXT:    invoke void @_Z3foov()
3104 // CHECK4-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !15
3105 // CHECK4:       invoke.cont:
3106 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3107 // CHECK4:       omp.body.continue:
3108 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3109 // CHECK4:       omp.inner.for.inc:
3110 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
3111 // CHECK4-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
3112 // CHECK4-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
3113 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
3114 // CHECK4:       omp.inner.for.end:
3115 // CHECK4-NEXT:    store i32 100, i32* [[I]], align 4
3116 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB3]], align 4
3117 // CHECK4-NEXT:    store i32 99, i32* [[DOTOMP_UB4]], align 4
3118 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
3119 // CHECK4-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
3120 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
3121 // CHECK4:       omp.inner.for.cond7:
3122 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !18
3123 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !18
3124 // CHECK4-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3125 // CHECK4-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]]
3126 // CHECK4:       omp.inner.for.body9:
3127 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !18
3128 // CHECK4-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
3129 // CHECK4-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
3130 // CHECK4-NEXT:    store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !18
3131 // CHECK4-NEXT:    invoke void @_Z3foov()
3132 // CHECK4-NEXT:    to label [[INVOKE_CONT12:%.*]] unwind label [[TERMINATE_LPAD]], !llvm.access.group !18
3133 // CHECK4:       invoke.cont12:
3134 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE13:%.*]]
3135 // CHECK4:       omp.body.continue13:
3136 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC14:%.*]]
3137 // CHECK4:       omp.inner.for.inc14:
3138 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !18
3139 // CHECK4-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP9]], 1
3140 // CHECK4-NEXT:    store i32 [[ADD15]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !18
3141 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP19:![0-9]+]]
3142 // CHECK4:       omp.inner.for.end16:
3143 // CHECK4-NEXT:    store i32 100, i32* [[I6]], align 4
3144 // CHECK4-NEXT:    ret i32 0
3145 // CHECK4:       terminate.lpad:
3146 // CHECK4-NEXT:    [[TMP10:%.*]] = landingpad { i8*, i32 }
3147 // CHECK4-NEXT:    catch i8* null
3148 // CHECK4-NEXT:    [[TMP11:%.*]] = extractvalue { i8*, i32 } [[TMP10]], 0
3149 // CHECK4-NEXT:    call void @__clang_call_terminate(i8* [[TMP11]]) #[[ATTR8]], !llvm.access.group !15
3150 // CHECK4-NEXT:    unreachable
3151 //
3152 //
3153 // CHECK4-LABEL: define {{[^@]+}}@_ZN1SD1Ev
3154 // CHECK4-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6:[0-9]+]] comdat align 2 {
3155 // CHECK4-NEXT:  entry:
3156 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3157 // CHECK4-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3158 // CHECK4-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3159 // CHECK4-NEXT:    call void @_ZN1SD2Ev(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR7]]
3160 // CHECK4-NEXT:    ret void
3161 //
3162 //
3163 // CHECK4-LABEL: define {{[^@]+}}@_ZN1SC2El
3164 // CHECK4-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
3165 // CHECK4-NEXT:  entry:
3166 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3167 // CHECK4-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
3168 // CHECK4-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3169 // CHECK4-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
3170 // CHECK4-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3171 // CHECK4-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
3172 // CHECK4-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
3173 // CHECK4-NEXT:    store i64 [[TMP0]], i64* [[A2]], align 8
3174 // CHECK4-NEXT:    ret void
3175 //
3176 //
3177 // CHECK4-LABEL: define {{[^@]+}}@_ZN1SD2Ev
3178 // CHECK4-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
3179 // CHECK4-NEXT:  entry:
3180 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3181 // CHECK4-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3182 // CHECK4-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3183 // CHECK4-NEXT:    ret void
3184 //
3185 //
3186 // CHECK5-LABEL: define {{[^@]+}}@main
3187 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
3188 // CHECK5-NEXT:  entry:
3189 // CHECK5-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
3190 // CHECK5-NEXT:    [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
3191 // CHECK5-NEXT:    [[A:%.*]] = alloca i8, align 1
3192 // CHECK5-NEXT:    [[EXN_SLOT:%.*]] = alloca i8*, align 8
3193 // CHECK5-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
3194 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3195 // CHECK5-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
3196 // CHECK5-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
3197 // CHECK5-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
3198 // CHECK5-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
3199 // CHECK5-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
3200 // CHECK5-NEXT:    store i32 0, i32* [[RETVAL]], align 4
3201 // CHECK5-NEXT:    call void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[S]], i64 0)
3202 // CHECK5-NEXT:    [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[S]])
3203 // CHECK5-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
3204 // CHECK5:       invoke.cont:
3205 // CHECK5-NEXT:    store i8 [[CALL]], i8* [[A]], align 1
3206 // CHECK5-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100)
3207 // CHECK5-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
3208 // CHECK5-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
3209 // CHECK5-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3210 // CHECK5:       omp_offload.failed:
3211 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR6:[0-9]+]]
3212 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT]]
3213 // CHECK5:       lpad:
3214 // CHECK5-NEXT:    [[TMP2:%.*]] = landingpad { i8*, i32 }
3215 // CHECK5-NEXT:    cleanup
3216 // CHECK5-NEXT:    [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0
3217 // CHECK5-NEXT:    store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8
3218 // CHECK5-NEXT:    [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1
3219 // CHECK5-NEXT:    store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4
3220 // CHECK5-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
3221 // CHECK5-NEXT:    br label [[EH_RESUME:%.*]]
3222 // CHECK5:       omp_offload.cont:
3223 // CHECK5-NEXT:    [[TMP5:%.*]] = load i8, i8* [[A]], align 1
3224 // CHECK5-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8*
3225 // CHECK5-NEXT:    store i8 [[TMP5]], i8* [[CONV]], align 1
3226 // CHECK5-NEXT:    [[TMP6:%.*]] = load i64, i64* [[A_CASTED]], align 8
3227 // CHECK5-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3228 // CHECK5-NEXT:    [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
3229 // CHECK5-NEXT:    store i64 [[TMP6]], i64* [[TMP8]], align 8
3230 // CHECK5-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3231 // CHECK5-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
3232 // CHECK5-NEXT:    store i64 [[TMP6]], i64* [[TMP10]], align 8
3233 // CHECK5-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
3234 // CHECK5-NEXT:    store i8* null, i8** [[TMP11]], align 8
3235 // CHECK5-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3236 // CHECK5-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3237 // CHECK5-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
3238 // CHECK5-NEXT:    [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, i32 1, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
3239 // CHECK5-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
3240 // CHECK5-NEXT:    br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
3241 // CHECK5:       omp_offload.failed2:
3242 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP6]]) #[[ATTR6]]
3243 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
3244 // CHECK5:       omp_offload.cont3:
3245 // CHECK5-NEXT:    [[TMP16:%.*]] = load i8, i8* [[A]], align 1
3246 // CHECK5-NEXT:    [[CONV4:%.*]] = sext i8 [[TMP16]] to i32
3247 // CHECK5-NEXT:    [[CALL6:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv()
3248 // CHECK5-NEXT:    to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]]
3249 // CHECK5:       invoke.cont5:
3250 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[CONV4]], [[CALL6]]
3251 // CHECK5-NEXT:    [[CALL8:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv()
3252 // CHECK5-NEXT:    to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD]]
3253 // CHECK5:       invoke.cont7:
3254 // CHECK5-NEXT:    [[ADD9:%.*]] = add nsw i32 [[ADD]], [[CALL8]]
3255 // CHECK5-NEXT:    store i32 [[ADD9]], i32* [[RETVAL]], align 4
3256 // CHECK5-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
3257 // CHECK5-NEXT:    [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4
3258 // CHECK5-NEXT:    ret i32 [[TMP17]]
3259 // CHECK5:       eh.resume:
3260 // CHECK5-NEXT:    [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8
3261 // CHECK5-NEXT:    [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
3262 // CHECK5-NEXT:    [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
3263 // CHECK5-NEXT:    [[LPAD_VAL10:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
3264 // CHECK5-NEXT:    resume { i8*, i32 } [[LPAD_VAL10]]
3265 //
3266 //
3267 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SC1El
3268 // CHECK5-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
3269 // CHECK5-NEXT:  entry:
3270 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3271 // CHECK5-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
3272 // CHECK5-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3273 // CHECK5-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
3274 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3275 // CHECK5-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
3276 // CHECK5-NEXT:    call void @_ZN1SC2El(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]], i64 [[TMP0]])
3277 // CHECK5-NEXT:    ret void
3278 //
3279 //
3280 // CHECK5-LABEL: define {{[^@]+}}@_ZN1ScvcEv
3281 // CHECK5-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 {
3282 // CHECK5-NEXT:  entry:
3283 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3284 // CHECK5-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3285 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3286 // CHECK5-NEXT:    call void @_Z8mayThrowv()
3287 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
3288 // CHECK5-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A]], align 8
3289 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i8
3290 // CHECK5-NEXT:    ret i8 [[CONV]]
3291 //
3292 //
3293 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
3294 // CHECK5-SAME: () #[[ATTR3:[0-9]+]] {
3295 // CHECK5-NEXT:  entry:
3296 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
3297 // CHECK5-NEXT:    ret void
3298 //
3299 //
3300 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined.
3301 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
3302 // CHECK5-NEXT:  entry:
3303 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3304 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3305 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3306 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3307 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3308 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3309 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3310 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3311 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3312 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3313 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3314 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3315 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3316 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3317 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3318 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3319 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3320 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3321 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3322 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3323 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3324 // CHECK5:       cond.true:
3325 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3326 // CHECK5:       cond.false:
3327 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3328 // CHECK5-NEXT:    br label [[COND_END]]
3329 // CHECK5:       cond.end:
3330 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3331 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3332 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3333 // CHECK5-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3334 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3335 // CHECK5:       omp.inner.for.cond:
3336 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
3337 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !9
3338 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3339 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3340 // CHECK5:       omp.inner.for.body:
3341 // CHECK5-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2), !llvm.access.group !9
3342 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !9
3343 // CHECK5-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3344 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !9
3345 // CHECK5-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3346 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !9
3347 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3348 // CHECK5:       omp.inner.for.inc:
3349 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
3350 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !9
3351 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
3352 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
3353 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
3354 // CHECK5:       omp.inner.for.end:
3355 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3356 // CHECK5:       omp.loop.exit:
3357 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3358 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3359 // CHECK5-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
3360 // CHECK5-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3361 // CHECK5:       .omp.final.then:
3362 // CHECK5-NEXT:    store i32 100, i32* [[I]], align 4
3363 // CHECK5-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3364 // CHECK5:       .omp.final.done:
3365 // CHECK5-NEXT:    ret void
3366 //
3367 //
3368 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..1
3369 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
3370 // CHECK5-NEXT:  entry:
3371 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3372 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3373 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3374 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3375 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3376 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3377 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3378 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3379 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3380 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3381 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3382 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3383 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3384 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3385 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3386 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3387 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
3388 // CHECK5-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3389 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3390 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3391 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3392 // CHECK5-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3393 // CHECK5-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3394 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3395 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3396 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3397 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3398 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3399 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3400 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3401 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3402 // CHECK5:       cond.true:
3403 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3404 // CHECK5:       cond.false:
3405 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3406 // CHECK5-NEXT:    br label [[COND_END]]
3407 // CHECK5:       cond.end:
3408 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3409 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3410 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3411 // CHECK5-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3412 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3413 // CHECK5:       omp.inner.for.cond:
3414 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
3415 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
3416 // CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3417 // CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3418 // CHECK5:       omp.inner.for.body:
3419 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
3420 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3421 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3422 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
3423 // CHECK5-NEXT:    invoke void @_Z3foov()
3424 // CHECK5-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !13
3425 // CHECK5:       invoke.cont:
3426 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3427 // CHECK5:       omp.body.continue:
3428 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3429 // CHECK5:       omp.inner.for.inc:
3430 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
3431 // CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3432 // CHECK5-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
3433 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
3434 // CHECK5:       omp.inner.for.end:
3435 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3436 // CHECK5:       omp.loop.exit:
3437 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3438 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3439 // CHECK5-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3440 // CHECK5-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3441 // CHECK5:       .omp.final.then:
3442 // CHECK5-NEXT:    store i32 100, i32* [[I]], align 4
3443 // CHECK5-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3444 // CHECK5:       .omp.final.done:
3445 // CHECK5-NEXT:    ret void
3446 // CHECK5:       terminate.lpad:
3447 // CHECK5-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
3448 // CHECK5-NEXT:    catch i8* null
3449 // CHECK5-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
3450 // CHECK5-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10:[0-9]+]], !llvm.access.group !13
3451 // CHECK5-NEXT:    unreachable
3452 //
3453 //
3454 // CHECK5-LABEL: define {{[^@]+}}@__clang_call_terminate
3455 // CHECK5-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat {
3456 // CHECK5-NEXT:    [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]]
3457 // CHECK5-NEXT:    call void @_ZSt9terminatev() #[[ATTR10]]
3458 // CHECK5-NEXT:    unreachable
3459 //
3460 //
3461 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74
3462 // CHECK5-SAME: (i64 [[A:%.*]]) #[[ATTR3]] {
3463 // CHECK5-NEXT:  entry:
3464 // CHECK5-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
3465 // CHECK5-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
3466 // CHECK5-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8*
3467 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i8* [[CONV]])
3468 // CHECK5-NEXT:    ret void
3469 //
3470 //
3471 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..2
3472 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i8* nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] {
3473 // CHECK5-NEXT:  entry:
3474 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3475 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3476 // CHECK5-NEXT:    [[A_ADDR:%.*]] = alloca i8*, align 8
3477 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3478 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3479 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3480 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3481 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3482 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3483 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3484 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3485 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3486 // CHECK5-NEXT:    store i8* [[A]], i8** [[A_ADDR]], align 8
3487 // CHECK5-NEXT:    [[TMP0:%.*]] = load i8*, i8** [[A_ADDR]], align 8
3488 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3489 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3490 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3491 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3492 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3493 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3494 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3495 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3496 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
3497 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3498 // CHECK5:       cond.true:
3499 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3500 // CHECK5:       cond.false:
3501 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3502 // CHECK5-NEXT:    br label [[COND_END]]
3503 // CHECK5:       cond.end:
3504 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3505 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3506 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3507 // CHECK5-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3508 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3509 // CHECK5:       omp.inner.for.cond:
3510 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
3511 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !18
3512 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3513 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3514 // CHECK5:       omp.inner.for.body:
3515 // CHECK5-NEXT:    [[TMP8:%.*]] = load i8, i8* [[TMP0]], align 1, !llvm.access.group !18
3516 // CHECK5-NEXT:    [[TMP9:%.*]] = sext i8 [[TMP8]] to i32
3517 // CHECK5-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]]), !llvm.access.group !18
3518 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !18
3519 // CHECK5-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
3520 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !18
3521 // CHECK5-NEXT:    [[TMP13:%.*]] = zext i32 [[TMP12]] to i64
3522 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]]), !llvm.access.group !18
3523 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3524 // CHECK5:       omp.inner.for.inc:
3525 // CHECK5-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
3526 // CHECK5-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !18
3527 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
3528 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
3529 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
3530 // CHECK5:       omp.inner.for.end:
3531 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3532 // CHECK5:       omp.loop.exit:
3533 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3534 // CHECK5-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3535 // CHECK5-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
3536 // CHECK5-NEXT:    br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3537 // CHECK5:       .omp.final.then:
3538 // CHECK5-NEXT:    store i32 100, i32* [[I]], align 4
3539 // CHECK5-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3540 // CHECK5:       .omp.final.done:
3541 // CHECK5-NEXT:    ret void
3542 //
3543 //
3544 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..3
3545 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
3546 // CHECK5-NEXT:  entry:
3547 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3548 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3549 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3550 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3551 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3552 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3553 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3554 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3555 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3556 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3557 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3558 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3559 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3560 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3561 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3562 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3563 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
3564 // CHECK5-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3565 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3566 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3567 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3568 // CHECK5-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3569 // CHECK5-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3570 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3571 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3572 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3573 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3574 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3575 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3576 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3577 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3578 // CHECK5:       cond.true:
3579 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3580 // CHECK5:       cond.false:
3581 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3582 // CHECK5-NEXT:    br label [[COND_END]]
3583 // CHECK5:       cond.end:
3584 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3585 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3586 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3587 // CHECK5-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3588 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3589 // CHECK5:       omp.inner.for.cond:
3590 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
3591 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21
3592 // CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3593 // CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3594 // CHECK5:       omp.inner.for.body:
3595 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
3596 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3597 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3598 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21
3599 // CHECK5-NEXT:    invoke void @_Z3foov()
3600 // CHECK5-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !21
3601 // CHECK5:       invoke.cont:
3602 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3603 // CHECK5:       omp.body.continue:
3604 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3605 // CHECK5:       omp.inner.for.inc:
3606 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
3607 // CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3608 // CHECK5-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
3609 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
3610 // CHECK5:       omp.inner.for.end:
3611 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3612 // CHECK5:       omp.loop.exit:
3613 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3614 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3615 // CHECK5-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3616 // CHECK5-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3617 // CHECK5:       .omp.final.then:
3618 // CHECK5-NEXT:    store i32 100, i32* [[I]], align 4
3619 // CHECK5-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3620 // CHECK5:       .omp.final.done:
3621 // CHECK5-NEXT:    ret void
3622 // CHECK5:       terminate.lpad:
3623 // CHECK5-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
3624 // CHECK5-NEXT:    catch i8* null
3625 // CHECK5-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
3626 // CHECK5-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !21
3627 // CHECK5-NEXT:    unreachable
3628 //
3629 //
3630 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv
3631 // CHECK5-SAME: () #[[ATTR7:[0-9]+]] comdat {
3632 // CHECK5-NEXT:  entry:
3633 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3634 // CHECK5-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
3635 // CHECK5-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
3636 // CHECK5-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
3637 // CHECK5-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
3638 // CHECK5-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3639 // CHECK5:       omp_offload.failed:
3640 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR6]]
3641 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT]]
3642 // CHECK5:       omp_offload.cont:
3643 // CHECK5-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
3644 // CHECK5-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
3645 // CHECK5-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
3646 // CHECK5-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
3647 // CHECK5:       omp_offload.failed2:
3648 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR6]]
3649 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
3650 // CHECK5:       omp_offload.cont3:
3651 // CHECK5-NEXT:    ret i32 0
3652 //
3653 //
3654 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv
3655 // CHECK5-SAME: () #[[ATTR7]] comdat {
3656 // CHECK5-NEXT:  entry:
3657 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3658 // CHECK5-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
3659 // CHECK5-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
3660 // CHECK5-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
3661 // CHECK5-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
3662 // CHECK5-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3663 // CHECK5:       omp_offload.failed:
3664 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR6]]
3665 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT]]
3666 // CHECK5:       omp_offload.cont:
3667 // CHECK5-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
3668 // CHECK5-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
3669 // CHECK5-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
3670 // CHECK5-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
3671 // CHECK5:       omp_offload.failed2:
3672 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR6]]
3673 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
3674 // CHECK5:       omp_offload.cont3:
3675 // CHECK5-NEXT:    ret i32 0
3676 //
3677 //
3678 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SD1Ev
3679 // CHECK5-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 {
3680 // CHECK5-NEXT:  entry:
3681 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3682 // CHECK5-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3683 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3684 // CHECK5-NEXT:    call void @_ZN1SD2Ev(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR6]]
3685 // CHECK5-NEXT:    ret void
3686 //
3687 //
3688 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SC2El
3689 // CHECK5-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
3690 // CHECK5-NEXT:  entry:
3691 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3692 // CHECK5-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
3693 // CHECK5-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3694 // CHECK5-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
3695 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3696 // CHECK5-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
3697 // CHECK5-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
3698 // CHECK5-NEXT:    store i64 [[TMP0]], i64* [[A2]], align 8
3699 // CHECK5-NEXT:    ret void
3700 //
3701 //
3702 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52
3703 // CHECK5-SAME: () #[[ATTR3]] {
3704 // CHECK5-NEXT:  entry:
3705 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
3706 // CHECK5-NEXT:    ret void
3707 //
3708 //
3709 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..4
3710 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
3711 // CHECK5-NEXT:  entry:
3712 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3713 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3714 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3715 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3716 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3717 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3718 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3719 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3720 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3721 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3722 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3723 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3724 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3725 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3726 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3727 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3728 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3729 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3730 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3731 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3732 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3733 // CHECK5:       cond.true:
3734 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3735 // CHECK5:       cond.false:
3736 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3737 // CHECK5-NEXT:    br label [[COND_END]]
3738 // CHECK5:       cond.end:
3739 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3740 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3741 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3742 // CHECK5-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3743 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3744 // CHECK5:       omp.inner.for.cond:
3745 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
3746 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !24
3747 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3748 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3749 // CHECK5:       omp.inner.for.body:
3750 // CHECK5-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5), !llvm.access.group !24
3751 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !24
3752 // CHECK5-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3753 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !24
3754 // CHECK5-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3755 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !24
3756 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3757 // CHECK5:       omp.inner.for.inc:
3758 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
3759 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !24
3760 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
3761 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
3762 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
3763 // CHECK5:       omp.inner.for.end:
3764 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3765 // CHECK5:       omp.loop.exit:
3766 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3767 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3768 // CHECK5-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
3769 // CHECK5-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3770 // CHECK5:       .omp.final.then:
3771 // CHECK5-NEXT:    store i32 100, i32* [[I]], align 4
3772 // CHECK5-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3773 // CHECK5:       .omp.final.done:
3774 // CHECK5-NEXT:    ret void
3775 //
3776 //
3777 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..5
3778 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
3779 // CHECK5-NEXT:  entry:
3780 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3781 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3782 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3783 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3784 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3785 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3786 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3787 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3788 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3789 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3790 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3791 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3792 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3793 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3794 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3795 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3796 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
3797 // CHECK5-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3798 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3799 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3800 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3801 // CHECK5-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3802 // CHECK5-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3803 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3804 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3805 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3806 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3807 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3808 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3809 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3810 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3811 // CHECK5:       cond.true:
3812 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3813 // CHECK5:       cond.false:
3814 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3815 // CHECK5-NEXT:    br label [[COND_END]]
3816 // CHECK5:       cond.end:
3817 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3818 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3819 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3820 // CHECK5-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3821 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3822 // CHECK5:       omp.inner.for.cond:
3823 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
3824 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !27
3825 // CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3826 // CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3827 // CHECK5:       omp.inner.for.body:
3828 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
3829 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3830 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3831 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !27
3832 // CHECK5-NEXT:    invoke void @_Z3foov()
3833 // CHECK5-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !27
3834 // CHECK5:       invoke.cont:
3835 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3836 // CHECK5:       omp.body.continue:
3837 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3838 // CHECK5:       omp.inner.for.inc:
3839 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
3840 // CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3841 // CHECK5-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
3842 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]
3843 // CHECK5:       omp.inner.for.end:
3844 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3845 // CHECK5:       omp.loop.exit:
3846 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3847 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3848 // CHECK5-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3849 // CHECK5-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3850 // CHECK5:       .omp.final.then:
3851 // CHECK5-NEXT:    store i32 100, i32* [[I]], align 4
3852 // CHECK5-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3853 // CHECK5:       .omp.final.done:
3854 // CHECK5-NEXT:    ret void
3855 // CHECK5:       terminate.lpad:
3856 // CHECK5-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
3857 // CHECK5-NEXT:    catch i8* null
3858 // CHECK5-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
3859 // CHECK5-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !27
3860 // CHECK5-NEXT:    unreachable
3861 //
3862 //
3863 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57
3864 // CHECK5-SAME: () #[[ATTR3]] {
3865 // CHECK5-NEXT:  entry:
3866 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
3867 // CHECK5-NEXT:    ret void
3868 //
3869 //
3870 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..6
3871 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
3872 // CHECK5-NEXT:  entry:
3873 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3874 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3875 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3876 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3877 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3878 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3879 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3880 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3881 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3882 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3883 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3884 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3885 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3886 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3887 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3888 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3889 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3890 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3891 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3892 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3893 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3894 // CHECK5:       cond.true:
3895 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3896 // CHECK5:       cond.false:
3897 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3898 // CHECK5-NEXT:    br label [[COND_END]]
3899 // CHECK5:       cond.end:
3900 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3901 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3902 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3903 // CHECK5-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3904 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3905 // CHECK5:       omp.inner.for.cond:
3906 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30
3907 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !30
3908 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3909 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3910 // CHECK5:       omp.inner.for.body:
3911 // CHECK5-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23), !llvm.access.group !30
3912 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !30
3913 // CHECK5-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3914 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !30
3915 // CHECK5-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3916 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !30
3917 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3918 // CHECK5:       omp.inner.for.inc:
3919 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30
3920 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !30
3921 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
3922 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30
3923 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]
3924 // CHECK5:       omp.inner.for.end:
3925 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3926 // CHECK5:       omp.loop.exit:
3927 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3928 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3929 // CHECK5-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
3930 // CHECK5-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3931 // CHECK5:       .omp.final.then:
3932 // CHECK5-NEXT:    store i32 100, i32* [[I]], align 4
3933 // CHECK5-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3934 // CHECK5:       .omp.final.done:
3935 // CHECK5-NEXT:    ret void
3936 //
3937 //
3938 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..7
3939 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
3940 // CHECK5-NEXT:  entry:
3941 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3942 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3943 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3944 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3945 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3946 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3947 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3948 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3949 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3950 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3951 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3952 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3953 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3954 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3955 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3956 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3957 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
3958 // CHECK5-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3959 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3960 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3961 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3962 // CHECK5-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3963 // CHECK5-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3964 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3965 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3966 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3967 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3968 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3969 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3970 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3971 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3972 // CHECK5:       cond.true:
3973 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3974 // CHECK5:       cond.false:
3975 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3976 // CHECK5-NEXT:    br label [[COND_END]]
3977 // CHECK5:       cond.end:
3978 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3979 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3980 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3981 // CHECK5-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3982 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3983 // CHECK5:       omp.inner.for.cond:
3984 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
3985 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !33
3986 // CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3987 // CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3988 // CHECK5:       omp.inner.for.body:
3989 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
3990 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3991 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3992 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !33
3993 // CHECK5-NEXT:    invoke void @_Z3foov()
3994 // CHECK5-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !33
3995 // CHECK5:       invoke.cont:
3996 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3997 // CHECK5:       omp.body.continue:
3998 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3999 // CHECK5:       omp.inner.for.inc:
4000 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
4001 // CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4002 // CHECK5-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
4003 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
4004 // CHECK5:       omp.inner.for.end:
4005 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4006 // CHECK5:       omp.loop.exit:
4007 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4008 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4009 // CHECK5-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4010 // CHECK5-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4011 // CHECK5:       .omp.final.then:
4012 // CHECK5-NEXT:    store i32 100, i32* [[I]], align 4
4013 // CHECK5-NEXT:    br label [[DOTOMP_FINAL_DONE]]
4014 // CHECK5:       .omp.final.done:
4015 // CHECK5-NEXT:    ret void
4016 // CHECK5:       terminate.lpad:
4017 // CHECK5-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
4018 // CHECK5-NEXT:    catch i8* null
4019 // CHECK5-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
4020 // CHECK5-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !33
4021 // CHECK5-NEXT:    unreachable
4022 //
4023 //
4024 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52
4025 // CHECK5-SAME: () #[[ATTR3]] {
4026 // CHECK5-NEXT:  entry:
4027 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*))
4028 // CHECK5-NEXT:    ret void
4029 //
4030 //
4031 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..8
4032 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
4033 // CHECK5-NEXT:  entry:
4034 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4035 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4036 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4037 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4038 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4039 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4040 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4041 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4042 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4043 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4044 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4045 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4046 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4047 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4048 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4049 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4050 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4051 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4052 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4053 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4054 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4055 // CHECK5:       cond.true:
4056 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4057 // CHECK5:       cond.false:
4058 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4059 // CHECK5-NEXT:    br label [[COND_END]]
4060 // CHECK5:       cond.end:
4061 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4062 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4063 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4064 // CHECK5-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4065 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4066 // CHECK5:       omp.inner.for.cond:
4067 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36
4068 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !36
4069 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4070 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4071 // CHECK5:       omp.inner.for.body:
4072 // CHECK5-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1), !llvm.access.group !36
4073 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !36
4074 // CHECK5-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4075 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !36
4076 // CHECK5-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4077 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !36
4078 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4079 // CHECK5:       omp.inner.for.inc:
4080 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36
4081 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !36
4082 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
4083 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36
4084 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]]
4085 // CHECK5:       omp.inner.for.end:
4086 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4087 // CHECK5:       omp.loop.exit:
4088 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4089 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4090 // CHECK5-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
4091 // CHECK5-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4092 // CHECK5:       .omp.final.then:
4093 // CHECK5-NEXT:    store i32 100, i32* [[I]], align 4
4094 // CHECK5-NEXT:    br label [[DOTOMP_FINAL_DONE]]
4095 // CHECK5:       .omp.final.done:
4096 // CHECK5-NEXT:    ret void
4097 //
4098 //
4099 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..9
4100 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
4101 // CHECK5-NEXT:  entry:
4102 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4103 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4104 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4105 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4106 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4107 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4108 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4109 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4110 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4111 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4112 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4113 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4114 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4115 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4116 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4117 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4118 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
4119 // CHECK5-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4120 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4121 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4122 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4123 // CHECK5-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4124 // CHECK5-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4125 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4126 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4127 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4128 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4129 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4130 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4131 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4132 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4133 // CHECK5:       cond.true:
4134 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4135 // CHECK5:       cond.false:
4136 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4137 // CHECK5-NEXT:    br label [[COND_END]]
4138 // CHECK5:       cond.end:
4139 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4140 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4141 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4142 // CHECK5-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4143 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4144 // CHECK5:       omp.inner.for.cond:
4145 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
4146 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !39
4147 // CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4148 // CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4149 // CHECK5:       omp.inner.for.body:
4150 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
4151 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4152 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4153 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !39
4154 // CHECK5-NEXT:    invoke void @_Z3foov()
4155 // CHECK5-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !39
4156 // CHECK5:       invoke.cont:
4157 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4158 // CHECK5:       omp.body.continue:
4159 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4160 // CHECK5:       omp.inner.for.inc:
4161 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
4162 // CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4163 // CHECK5-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
4164 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
4165 // CHECK5:       omp.inner.for.end:
4166 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4167 // CHECK5:       omp.loop.exit:
4168 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4169 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4170 // CHECK5-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4171 // CHECK5-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4172 // CHECK5:       .omp.final.then:
4173 // CHECK5-NEXT:    store i32 100, i32* [[I]], align 4
4174 // CHECK5-NEXT:    br label [[DOTOMP_FINAL_DONE]]
4175 // CHECK5:       .omp.final.done:
4176 // CHECK5-NEXT:    ret void
4177 // CHECK5:       terminate.lpad:
4178 // CHECK5-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
4179 // CHECK5-NEXT:    catch i8* null
4180 // CHECK5-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
4181 // CHECK5-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !39
4182 // CHECK5-NEXT:    unreachable
4183 //
4184 //
4185 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57
4186 // CHECK5-SAME: () #[[ATTR3]] {
4187 // CHECK5-NEXT:  entry:
4188 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
4189 // CHECK5-NEXT:    ret void
4190 //
4191 //
4192 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..10
4193 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
4194 // CHECK5-NEXT:  entry:
4195 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4196 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4197 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4198 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4199 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4200 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4201 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4202 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4203 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4204 // CHECK5-NEXT:    [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8
4205 // CHECK5-NEXT:    [[EXN_SLOT:%.*]] = alloca i8*, align 8
4206 // CHECK5-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
4207 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4208 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4209 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4210 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4211 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4212 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4213 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4214 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4215 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4216 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4217 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4218 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4219 // CHECK5:       cond.true:
4220 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4221 // CHECK5:       cond.false:
4222 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4223 // CHECK5-NEXT:    br label [[COND_END]]
4224 // CHECK5:       cond.end:
4225 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4226 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4227 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4228 // CHECK5-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4229 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4230 // CHECK5:       omp.inner.for.cond:
4231 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !42
4232 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !42
4233 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4234 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4235 // CHECK5:       omp.inner.for.body:
4236 // CHECK5-NEXT:    invoke void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 23)
4237 // CHECK5-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !42
4238 // CHECK5:       invoke.cont:
4239 // CHECK5-NEXT:    [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]])
4240 // CHECK5-NEXT:    to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD:%.*]], !llvm.access.group !42
4241 // CHECK5:       invoke.cont2:
4242 // CHECK5-NEXT:    [[TMP7:%.*]] = sext i8 [[CALL]] to i32
4243 // CHECK5-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]]), !llvm.access.group !42
4244 // CHECK5-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]], !llvm.access.group !42
4245 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !42
4246 // CHECK5-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
4247 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !42
4248 // CHECK5-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
4249 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]), !llvm.access.group !42
4250 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4251 // CHECK5:       omp.inner.for.inc:
4252 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !42
4253 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !42
4254 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
4255 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !42
4256 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP43:![0-9]+]]
4257 // CHECK5:       lpad:
4258 // CHECK5-NEXT:    [[TMP14:%.*]] = landingpad { i8*, i32 }
4259 // CHECK5-NEXT:    catch i8* null
4260 // CHECK5-NEXT:    [[TMP15:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 0
4261 // CHECK5-NEXT:    store i8* [[TMP15]], i8** [[EXN_SLOT]], align 8, !llvm.access.group !42
4262 // CHECK5-NEXT:    [[TMP16:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 1
4263 // CHECK5-NEXT:    store i32 [[TMP16]], i32* [[EHSELECTOR_SLOT]], align 4, !llvm.access.group !42
4264 // CHECK5-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]], !llvm.access.group !42
4265 // CHECK5-NEXT:    br label [[TERMINATE_HANDLER:%.*]]
4266 // CHECK5:       omp.inner.for.end:
4267 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4268 // CHECK5:       omp.loop.exit:
4269 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4270 // CHECK5-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4271 // CHECK5-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
4272 // CHECK5-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4273 // CHECK5:       .omp.final.then:
4274 // CHECK5-NEXT:    store i32 100, i32* [[I]], align 4
4275 // CHECK5-NEXT:    br label [[DOTOMP_FINAL_DONE]]
4276 // CHECK5:       .omp.final.done:
4277 // CHECK5-NEXT:    ret void
4278 // CHECK5:       terminate.lpad:
4279 // CHECK5-NEXT:    [[TMP19:%.*]] = landingpad { i8*, i32 }
4280 // CHECK5-NEXT:    catch i8* null
4281 // CHECK5-NEXT:    [[TMP20:%.*]] = extractvalue { i8*, i32 } [[TMP19]], 0
4282 // CHECK5-NEXT:    call void @__clang_call_terminate(i8* [[TMP20]]) #[[ATTR10]], !llvm.access.group !42
4283 // CHECK5-NEXT:    unreachable
4284 // CHECK5:       terminate.handler:
4285 // CHECK5-NEXT:    [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8, !llvm.access.group !42
4286 // CHECK5-NEXT:    call void @__clang_call_terminate(i8* [[EXN]]) #[[ATTR10]], !llvm.access.group !42
4287 // CHECK5-NEXT:    unreachable
4288 //
4289 //
4290 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..11
4291 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
4292 // CHECK5-NEXT:  entry:
4293 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4294 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4295 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4296 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4297 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4298 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4299 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4300 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4301 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4302 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4303 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4304 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4305 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4306 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4307 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4308 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4309 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
4310 // CHECK5-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4311 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4312 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4313 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4314 // CHECK5-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4315 // CHECK5-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4316 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4317 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4318 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4319 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4320 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4321 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4322 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4323 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4324 // CHECK5:       cond.true:
4325 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4326 // CHECK5:       cond.false:
4327 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4328 // CHECK5-NEXT:    br label [[COND_END]]
4329 // CHECK5:       cond.end:
4330 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4331 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4332 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4333 // CHECK5-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4334 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4335 // CHECK5:       omp.inner.for.cond:
4336 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !45
4337 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !45
4338 // CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4339 // CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4340 // CHECK5:       omp.inner.for.body:
4341 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !45
4342 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4343 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4344 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !45
4345 // CHECK5-NEXT:    invoke void @_Z3foov()
4346 // CHECK5-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !45
4347 // CHECK5:       invoke.cont:
4348 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4349 // CHECK5:       omp.body.continue:
4350 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4351 // CHECK5:       omp.inner.for.inc:
4352 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !45
4353 // CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4354 // CHECK5-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !45
4355 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP46:![0-9]+]]
4356 // CHECK5:       omp.inner.for.end:
4357 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4358 // CHECK5:       omp.loop.exit:
4359 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4360 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4361 // CHECK5-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4362 // CHECK5-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4363 // CHECK5:       .omp.final.then:
4364 // CHECK5-NEXT:    store i32 100, i32* [[I]], align 4
4365 // CHECK5-NEXT:    br label [[DOTOMP_FINAL_DONE]]
4366 // CHECK5:       .omp.final.done:
4367 // CHECK5-NEXT:    ret void
4368 // CHECK5:       terminate.lpad:
4369 // CHECK5-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
4370 // CHECK5-NEXT:    catch i8* null
4371 // CHECK5-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
4372 // CHECK5-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !45
4373 // CHECK5-NEXT:    unreachable
4374 //
4375 //
4376 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SD2Ev
4377 // CHECK5-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
4378 // CHECK5-NEXT:  entry:
4379 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4380 // CHECK5-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4381 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4382 // CHECK5-NEXT:    ret void
4383 //
4384 //
4385 // CHECK5-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
4386 // CHECK5-SAME: () #[[ATTR9:[0-9]+]] {
4387 // CHECK5-NEXT:  entry:
4388 // CHECK5-NEXT:    call void @__tgt_register_requires(i64 1)
4389 // CHECK5-NEXT:    ret void
4390 //
4391 //
4392 // CHECK6-LABEL: define {{[^@]+}}@main
4393 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
4394 // CHECK6-NEXT:  entry:
4395 // CHECK6-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
4396 // CHECK6-NEXT:    [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
4397 // CHECK6-NEXT:    [[A:%.*]] = alloca i8, align 1
4398 // CHECK6-NEXT:    [[EXN_SLOT:%.*]] = alloca i8*, align 8
4399 // CHECK6-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
4400 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4401 // CHECK6-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
4402 // CHECK6-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
4403 // CHECK6-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
4404 // CHECK6-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
4405 // CHECK6-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
4406 // CHECK6-NEXT:    store i32 0, i32* [[RETVAL]], align 4
4407 // CHECK6-NEXT:    call void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[S]], i64 0)
4408 // CHECK6-NEXT:    [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[S]])
4409 // CHECK6-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
4410 // CHECK6:       invoke.cont:
4411 // CHECK6-NEXT:    store i8 [[CALL]], i8* [[A]], align 1
4412 // CHECK6-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100)
4413 // CHECK6-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
4414 // CHECK6-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
4415 // CHECK6-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4416 // CHECK6:       omp_offload.failed:
4417 // CHECK6-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR6:[0-9]+]]
4418 // CHECK6-NEXT:    br label [[OMP_OFFLOAD_CONT]]
4419 // CHECK6:       lpad:
4420 // CHECK6-NEXT:    [[TMP2:%.*]] = landingpad { i8*, i32 }
4421 // CHECK6-NEXT:    cleanup
4422 // CHECK6-NEXT:    [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0
4423 // CHECK6-NEXT:    store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8
4424 // CHECK6-NEXT:    [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1
4425 // CHECK6-NEXT:    store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4
4426 // CHECK6-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
4427 // CHECK6-NEXT:    br label [[EH_RESUME:%.*]]
4428 // CHECK6:       omp_offload.cont:
4429 // CHECK6-NEXT:    [[TMP5:%.*]] = load i8, i8* [[A]], align 1
4430 // CHECK6-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8*
4431 // CHECK6-NEXT:    store i8 [[TMP5]], i8* [[CONV]], align 1
4432 // CHECK6-NEXT:    [[TMP6:%.*]] = load i64, i64* [[A_CASTED]], align 8
4433 // CHECK6-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4434 // CHECK6-NEXT:    [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
4435 // CHECK6-NEXT:    store i64 [[TMP6]], i64* [[TMP8]], align 8
4436 // CHECK6-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4437 // CHECK6-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
4438 // CHECK6-NEXT:    store i64 [[TMP6]], i64* [[TMP10]], align 8
4439 // CHECK6-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
4440 // CHECK6-NEXT:    store i8* null, i8** [[TMP11]], align 8
4441 // CHECK6-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4442 // CHECK6-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4443 // CHECK6-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
4444 // CHECK6-NEXT:    [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, i32 1, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
4445 // CHECK6-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
4446 // CHECK6-NEXT:    br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
4447 // CHECK6:       omp_offload.failed2:
4448 // CHECK6-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP6]]) #[[ATTR6]]
4449 // CHECK6-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
4450 // CHECK6:       omp_offload.cont3:
4451 // CHECK6-NEXT:    [[TMP16:%.*]] = load i8, i8* [[A]], align 1
4452 // CHECK6-NEXT:    [[CONV4:%.*]] = sext i8 [[TMP16]] to i32
4453 // CHECK6-NEXT:    [[CALL6:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv()
4454 // CHECK6-NEXT:    to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]]
4455 // CHECK6:       invoke.cont5:
4456 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[CONV4]], [[CALL6]]
4457 // CHECK6-NEXT:    [[CALL8:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv()
4458 // CHECK6-NEXT:    to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD]]
4459 // CHECK6:       invoke.cont7:
4460 // CHECK6-NEXT:    [[ADD9:%.*]] = add nsw i32 [[ADD]], [[CALL8]]
4461 // CHECK6-NEXT:    store i32 [[ADD9]], i32* [[RETVAL]], align 4
4462 // CHECK6-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
4463 // CHECK6-NEXT:    [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4
4464 // CHECK6-NEXT:    ret i32 [[TMP17]]
4465 // CHECK6:       eh.resume:
4466 // CHECK6-NEXT:    [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8
4467 // CHECK6-NEXT:    [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
4468 // CHECK6-NEXT:    [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
4469 // CHECK6-NEXT:    [[LPAD_VAL10:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
4470 // CHECK6-NEXT:    resume { i8*, i32 } [[LPAD_VAL10]]
4471 //
4472 //
4473 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SC1El
4474 // CHECK6-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
4475 // CHECK6-NEXT:  entry:
4476 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4477 // CHECK6-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
4478 // CHECK6-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4479 // CHECK6-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
4480 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4481 // CHECK6-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
4482 // CHECK6-NEXT:    call void @_ZN1SC2El(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]], i64 [[TMP0]])
4483 // CHECK6-NEXT:    ret void
4484 //
4485 //
4486 // CHECK6-LABEL: define {{[^@]+}}@_ZN1ScvcEv
4487 // CHECK6-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 {
4488 // CHECK6-NEXT:  entry:
4489 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4490 // CHECK6-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4491 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4492 // CHECK6-NEXT:    call void @_Z8mayThrowv()
4493 // CHECK6-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
4494 // CHECK6-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A]], align 8
4495 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i8
4496 // CHECK6-NEXT:    ret i8 [[CONV]]
4497 //
4498 //
4499 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
4500 // CHECK6-SAME: () #[[ATTR3:[0-9]+]] {
4501 // CHECK6-NEXT:  entry:
4502 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
4503 // CHECK6-NEXT:    ret void
4504 //
4505 //
4506 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined.
4507 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
4508 // CHECK6-NEXT:  entry:
4509 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4510 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4511 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4512 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4513 // CHECK6-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4514 // CHECK6-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4515 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4516 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4517 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
4518 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4519 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4520 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4521 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4522 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4523 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4524 // CHECK6-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4525 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4526 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4527 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4528 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4529 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4530 // CHECK6:       cond.true:
4531 // CHECK6-NEXT:    br label [[COND_END:%.*]]
4532 // CHECK6:       cond.false:
4533 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4534 // CHECK6-NEXT:    br label [[COND_END]]
4535 // CHECK6:       cond.end:
4536 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4537 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4538 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4539 // CHECK6-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4540 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4541 // CHECK6:       omp.inner.for.cond:
4542 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
4543 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !9
4544 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4545 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4546 // CHECK6:       omp.inner.for.body:
4547 // CHECK6-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2), !llvm.access.group !9
4548 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !9
4549 // CHECK6-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4550 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !9
4551 // CHECK6-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4552 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !9
4553 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4554 // CHECK6:       omp.inner.for.inc:
4555 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
4556 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !9
4557 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
4558 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
4559 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
4560 // CHECK6:       omp.inner.for.end:
4561 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4562 // CHECK6:       omp.loop.exit:
4563 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4564 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4565 // CHECK6-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
4566 // CHECK6-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4567 // CHECK6:       .omp.final.then:
4568 // CHECK6-NEXT:    store i32 100, i32* [[I]], align 4
4569 // CHECK6-NEXT:    br label [[DOTOMP_FINAL_DONE]]
4570 // CHECK6:       .omp.final.done:
4571 // CHECK6-NEXT:    ret void
4572 //
4573 //
4574 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..1
4575 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
4576 // CHECK6-NEXT:  entry:
4577 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4578 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4579 // CHECK6-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4580 // CHECK6-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4581 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4582 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4583 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4584 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4585 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4586 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4587 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
4588 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4589 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4590 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4591 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4592 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4593 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
4594 // CHECK6-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4595 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4596 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4597 // CHECK6-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4598 // CHECK6-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4599 // CHECK6-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4600 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4601 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4602 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4603 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4604 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4605 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4606 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4607 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4608 // CHECK6:       cond.true:
4609 // CHECK6-NEXT:    br label [[COND_END:%.*]]
4610 // CHECK6:       cond.false:
4611 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4612 // CHECK6-NEXT:    br label [[COND_END]]
4613 // CHECK6:       cond.end:
4614 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4615 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4616 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4617 // CHECK6-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4618 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4619 // CHECK6:       omp.inner.for.cond:
4620 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
4621 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
4622 // CHECK6-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4623 // CHECK6-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4624 // CHECK6:       omp.inner.for.body:
4625 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
4626 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4627 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4628 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
4629 // CHECK6-NEXT:    invoke void @_Z3foov()
4630 // CHECK6-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !13
4631 // CHECK6:       invoke.cont:
4632 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4633 // CHECK6:       omp.body.continue:
4634 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4635 // CHECK6:       omp.inner.for.inc:
4636 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
4637 // CHECK6-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4638 // CHECK6-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
4639 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
4640 // CHECK6:       omp.inner.for.end:
4641 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4642 // CHECK6:       omp.loop.exit:
4643 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4644 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4645 // CHECK6-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4646 // CHECK6-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4647 // CHECK6:       .omp.final.then:
4648 // CHECK6-NEXT:    store i32 100, i32* [[I]], align 4
4649 // CHECK6-NEXT:    br label [[DOTOMP_FINAL_DONE]]
4650 // CHECK6:       .omp.final.done:
4651 // CHECK6-NEXT:    ret void
4652 // CHECK6:       terminate.lpad:
4653 // CHECK6-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
4654 // CHECK6-NEXT:    catch i8* null
4655 // CHECK6-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
4656 // CHECK6-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10:[0-9]+]], !llvm.access.group !13
4657 // CHECK6-NEXT:    unreachable
4658 //
4659 //
4660 // CHECK6-LABEL: define {{[^@]+}}@__clang_call_terminate
4661 // CHECK6-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat {
4662 // CHECK6-NEXT:    [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]]
4663 // CHECK6-NEXT:    call void @_ZSt9terminatev() #[[ATTR10]]
4664 // CHECK6-NEXT:    unreachable
4665 //
4666 //
4667 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74
4668 // CHECK6-SAME: (i64 [[A:%.*]]) #[[ATTR3]] {
4669 // CHECK6-NEXT:  entry:
4670 // CHECK6-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
4671 // CHECK6-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
4672 // CHECK6-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8*
4673 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i8* [[CONV]])
4674 // CHECK6-NEXT:    ret void
4675 //
4676 //
4677 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..2
4678 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i8* nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] {
4679 // CHECK6-NEXT:  entry:
4680 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4681 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4682 // CHECK6-NEXT:    [[A_ADDR:%.*]] = alloca i8*, align 8
4683 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4684 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4685 // CHECK6-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4686 // CHECK6-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4687 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4688 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4689 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
4690 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4691 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4692 // CHECK6-NEXT:    store i8* [[A]], i8** [[A_ADDR]], align 8
4693 // CHECK6-NEXT:    [[TMP0:%.*]] = load i8*, i8** [[A_ADDR]], align 8
4694 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4695 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4696 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4697 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4698 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4699 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4700 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4701 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4702 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
4703 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4704 // CHECK6:       cond.true:
4705 // CHECK6-NEXT:    br label [[COND_END:%.*]]
4706 // CHECK6:       cond.false:
4707 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4708 // CHECK6-NEXT:    br label [[COND_END]]
4709 // CHECK6:       cond.end:
4710 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4711 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4712 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4713 // CHECK6-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4714 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4715 // CHECK6:       omp.inner.for.cond:
4716 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
4717 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !18
4718 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4719 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4720 // CHECK6:       omp.inner.for.body:
4721 // CHECK6-NEXT:    [[TMP8:%.*]] = load i8, i8* [[TMP0]], align 1, !llvm.access.group !18
4722 // CHECK6-NEXT:    [[TMP9:%.*]] = sext i8 [[TMP8]] to i32
4723 // CHECK6-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]]), !llvm.access.group !18
4724 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !18
4725 // CHECK6-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
4726 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !18
4727 // CHECK6-NEXT:    [[TMP13:%.*]] = zext i32 [[TMP12]] to i64
4728 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]]), !llvm.access.group !18
4729 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4730 // CHECK6:       omp.inner.for.inc:
4731 // CHECK6-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
4732 // CHECK6-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !18
4733 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
4734 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
4735 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
4736 // CHECK6:       omp.inner.for.end:
4737 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4738 // CHECK6:       omp.loop.exit:
4739 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4740 // CHECK6-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4741 // CHECK6-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
4742 // CHECK6-NEXT:    br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4743 // CHECK6:       .omp.final.then:
4744 // CHECK6-NEXT:    store i32 100, i32* [[I]], align 4
4745 // CHECK6-NEXT:    br label [[DOTOMP_FINAL_DONE]]
4746 // CHECK6:       .omp.final.done:
4747 // CHECK6-NEXT:    ret void
4748 //
4749 //
4750 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..3
4751 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
4752 // CHECK6-NEXT:  entry:
4753 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4754 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4755 // CHECK6-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4756 // CHECK6-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4757 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4758 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4759 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4760 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4761 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4762 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4763 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
4764 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4765 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4766 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4767 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4768 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4769 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
4770 // CHECK6-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4771 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4772 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4773 // CHECK6-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4774 // CHECK6-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4775 // CHECK6-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4776 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4777 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4778 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4779 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4780 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4781 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4782 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4783 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4784 // CHECK6:       cond.true:
4785 // CHECK6-NEXT:    br label [[COND_END:%.*]]
4786 // CHECK6:       cond.false:
4787 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4788 // CHECK6-NEXT:    br label [[COND_END]]
4789 // CHECK6:       cond.end:
4790 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4791 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4792 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4793 // CHECK6-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4794 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4795 // CHECK6:       omp.inner.for.cond:
4796 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
4797 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21
4798 // CHECK6-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4799 // CHECK6-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4800 // CHECK6:       omp.inner.for.body:
4801 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
4802 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4803 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4804 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21
4805 // CHECK6-NEXT:    invoke void @_Z3foov()
4806 // CHECK6-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !21
4807 // CHECK6:       invoke.cont:
4808 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4809 // CHECK6:       omp.body.continue:
4810 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4811 // CHECK6:       omp.inner.for.inc:
4812 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
4813 // CHECK6-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4814 // CHECK6-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
4815 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
4816 // CHECK6:       omp.inner.for.end:
4817 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4818 // CHECK6:       omp.loop.exit:
4819 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4820 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4821 // CHECK6-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4822 // CHECK6-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4823 // CHECK6:       .omp.final.then:
4824 // CHECK6-NEXT:    store i32 100, i32* [[I]], align 4
4825 // CHECK6-NEXT:    br label [[DOTOMP_FINAL_DONE]]
4826 // CHECK6:       .omp.final.done:
4827 // CHECK6-NEXT:    ret void
4828 // CHECK6:       terminate.lpad:
4829 // CHECK6-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
4830 // CHECK6-NEXT:    catch i8* null
4831 // CHECK6-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
4832 // CHECK6-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !21
4833 // CHECK6-NEXT:    unreachable
4834 //
4835 //
4836 // CHECK6-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv
4837 // CHECK6-SAME: () #[[ATTR7:[0-9]+]] comdat {
4838 // CHECK6-NEXT:  entry:
4839 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4840 // CHECK6-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
4841 // CHECK6-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
4842 // CHECK6-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
4843 // CHECK6-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
4844 // CHECK6-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4845 // CHECK6:       omp_offload.failed:
4846 // CHECK6-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR6]]
4847 // CHECK6-NEXT:    br label [[OMP_OFFLOAD_CONT]]
4848 // CHECK6:       omp_offload.cont:
4849 // CHECK6-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
4850 // CHECK6-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
4851 // CHECK6-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
4852 // CHECK6-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
4853 // CHECK6:       omp_offload.failed2:
4854 // CHECK6-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR6]]
4855 // CHECK6-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
4856 // CHECK6:       omp_offload.cont3:
4857 // CHECK6-NEXT:    ret i32 0
4858 //
4859 //
4860 // CHECK6-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv
4861 // CHECK6-SAME: () #[[ATTR7]] comdat {
4862 // CHECK6-NEXT:  entry:
4863 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4864 // CHECK6-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
4865 // CHECK6-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
4866 // CHECK6-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
4867 // CHECK6-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
4868 // CHECK6-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4869 // CHECK6:       omp_offload.failed:
4870 // CHECK6-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR6]]
4871 // CHECK6-NEXT:    br label [[OMP_OFFLOAD_CONT]]
4872 // CHECK6:       omp_offload.cont:
4873 // CHECK6-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
4874 // CHECK6-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
4875 // CHECK6-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
4876 // CHECK6-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
4877 // CHECK6:       omp_offload.failed2:
4878 // CHECK6-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR6]]
4879 // CHECK6-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
4880 // CHECK6:       omp_offload.cont3:
4881 // CHECK6-NEXT:    ret i32 0
4882 //
4883 //
4884 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SD1Ev
4885 // CHECK6-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 {
4886 // CHECK6-NEXT:  entry:
4887 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4888 // CHECK6-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4889 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4890 // CHECK6-NEXT:    call void @_ZN1SD2Ev(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR6]]
4891 // CHECK6-NEXT:    ret void
4892 //
4893 //
4894 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SC2El
4895 // CHECK6-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
4896 // CHECK6-NEXT:  entry:
4897 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4898 // CHECK6-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
4899 // CHECK6-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4900 // CHECK6-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
4901 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4902 // CHECK6-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
4903 // CHECK6-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
4904 // CHECK6-NEXT:    store i64 [[TMP0]], i64* [[A2]], align 8
4905 // CHECK6-NEXT:    ret void
4906 //
4907 //
4908 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52
4909 // CHECK6-SAME: () #[[ATTR3]] {
4910 // CHECK6-NEXT:  entry:
4911 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
4912 // CHECK6-NEXT:    ret void
4913 //
4914 //
4915 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..4
4916 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
4917 // CHECK6-NEXT:  entry:
4918 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4919 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4920 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4921 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4922 // CHECK6-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4923 // CHECK6-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4924 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4925 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4926 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
4927 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4928 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4929 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4930 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4931 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4932 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4933 // CHECK6-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4934 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4935 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4936 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4937 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4938 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4939 // CHECK6:       cond.true:
4940 // CHECK6-NEXT:    br label [[COND_END:%.*]]
4941 // CHECK6:       cond.false:
4942 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4943 // CHECK6-NEXT:    br label [[COND_END]]
4944 // CHECK6:       cond.end:
4945 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4946 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4947 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4948 // CHECK6-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4949 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4950 // CHECK6:       omp.inner.for.cond:
4951 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
4952 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !24
4953 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4954 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4955 // CHECK6:       omp.inner.for.body:
4956 // CHECK6-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5), !llvm.access.group !24
4957 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !24
4958 // CHECK6-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4959 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !24
4960 // CHECK6-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4961 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !24
4962 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4963 // CHECK6:       omp.inner.for.inc:
4964 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
4965 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !24
4966 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
4967 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
4968 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
4969 // CHECK6:       omp.inner.for.end:
4970 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4971 // CHECK6:       omp.loop.exit:
4972 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4973 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4974 // CHECK6-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
4975 // CHECK6-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4976 // CHECK6:       .omp.final.then:
4977 // CHECK6-NEXT:    store i32 100, i32* [[I]], align 4
4978 // CHECK6-NEXT:    br label [[DOTOMP_FINAL_DONE]]
4979 // CHECK6:       .omp.final.done:
4980 // CHECK6-NEXT:    ret void
4981 //
4982 //
4983 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..5
4984 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
4985 // CHECK6-NEXT:  entry:
4986 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4987 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4988 // CHECK6-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4989 // CHECK6-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4990 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4991 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4992 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4993 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4994 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4995 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4996 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
4997 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4998 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4999 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5000 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5001 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5002 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
5003 // CHECK6-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5004 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5005 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5006 // CHECK6-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5007 // CHECK6-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5008 // CHECK6-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5009 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5010 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5011 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5012 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5013 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5014 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5015 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5016 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5017 // CHECK6:       cond.true:
5018 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5019 // CHECK6:       cond.false:
5020 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5021 // CHECK6-NEXT:    br label [[COND_END]]
5022 // CHECK6:       cond.end:
5023 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5024 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5025 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5026 // CHECK6-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5027 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5028 // CHECK6:       omp.inner.for.cond:
5029 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
5030 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !27
5031 // CHECK6-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5032 // CHECK6-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5033 // CHECK6:       omp.inner.for.body:
5034 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
5035 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5036 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5037 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !27
5038 // CHECK6-NEXT:    invoke void @_Z3foov()
5039 // CHECK6-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !27
5040 // CHECK6:       invoke.cont:
5041 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5042 // CHECK6:       omp.body.continue:
5043 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5044 // CHECK6:       omp.inner.for.inc:
5045 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
5046 // CHECK6-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5047 // CHECK6-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
5048 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]
5049 // CHECK6:       omp.inner.for.end:
5050 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5051 // CHECK6:       omp.loop.exit:
5052 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5053 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5054 // CHECK6-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5055 // CHECK6-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5056 // CHECK6:       .omp.final.then:
5057 // CHECK6-NEXT:    store i32 100, i32* [[I]], align 4
5058 // CHECK6-NEXT:    br label [[DOTOMP_FINAL_DONE]]
5059 // CHECK6:       .omp.final.done:
5060 // CHECK6-NEXT:    ret void
5061 // CHECK6:       terminate.lpad:
5062 // CHECK6-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
5063 // CHECK6-NEXT:    catch i8* null
5064 // CHECK6-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
5065 // CHECK6-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !27
5066 // CHECK6-NEXT:    unreachable
5067 //
5068 //
5069 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57
5070 // CHECK6-SAME: () #[[ATTR3]] {
5071 // CHECK6-NEXT:  entry:
5072 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
5073 // CHECK6-NEXT:    ret void
5074 //
5075 //
5076 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..6
5077 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
5078 // CHECK6-NEXT:  entry:
5079 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5080 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5081 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5082 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5083 // CHECK6-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5084 // CHECK6-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5085 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5086 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5087 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5088 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5089 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5090 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5091 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5092 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5093 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5094 // CHECK6-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5095 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5096 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5097 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5098 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5099 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5100 // CHECK6:       cond.true:
5101 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5102 // CHECK6:       cond.false:
5103 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5104 // CHECK6-NEXT:    br label [[COND_END]]
5105 // CHECK6:       cond.end:
5106 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5107 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5108 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5109 // CHECK6-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5110 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5111 // CHECK6:       omp.inner.for.cond:
5112 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30
5113 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !30
5114 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5115 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5116 // CHECK6:       omp.inner.for.body:
5117 // CHECK6-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23), !llvm.access.group !30
5118 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !30
5119 // CHECK6-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5120 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !30
5121 // CHECK6-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5122 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !30
5123 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5124 // CHECK6:       omp.inner.for.inc:
5125 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30
5126 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !30
5127 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
5128 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30
5129 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]
5130 // CHECK6:       omp.inner.for.end:
5131 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5132 // CHECK6:       omp.loop.exit:
5133 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5134 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5135 // CHECK6-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
5136 // CHECK6-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5137 // CHECK6:       .omp.final.then:
5138 // CHECK6-NEXT:    store i32 100, i32* [[I]], align 4
5139 // CHECK6-NEXT:    br label [[DOTOMP_FINAL_DONE]]
5140 // CHECK6:       .omp.final.done:
5141 // CHECK6-NEXT:    ret void
5142 //
5143 //
5144 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..7
5145 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
5146 // CHECK6-NEXT:  entry:
5147 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5148 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5149 // CHECK6-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5150 // CHECK6-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5151 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5152 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5153 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5154 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5155 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5156 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5157 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5158 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5159 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5160 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5161 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5162 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5163 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
5164 // CHECK6-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5165 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5166 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5167 // CHECK6-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5168 // CHECK6-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5169 // CHECK6-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5170 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5171 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5172 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5173 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5174 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5175 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5176 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5177 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5178 // CHECK6:       cond.true:
5179 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5180 // CHECK6:       cond.false:
5181 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5182 // CHECK6-NEXT:    br label [[COND_END]]
5183 // CHECK6:       cond.end:
5184 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5185 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5186 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5187 // CHECK6-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5188 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5189 // CHECK6:       omp.inner.for.cond:
5190 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
5191 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !33
5192 // CHECK6-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5193 // CHECK6-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5194 // CHECK6:       omp.inner.for.body:
5195 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
5196 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5197 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5198 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !33
5199 // CHECK6-NEXT:    invoke void @_Z3foov()
5200 // CHECK6-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !33
5201 // CHECK6:       invoke.cont:
5202 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5203 // CHECK6:       omp.body.continue:
5204 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5205 // CHECK6:       omp.inner.for.inc:
5206 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
5207 // CHECK6-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5208 // CHECK6-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
5209 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
5210 // CHECK6:       omp.inner.for.end:
5211 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5212 // CHECK6:       omp.loop.exit:
5213 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5214 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5215 // CHECK6-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5216 // CHECK6-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5217 // CHECK6:       .omp.final.then:
5218 // CHECK6-NEXT:    store i32 100, i32* [[I]], align 4
5219 // CHECK6-NEXT:    br label [[DOTOMP_FINAL_DONE]]
5220 // CHECK6:       .omp.final.done:
5221 // CHECK6-NEXT:    ret void
5222 // CHECK6:       terminate.lpad:
5223 // CHECK6-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
5224 // CHECK6-NEXT:    catch i8* null
5225 // CHECK6-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
5226 // CHECK6-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !33
5227 // CHECK6-NEXT:    unreachable
5228 //
5229 //
5230 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52
5231 // CHECK6-SAME: () #[[ATTR3]] {
5232 // CHECK6-NEXT:  entry:
5233 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*))
5234 // CHECK6-NEXT:    ret void
5235 //
5236 //
5237 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..8
5238 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
5239 // CHECK6-NEXT:  entry:
5240 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5241 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5242 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5243 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5244 // CHECK6-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5245 // CHECK6-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5246 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5247 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5248 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5249 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5250 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5251 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5252 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5253 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5254 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5255 // CHECK6-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5256 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5257 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5258 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5259 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5260 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5261 // CHECK6:       cond.true:
5262 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5263 // CHECK6:       cond.false:
5264 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5265 // CHECK6-NEXT:    br label [[COND_END]]
5266 // CHECK6:       cond.end:
5267 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5268 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5269 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5270 // CHECK6-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5271 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5272 // CHECK6:       omp.inner.for.cond:
5273 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36
5274 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !36
5275 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5276 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5277 // CHECK6:       omp.inner.for.body:
5278 // CHECK6-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1), !llvm.access.group !36
5279 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !36
5280 // CHECK6-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5281 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !36
5282 // CHECK6-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5283 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !36
5284 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5285 // CHECK6:       omp.inner.for.inc:
5286 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36
5287 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !36
5288 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
5289 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36
5290 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]]
5291 // CHECK6:       omp.inner.for.end:
5292 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5293 // CHECK6:       omp.loop.exit:
5294 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5295 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5296 // CHECK6-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
5297 // CHECK6-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5298 // CHECK6:       .omp.final.then:
5299 // CHECK6-NEXT:    store i32 100, i32* [[I]], align 4
5300 // CHECK6-NEXT:    br label [[DOTOMP_FINAL_DONE]]
5301 // CHECK6:       .omp.final.done:
5302 // CHECK6-NEXT:    ret void
5303 //
5304 //
5305 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..9
5306 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
5307 // CHECK6-NEXT:  entry:
5308 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5309 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5310 // CHECK6-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5311 // CHECK6-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5312 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5313 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5314 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5315 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5316 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5317 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5318 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5319 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5320 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5321 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5322 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5323 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5324 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
5325 // CHECK6-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5326 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5327 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5328 // CHECK6-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5329 // CHECK6-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5330 // CHECK6-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5331 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5332 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5333 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5334 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5335 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5336 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5337 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5338 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5339 // CHECK6:       cond.true:
5340 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5341 // CHECK6:       cond.false:
5342 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5343 // CHECK6-NEXT:    br label [[COND_END]]
5344 // CHECK6:       cond.end:
5345 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5346 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5347 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5348 // CHECK6-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5349 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5350 // CHECK6:       omp.inner.for.cond:
5351 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
5352 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !39
5353 // CHECK6-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5354 // CHECK6-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5355 // CHECK6:       omp.inner.for.body:
5356 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
5357 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5358 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5359 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !39
5360 // CHECK6-NEXT:    invoke void @_Z3foov()
5361 // CHECK6-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !39
5362 // CHECK6:       invoke.cont:
5363 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5364 // CHECK6:       omp.body.continue:
5365 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5366 // CHECK6:       omp.inner.for.inc:
5367 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
5368 // CHECK6-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5369 // CHECK6-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
5370 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
5371 // CHECK6:       omp.inner.for.end:
5372 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5373 // CHECK6:       omp.loop.exit:
5374 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5375 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5376 // CHECK6-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5377 // CHECK6-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5378 // CHECK6:       .omp.final.then:
5379 // CHECK6-NEXT:    store i32 100, i32* [[I]], align 4
5380 // CHECK6-NEXT:    br label [[DOTOMP_FINAL_DONE]]
5381 // CHECK6:       .omp.final.done:
5382 // CHECK6-NEXT:    ret void
5383 // CHECK6:       terminate.lpad:
5384 // CHECK6-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
5385 // CHECK6-NEXT:    catch i8* null
5386 // CHECK6-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
5387 // CHECK6-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !39
5388 // CHECK6-NEXT:    unreachable
5389 //
5390 //
5391 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57
5392 // CHECK6-SAME: () #[[ATTR3]] {
5393 // CHECK6-NEXT:  entry:
5394 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
5395 // CHECK6-NEXT:    ret void
5396 //
5397 //
5398 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..10
5399 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
5400 // CHECK6-NEXT:  entry:
5401 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5402 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5403 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5404 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5405 // CHECK6-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5406 // CHECK6-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5407 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5408 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5409 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5410 // CHECK6-NEXT:    [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8
5411 // CHECK6-NEXT:    [[EXN_SLOT:%.*]] = alloca i8*, align 8
5412 // CHECK6-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
5413 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5414 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5415 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5416 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5417 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5418 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5419 // CHECK6-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5420 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5421 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5422 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5423 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5424 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5425 // CHECK6:       cond.true:
5426 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5427 // CHECK6:       cond.false:
5428 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5429 // CHECK6-NEXT:    br label [[COND_END]]
5430 // CHECK6:       cond.end:
5431 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5432 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5433 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5434 // CHECK6-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5435 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5436 // CHECK6:       omp.inner.for.cond:
5437 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !42
5438 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !42
5439 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5440 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5441 // CHECK6:       omp.inner.for.body:
5442 // CHECK6-NEXT:    invoke void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 23)
5443 // CHECK6-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !42
5444 // CHECK6:       invoke.cont:
5445 // CHECK6-NEXT:    [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]])
5446 // CHECK6-NEXT:    to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD:%.*]], !llvm.access.group !42
5447 // CHECK6:       invoke.cont2:
5448 // CHECK6-NEXT:    [[TMP7:%.*]] = sext i8 [[CALL]] to i32
5449 // CHECK6-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]]), !llvm.access.group !42
5450 // CHECK6-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]], !llvm.access.group !42
5451 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !42
5452 // CHECK6-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
5453 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !42
5454 // CHECK6-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
5455 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]), !llvm.access.group !42
5456 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5457 // CHECK6:       omp.inner.for.inc:
5458 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !42
5459 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !42
5460 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
5461 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !42
5462 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP43:![0-9]+]]
5463 // CHECK6:       lpad:
5464 // CHECK6-NEXT:    [[TMP14:%.*]] = landingpad { i8*, i32 }
5465 // CHECK6-NEXT:    catch i8* null
5466 // CHECK6-NEXT:    [[TMP15:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 0
5467 // CHECK6-NEXT:    store i8* [[TMP15]], i8** [[EXN_SLOT]], align 8, !llvm.access.group !42
5468 // CHECK6-NEXT:    [[TMP16:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 1
5469 // CHECK6-NEXT:    store i32 [[TMP16]], i32* [[EHSELECTOR_SLOT]], align 4, !llvm.access.group !42
5470 // CHECK6-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]], !llvm.access.group !42
5471 // CHECK6-NEXT:    br label [[TERMINATE_HANDLER:%.*]]
5472 // CHECK6:       omp.inner.for.end:
5473 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5474 // CHECK6:       omp.loop.exit:
5475 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5476 // CHECK6-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5477 // CHECK6-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
5478 // CHECK6-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5479 // CHECK6:       .omp.final.then:
5480 // CHECK6-NEXT:    store i32 100, i32* [[I]], align 4
5481 // CHECK6-NEXT:    br label [[DOTOMP_FINAL_DONE]]
5482 // CHECK6:       .omp.final.done:
5483 // CHECK6-NEXT:    ret void
5484 // CHECK6:       terminate.lpad:
5485 // CHECK6-NEXT:    [[TMP19:%.*]] = landingpad { i8*, i32 }
5486 // CHECK6-NEXT:    catch i8* null
5487 // CHECK6-NEXT:    [[TMP20:%.*]] = extractvalue { i8*, i32 } [[TMP19]], 0
5488 // CHECK6-NEXT:    call void @__clang_call_terminate(i8* [[TMP20]]) #[[ATTR10]], !llvm.access.group !42
5489 // CHECK6-NEXT:    unreachable
5490 // CHECK6:       terminate.handler:
5491 // CHECK6-NEXT:    [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8, !llvm.access.group !42
5492 // CHECK6-NEXT:    call void @__clang_call_terminate(i8* [[EXN]]) #[[ATTR10]], !llvm.access.group !42
5493 // CHECK6-NEXT:    unreachable
5494 //
5495 //
5496 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..11
5497 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
5498 // CHECK6-NEXT:  entry:
5499 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5500 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5501 // CHECK6-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5502 // CHECK6-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5503 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5504 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5505 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5506 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5507 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5508 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5509 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5510 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5511 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5512 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5513 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5514 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5515 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
5516 // CHECK6-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5517 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5518 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5519 // CHECK6-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5520 // CHECK6-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5521 // CHECK6-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5522 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5523 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5524 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5525 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5526 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5527 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5528 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5529 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5530 // CHECK6:       cond.true:
5531 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5532 // CHECK6:       cond.false:
5533 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5534 // CHECK6-NEXT:    br label [[COND_END]]
5535 // CHECK6:       cond.end:
5536 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5537 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5538 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5539 // CHECK6-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5540 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5541 // CHECK6:       omp.inner.for.cond:
5542 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !45
5543 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !45
5544 // CHECK6-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5545 // CHECK6-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5546 // CHECK6:       omp.inner.for.body:
5547 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !45
5548 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5549 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5550 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !45
5551 // CHECK6-NEXT:    invoke void @_Z3foov()
5552 // CHECK6-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !45
5553 // CHECK6:       invoke.cont:
5554 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5555 // CHECK6:       omp.body.continue:
5556 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5557 // CHECK6:       omp.inner.for.inc:
5558 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !45
5559 // CHECK6-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5560 // CHECK6-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !45
5561 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP46:![0-9]+]]
5562 // CHECK6:       omp.inner.for.end:
5563 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5564 // CHECK6:       omp.loop.exit:
5565 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5566 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5567 // CHECK6-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5568 // CHECK6-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5569 // CHECK6:       .omp.final.then:
5570 // CHECK6-NEXT:    store i32 100, i32* [[I]], align 4
5571 // CHECK6-NEXT:    br label [[DOTOMP_FINAL_DONE]]
5572 // CHECK6:       .omp.final.done:
5573 // CHECK6-NEXT:    ret void
5574 // CHECK6:       terminate.lpad:
5575 // CHECK6-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
5576 // CHECK6-NEXT:    catch i8* null
5577 // CHECK6-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
5578 // CHECK6-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !45
5579 // CHECK6-NEXT:    unreachable
5580 //
5581 //
5582 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SD2Ev
5583 // CHECK6-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
5584 // CHECK6-NEXT:  entry:
5585 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
5586 // CHECK6-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
5587 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
5588 // CHECK6-NEXT:    ret void
5589 //
5590 //
5591 // CHECK6-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
5592 // CHECK6-SAME: () #[[ATTR9:[0-9]+]] {
5593 // CHECK6-NEXT:  entry:
5594 // CHECK6-NEXT:    call void @__tgt_register_requires(i64 1)
5595 // CHECK6-NEXT:    ret void
5596 //
5597 //
5598 // CHECK7-LABEL: define {{[^@]+}}@main
5599 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
5600 // CHECK7-NEXT:  entry:
5601 // CHECK7-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
5602 // CHECK7-NEXT:    [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
5603 // CHECK7-NEXT:    [[A:%.*]] = alloca i8, align 1
5604 // CHECK7-NEXT:    [[EXN_SLOT:%.*]] = alloca i8*, align 8
5605 // CHECK7-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
5606 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5607 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5608 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5609 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5610 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
5611 // CHECK7-NEXT:    [[_TMP3:%.*]] = alloca i32, align 4
5612 // CHECK7-NEXT:    [[DOTOMP_LB4:%.*]] = alloca i32, align 4
5613 // CHECK7-NEXT:    [[DOTOMP_UB5:%.*]] = alloca i32, align 4
5614 // CHECK7-NEXT:    [[DOTOMP_IV6:%.*]] = alloca i32, align 4
5615 // CHECK7-NEXT:    [[I7:%.*]] = alloca i32, align 4
5616 // CHECK7-NEXT:    store i32 0, i32* [[RETVAL]], align 4
5617 // CHECK7-NEXT:    call void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[S]], i64 0)
5618 // CHECK7-NEXT:    [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[S]])
5619 // CHECK7-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
5620 // CHECK7:       invoke.cont:
5621 // CHECK7-NEXT:    store i8 [[CALL]], i8* [[A]], align 1
5622 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5623 // CHECK7-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
5624 // CHECK7-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5625 // CHECK7-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
5626 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5627 // CHECK7:       omp.inner.for.cond:
5628 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
5629 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
5630 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
5631 // CHECK7-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5632 // CHECK7:       omp.inner.for.body:
5633 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
5634 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
5635 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5636 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
5637 // CHECK7-NEXT:    invoke void @_Z3foov()
5638 // CHECK7-NEXT:    to label [[INVOKE_CONT1:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !2
5639 // CHECK7:       invoke.cont1:
5640 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5641 // CHECK7:       omp.body.continue:
5642 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5643 // CHECK7:       omp.inner.for.inc:
5644 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
5645 // CHECK7-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP4]], 1
5646 // CHECK7-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
5647 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
5648 // CHECK7:       lpad:
5649 // CHECK7-NEXT:    [[TMP5:%.*]] = landingpad { i8*, i32 }
5650 // CHECK7-NEXT:    cleanup
5651 // CHECK7-NEXT:    [[TMP6:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 0
5652 // CHECK7-NEXT:    store i8* [[TMP6]], i8** [[EXN_SLOT]], align 8
5653 // CHECK7-NEXT:    [[TMP7:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 1
5654 // CHECK7-NEXT:    store i32 [[TMP7]], i32* [[EHSELECTOR_SLOT]], align 4
5655 // CHECK7-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR7:[0-9]+]]
5656 // CHECK7-NEXT:    br label [[EH_RESUME:%.*]]
5657 // CHECK7:       omp.inner.for.end:
5658 // CHECK7-NEXT:    store i32 100, i32* [[I]], align 4
5659 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_LB4]], align 4
5660 // CHECK7-NEXT:    store i32 99, i32* [[DOTOMP_UB5]], align 4
5661 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB4]], align 4
5662 // CHECK7-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV6]], align 4
5663 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND8:%.*]]
5664 // CHECK7:       omp.inner.for.cond8:
5665 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
5666 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB5]], align 4, !llvm.access.group !6
5667 // CHECK7-NEXT:    [[CMP9:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
5668 // CHECK7-NEXT:    br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END17:%.*]]
5669 // CHECK7:       omp.inner.for.body10:
5670 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
5671 // CHECK7-NEXT:    [[MUL11:%.*]] = mul nsw i32 [[TMP11]], 1
5672 // CHECK7-NEXT:    [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
5673 // CHECK7-NEXT:    store i32 [[ADD12]], i32* [[I7]], align 4, !llvm.access.group !6
5674 // CHECK7-NEXT:    invoke void @_Z3foov()
5675 // CHECK7-NEXT:    to label [[INVOKE_CONT13:%.*]] unwind label [[TERMINATE_LPAD]], !llvm.access.group !6
5676 // CHECK7:       invoke.cont13:
5677 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE14:%.*]]
5678 // CHECK7:       omp.body.continue14:
5679 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC15:%.*]]
5680 // CHECK7:       omp.inner.for.inc15:
5681 // CHECK7-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
5682 // CHECK7-NEXT:    [[ADD16:%.*]] = add nsw i32 [[TMP12]], 1
5683 // CHECK7-NEXT:    store i32 [[ADD16]], i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
5684 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP7:![0-9]+]]
5685 // CHECK7:       omp.inner.for.end17:
5686 // CHECK7-NEXT:    store i32 100, i32* [[I7]], align 4
5687 // CHECK7-NEXT:    [[TMP13:%.*]] = load i8, i8* [[A]], align 1
5688 // CHECK7-NEXT:    [[CONV:%.*]] = sext i8 [[TMP13]] to i32
5689 // CHECK7-NEXT:    [[CALL19:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv()
5690 // CHECK7-NEXT:    to label [[INVOKE_CONT18:%.*]] unwind label [[LPAD]]
5691 // CHECK7:       invoke.cont18:
5692 // CHECK7-NEXT:    [[ADD20:%.*]] = add nsw i32 [[CONV]], [[CALL19]]
5693 // CHECK7-NEXT:    [[CALL22:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv()
5694 // CHECK7-NEXT:    to label [[INVOKE_CONT21:%.*]] unwind label [[LPAD]]
5695 // CHECK7:       invoke.cont21:
5696 // CHECK7-NEXT:    [[ADD23:%.*]] = add nsw i32 [[ADD20]], [[CALL22]]
5697 // CHECK7-NEXT:    store i32 [[ADD23]], i32* [[RETVAL]], align 4
5698 // CHECK7-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR7]]
5699 // CHECK7-NEXT:    [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4
5700 // CHECK7-NEXT:    ret i32 [[TMP14]]
5701 // CHECK7:       eh.resume:
5702 // CHECK7-NEXT:    [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8
5703 // CHECK7-NEXT:    [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
5704 // CHECK7-NEXT:    [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
5705 // CHECK7-NEXT:    [[LPAD_VAL24:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
5706 // CHECK7-NEXT:    resume { i8*, i32 } [[LPAD_VAL24]]
5707 // CHECK7:       terminate.lpad:
5708 // CHECK7-NEXT:    [[TMP15:%.*]] = landingpad { i8*, i32 }
5709 // CHECK7-NEXT:    catch i8* null
5710 // CHECK7-NEXT:    [[TMP16:%.*]] = extractvalue { i8*, i32 } [[TMP15]], 0
5711 // CHECK7-NEXT:    call void @__clang_call_terminate(i8* [[TMP16]]) #[[ATTR8:[0-9]+]], !llvm.access.group !2
5712 // CHECK7-NEXT:    unreachable
5713 //
5714 //
5715 // CHECK7-LABEL: define {{[^@]+}}@_ZN1SC1El
5716 // CHECK7-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
5717 // CHECK7-NEXT:  entry:
5718 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
5719 // CHECK7-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
5720 // CHECK7-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
5721 // CHECK7-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
5722 // CHECK7-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
5723 // CHECK7-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
5724 // CHECK7-NEXT:    call void @_ZN1SC2El(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]], i64 [[TMP0]])
5725 // CHECK7-NEXT:    ret void
5726 //
5727 //
5728 // CHECK7-LABEL: define {{[^@]+}}@_ZN1ScvcEv
5729 // CHECK7-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 {
5730 // CHECK7-NEXT:  entry:
5731 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
5732 // CHECK7-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
5733 // CHECK7-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
5734 // CHECK7-NEXT:    call void @_Z8mayThrowv()
5735 // CHECK7-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
5736 // CHECK7-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A]], align 8
5737 // CHECK7-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i8
5738 // CHECK7-NEXT:    ret i8 [[CONV]]
5739 //
5740 //
5741 // CHECK7-LABEL: define {{[^@]+}}@__clang_call_terminate
5742 // CHECK7-SAME: (i8* [[TMP0:%.*]]) #[[ATTR4:[0-9]+]] comdat {
5743 // CHECK7-NEXT:    [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR7]]
5744 // CHECK7-NEXT:    call void @_ZSt9terminatev() #[[ATTR8]]
5745 // CHECK7-NEXT:    unreachable
5746 //
5747 //
5748 // CHECK7-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv
5749 // CHECK7-SAME: () #[[ATTR5:[0-9]+]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
5750 // CHECK7-NEXT:  entry:
5751 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5752 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5753 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5754 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5755 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
5756 // CHECK7-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
5757 // CHECK7-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
5758 // CHECK7-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
5759 // CHECK7-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
5760 // CHECK7-NEXT:    [[I6:%.*]] = alloca i32, align 4
5761 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5762 // CHECK7-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
5763 // CHECK7-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5764 // CHECK7-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
5765 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5766 // CHECK7:       omp.inner.for.cond:
5767 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
5768 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9
5769 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
5770 // CHECK7-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5771 // CHECK7:       omp.inner.for.body:
5772 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
5773 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
5774 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5775 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9
5776 // CHECK7-NEXT:    invoke void @_Z3foov()
5777 // CHECK7-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !9
5778 // CHECK7:       invoke.cont:
5779 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5780 // CHECK7:       omp.body.continue:
5781 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5782 // CHECK7:       omp.inner.for.inc:
5783 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
5784 // CHECK7-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
5785 // CHECK7-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
5786 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
5787 // CHECK7:       omp.inner.for.end:
5788 // CHECK7-NEXT:    store i32 100, i32* [[I]], align 4
5789 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_LB3]], align 4
5790 // CHECK7-NEXT:    store i32 99, i32* [[DOTOMP_UB4]], align 4
5791 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
5792 // CHECK7-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
5793 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
5794 // CHECK7:       omp.inner.for.cond7:
5795 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !12
5796 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !12
5797 // CHECK7-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5798 // CHECK7-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]]
5799 // CHECK7:       omp.inner.for.body9:
5800 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !12
5801 // CHECK7-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
5802 // CHECK7-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
5803 // CHECK7-NEXT:    store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !12
5804 // CHECK7-NEXT:    invoke void @_Z3foov()
5805 // CHECK7-NEXT:    to label [[INVOKE_CONT12:%.*]] unwind label [[TERMINATE_LPAD]], !llvm.access.group !12
5806 // CHECK7:       invoke.cont12:
5807 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE13:%.*]]
5808 // CHECK7:       omp.body.continue13:
5809 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC14:%.*]]
5810 // CHECK7:       omp.inner.for.inc14:
5811 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !12
5812 // CHECK7-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP9]], 1
5813 // CHECK7-NEXT:    store i32 [[ADD15]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !12
5814 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP13:![0-9]+]]
5815 // CHECK7:       omp.inner.for.end16:
5816 // CHECK7-NEXT:    store i32 100, i32* [[I6]], align 4
5817 // CHECK7-NEXT:    ret i32 0
5818 // CHECK7:       terminate.lpad:
5819 // CHECK7-NEXT:    [[TMP10:%.*]] = landingpad { i8*, i32 }
5820 // CHECK7-NEXT:    catch i8* null
5821 // CHECK7-NEXT:    [[TMP11:%.*]] = extractvalue { i8*, i32 } [[TMP10]], 0
5822 // CHECK7-NEXT:    call void @__clang_call_terminate(i8* [[TMP11]]) #[[ATTR8]], !llvm.access.group !9
5823 // CHECK7-NEXT:    unreachable
5824 //
5825 //
5826 // CHECK7-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv
5827 // CHECK7-SAME: () #[[ATTR5]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
5828 // CHECK7-NEXT:  entry:
5829 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5830 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5831 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5832 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5833 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
5834 // CHECK7-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
5835 // CHECK7-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
5836 // CHECK7-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
5837 // CHECK7-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
5838 // CHECK7-NEXT:    [[I6:%.*]] = alloca i32, align 4
5839 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5840 // CHECK7-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
5841 // CHECK7-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5842 // CHECK7-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
5843 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5844 // CHECK7:       omp.inner.for.cond:
5845 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
5846 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15
5847 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
5848 // CHECK7-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5849 // CHECK7:       omp.inner.for.body:
5850 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
5851 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
5852 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5853 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !15
5854 // CHECK7-NEXT:    invoke void @_Z3foov()
5855 // CHECK7-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !15
5856 // CHECK7:       invoke.cont:
5857 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5858 // CHECK7:       omp.body.continue:
5859 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5860 // CHECK7:       omp.inner.for.inc:
5861 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
5862 // CHECK7-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
5863 // CHECK7-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
5864 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
5865 // CHECK7:       omp.inner.for.end:
5866 // CHECK7-NEXT:    store i32 100, i32* [[I]], align 4
5867 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_LB3]], align 4
5868 // CHECK7-NEXT:    store i32 99, i32* [[DOTOMP_UB4]], align 4
5869 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
5870 // CHECK7-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
5871 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
5872 // CHECK7:       omp.inner.for.cond7:
5873 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !18
5874 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !18
5875 // CHECK7-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5876 // CHECK7-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]]
5877 // CHECK7:       omp.inner.for.body9:
5878 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !18
5879 // CHECK7-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
5880 // CHECK7-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
5881 // CHECK7-NEXT:    store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !18
5882 // CHECK7-NEXT:    invoke void @_Z3foov()
5883 // CHECK7-NEXT:    to label [[INVOKE_CONT12:%.*]] unwind label [[TERMINATE_LPAD]], !llvm.access.group !18
5884 // CHECK7:       invoke.cont12:
5885 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE13:%.*]]
5886 // CHECK7:       omp.body.continue13:
5887 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC14:%.*]]
5888 // CHECK7:       omp.inner.for.inc14:
5889 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !18
5890 // CHECK7-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP9]], 1
5891 // CHECK7-NEXT:    store i32 [[ADD15]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !18
5892 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP19:![0-9]+]]
5893 // CHECK7:       omp.inner.for.end16:
5894 // CHECK7-NEXT:    store i32 100, i32* [[I6]], align 4
5895 // CHECK7-NEXT:    ret i32 0
5896 // CHECK7:       terminate.lpad:
5897 // CHECK7-NEXT:    [[TMP10:%.*]] = landingpad { i8*, i32 }
5898 // CHECK7-NEXT:    catch i8* null
5899 // CHECK7-NEXT:    [[TMP11:%.*]] = extractvalue { i8*, i32 } [[TMP10]], 0
5900 // CHECK7-NEXT:    call void @__clang_call_terminate(i8* [[TMP11]]) #[[ATTR8]], !llvm.access.group !15
5901 // CHECK7-NEXT:    unreachable
5902 //
5903 //
5904 // CHECK7-LABEL: define {{[^@]+}}@_ZN1SD1Ev
5905 // CHECK7-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6:[0-9]+]] comdat align 2 {
5906 // CHECK7-NEXT:  entry:
5907 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
5908 // CHECK7-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
5909 // CHECK7-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
5910 // CHECK7-NEXT:    call void @_ZN1SD2Ev(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR7]]
5911 // CHECK7-NEXT:    ret void
5912 //
5913 //
5914 // CHECK7-LABEL: define {{[^@]+}}@_ZN1SC2El
5915 // CHECK7-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
5916 // CHECK7-NEXT:  entry:
5917 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
5918 // CHECK7-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
5919 // CHECK7-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
5920 // CHECK7-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
5921 // CHECK7-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
5922 // CHECK7-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
5923 // CHECK7-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
5924 // CHECK7-NEXT:    store i64 [[TMP0]], i64* [[A2]], align 8
5925 // CHECK7-NEXT:    ret void
5926 //
5927 //
5928 // CHECK7-LABEL: define {{[^@]+}}@_ZN1SD2Ev
5929 // CHECK7-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
5930 // CHECK7-NEXT:  entry:
5931 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
5932 // CHECK7-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
5933 // CHECK7-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
5934 // CHECK7-NEXT:    ret void
5935 //
5936 //
5937 // CHECK8-LABEL: define {{[^@]+}}@main
5938 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
5939 // CHECK8-NEXT:  entry:
5940 // CHECK8-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
5941 // CHECK8-NEXT:    [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
5942 // CHECK8-NEXT:    [[A:%.*]] = alloca i8, align 1
5943 // CHECK8-NEXT:    [[EXN_SLOT:%.*]] = alloca i8*, align 8
5944 // CHECK8-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
5945 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5946 // CHECK8-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5947 // CHECK8-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5948 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5949 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
5950 // CHECK8-NEXT:    [[_TMP3:%.*]] = alloca i32, align 4
5951 // CHECK8-NEXT:    [[DOTOMP_LB4:%.*]] = alloca i32, align 4
5952 // CHECK8-NEXT:    [[DOTOMP_UB5:%.*]] = alloca i32, align 4
5953 // CHECK8-NEXT:    [[DOTOMP_IV6:%.*]] = alloca i32, align 4
5954 // CHECK8-NEXT:    [[I7:%.*]] = alloca i32, align 4
5955 // CHECK8-NEXT:    store i32 0, i32* [[RETVAL]], align 4
5956 // CHECK8-NEXT:    call void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[S]], i64 0)
5957 // CHECK8-NEXT:    [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[S]])
5958 // CHECK8-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
5959 // CHECK8:       invoke.cont:
5960 // CHECK8-NEXT:    store i8 [[CALL]], i8* [[A]], align 1
5961 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5962 // CHECK8-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
5963 // CHECK8-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5964 // CHECK8-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
5965 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5966 // CHECK8:       omp.inner.for.cond:
5967 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
5968 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
5969 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
5970 // CHECK8-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5971 // CHECK8:       omp.inner.for.body:
5972 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
5973 // CHECK8-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
5974 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5975 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
5976 // CHECK8-NEXT:    invoke void @_Z3foov()
5977 // CHECK8-NEXT:    to label [[INVOKE_CONT1:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !2
5978 // CHECK8:       invoke.cont1:
5979 // CHECK8-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5980 // CHECK8:       omp.body.continue:
5981 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5982 // CHECK8:       omp.inner.for.inc:
5983 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
5984 // CHECK8-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP4]], 1
5985 // CHECK8-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
5986 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
5987 // CHECK8:       lpad:
5988 // CHECK8-NEXT:    [[TMP5:%.*]] = landingpad { i8*, i32 }
5989 // CHECK8-NEXT:    cleanup
5990 // CHECK8-NEXT:    [[TMP6:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 0
5991 // CHECK8-NEXT:    store i8* [[TMP6]], i8** [[EXN_SLOT]], align 8
5992 // CHECK8-NEXT:    [[TMP7:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 1
5993 // CHECK8-NEXT:    store i32 [[TMP7]], i32* [[EHSELECTOR_SLOT]], align 4
5994 // CHECK8-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR7:[0-9]+]]
5995 // CHECK8-NEXT:    br label [[EH_RESUME:%.*]]
5996 // CHECK8:       omp.inner.for.end:
5997 // CHECK8-NEXT:    store i32 100, i32* [[I]], align 4
5998 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_LB4]], align 4
5999 // CHECK8-NEXT:    store i32 99, i32* [[DOTOMP_UB5]], align 4
6000 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB4]], align 4
6001 // CHECK8-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV6]], align 4
6002 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND8:%.*]]
6003 // CHECK8:       omp.inner.for.cond8:
6004 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
6005 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB5]], align 4, !llvm.access.group !6
6006 // CHECK8-NEXT:    [[CMP9:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
6007 // CHECK8-NEXT:    br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END17:%.*]]
6008 // CHECK8:       omp.inner.for.body10:
6009 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
6010 // CHECK8-NEXT:    [[MUL11:%.*]] = mul nsw i32 [[TMP11]], 1
6011 // CHECK8-NEXT:    [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
6012 // CHECK8-NEXT:    store i32 [[ADD12]], i32* [[I7]], align 4, !llvm.access.group !6
6013 // CHECK8-NEXT:    invoke void @_Z3foov()
6014 // CHECK8-NEXT:    to label [[INVOKE_CONT13:%.*]] unwind label [[TERMINATE_LPAD]], !llvm.access.group !6
6015 // CHECK8:       invoke.cont13:
6016 // CHECK8-NEXT:    br label [[OMP_BODY_CONTINUE14:%.*]]
6017 // CHECK8:       omp.body.continue14:
6018 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC15:%.*]]
6019 // CHECK8:       omp.inner.for.inc15:
6020 // CHECK8-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
6021 // CHECK8-NEXT:    [[ADD16:%.*]] = add nsw i32 [[TMP12]], 1
6022 // CHECK8-NEXT:    store i32 [[ADD16]], i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
6023 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP7:![0-9]+]]
6024 // CHECK8:       omp.inner.for.end17:
6025 // CHECK8-NEXT:    store i32 100, i32* [[I7]], align 4
6026 // CHECK8-NEXT:    [[TMP13:%.*]] = load i8, i8* [[A]], align 1
6027 // CHECK8-NEXT:    [[CONV:%.*]] = sext i8 [[TMP13]] to i32
6028 // CHECK8-NEXT:    [[CALL19:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv()
6029 // CHECK8-NEXT:    to label [[INVOKE_CONT18:%.*]] unwind label [[LPAD]]
6030 // CHECK8:       invoke.cont18:
6031 // CHECK8-NEXT:    [[ADD20:%.*]] = add nsw i32 [[CONV]], [[CALL19]]
6032 // CHECK8-NEXT:    [[CALL22:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv()
6033 // CHECK8-NEXT:    to label [[INVOKE_CONT21:%.*]] unwind label [[LPAD]]
6034 // CHECK8:       invoke.cont21:
6035 // CHECK8-NEXT:    [[ADD23:%.*]] = add nsw i32 [[ADD20]], [[CALL22]]
6036 // CHECK8-NEXT:    store i32 [[ADD23]], i32* [[RETVAL]], align 4
6037 // CHECK8-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR7]]
6038 // CHECK8-NEXT:    [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4
6039 // CHECK8-NEXT:    ret i32 [[TMP14]]
6040 // CHECK8:       eh.resume:
6041 // CHECK8-NEXT:    [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8
6042 // CHECK8-NEXT:    [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
6043 // CHECK8-NEXT:    [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
6044 // CHECK8-NEXT:    [[LPAD_VAL24:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
6045 // CHECK8-NEXT:    resume { i8*, i32 } [[LPAD_VAL24]]
6046 // CHECK8:       terminate.lpad:
6047 // CHECK8-NEXT:    [[TMP15:%.*]] = landingpad { i8*, i32 }
6048 // CHECK8-NEXT:    catch i8* null
6049 // CHECK8-NEXT:    [[TMP16:%.*]] = extractvalue { i8*, i32 } [[TMP15]], 0
6050 // CHECK8-NEXT:    call void @__clang_call_terminate(i8* [[TMP16]]) #[[ATTR8:[0-9]+]], !llvm.access.group !2
6051 // CHECK8-NEXT:    unreachable
6052 //
6053 //
6054 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SC1El
6055 // CHECK8-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
6056 // CHECK8-NEXT:  entry:
6057 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
6058 // CHECK8-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
6059 // CHECK8-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
6060 // CHECK8-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
6061 // CHECK8-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
6062 // CHECK8-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
6063 // CHECK8-NEXT:    call void @_ZN1SC2El(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]], i64 [[TMP0]])
6064 // CHECK8-NEXT:    ret void
6065 //
6066 //
6067 // CHECK8-LABEL: define {{[^@]+}}@_ZN1ScvcEv
6068 // CHECK8-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 {
6069 // CHECK8-NEXT:  entry:
6070 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
6071 // CHECK8-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
6072 // CHECK8-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
6073 // CHECK8-NEXT:    call void @_Z8mayThrowv()
6074 // CHECK8-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
6075 // CHECK8-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A]], align 8
6076 // CHECK8-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i8
6077 // CHECK8-NEXT:    ret i8 [[CONV]]
6078 //
6079 //
6080 // CHECK8-LABEL: define {{[^@]+}}@__clang_call_terminate
6081 // CHECK8-SAME: (i8* [[TMP0:%.*]]) #[[ATTR4:[0-9]+]] comdat {
6082 // CHECK8-NEXT:    [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR7]]
6083 // CHECK8-NEXT:    call void @_ZSt9terminatev() #[[ATTR8]]
6084 // CHECK8-NEXT:    unreachable
6085 //
6086 //
6087 // CHECK8-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv
6088 // CHECK8-SAME: () #[[ATTR5:[0-9]+]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
6089 // CHECK8-NEXT:  entry:
6090 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6091 // CHECK8-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6092 // CHECK8-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6093 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6094 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
6095 // CHECK8-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
6096 // CHECK8-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
6097 // CHECK8-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
6098 // CHECK8-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
6099 // CHECK8-NEXT:    [[I6:%.*]] = alloca i32, align 4
6100 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6101 // CHECK8-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
6102 // CHECK8-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6103 // CHECK8-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
6104 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6105 // CHECK8:       omp.inner.for.cond:
6106 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
6107 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9
6108 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
6109 // CHECK8-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6110 // CHECK8:       omp.inner.for.body:
6111 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
6112 // CHECK8-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
6113 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6114 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9
6115 // CHECK8-NEXT:    invoke void @_Z3foov()
6116 // CHECK8-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !9
6117 // CHECK8:       invoke.cont:
6118 // CHECK8-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6119 // CHECK8:       omp.body.continue:
6120 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6121 // CHECK8:       omp.inner.for.inc:
6122 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
6123 // CHECK8-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
6124 // CHECK8-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
6125 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
6126 // CHECK8:       omp.inner.for.end:
6127 // CHECK8-NEXT:    store i32 100, i32* [[I]], align 4
6128 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_LB3]], align 4
6129 // CHECK8-NEXT:    store i32 99, i32* [[DOTOMP_UB4]], align 4
6130 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
6131 // CHECK8-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
6132 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
6133 // CHECK8:       omp.inner.for.cond7:
6134 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !12
6135 // CHECK8-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !12
6136 // CHECK8-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6137 // CHECK8-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]]
6138 // CHECK8:       omp.inner.for.body9:
6139 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !12
6140 // CHECK8-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
6141 // CHECK8-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
6142 // CHECK8-NEXT:    store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !12
6143 // CHECK8-NEXT:    invoke void @_Z3foov()
6144 // CHECK8-NEXT:    to label [[INVOKE_CONT12:%.*]] unwind label [[TERMINATE_LPAD]], !llvm.access.group !12
6145 // CHECK8:       invoke.cont12:
6146 // CHECK8-NEXT:    br label [[OMP_BODY_CONTINUE13:%.*]]
6147 // CHECK8:       omp.body.continue13:
6148 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC14:%.*]]
6149 // CHECK8:       omp.inner.for.inc14:
6150 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !12
6151 // CHECK8-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP9]], 1
6152 // CHECK8-NEXT:    store i32 [[ADD15]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !12
6153 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP13:![0-9]+]]
6154 // CHECK8:       omp.inner.for.end16:
6155 // CHECK8-NEXT:    store i32 100, i32* [[I6]], align 4
6156 // CHECK8-NEXT:    ret i32 0
6157 // CHECK8:       terminate.lpad:
6158 // CHECK8-NEXT:    [[TMP10:%.*]] = landingpad { i8*, i32 }
6159 // CHECK8-NEXT:    catch i8* null
6160 // CHECK8-NEXT:    [[TMP11:%.*]] = extractvalue { i8*, i32 } [[TMP10]], 0
6161 // CHECK8-NEXT:    call void @__clang_call_terminate(i8* [[TMP11]]) #[[ATTR8]], !llvm.access.group !9
6162 // CHECK8-NEXT:    unreachable
6163 //
6164 //
6165 // CHECK8-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv
6166 // CHECK8-SAME: () #[[ATTR5]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
6167 // CHECK8-NEXT:  entry:
6168 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6169 // CHECK8-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6170 // CHECK8-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6171 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6172 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
6173 // CHECK8-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
6174 // CHECK8-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
6175 // CHECK8-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
6176 // CHECK8-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
6177 // CHECK8-NEXT:    [[I6:%.*]] = alloca i32, align 4
6178 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6179 // CHECK8-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
6180 // CHECK8-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6181 // CHECK8-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
6182 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6183 // CHECK8:       omp.inner.for.cond:
6184 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
6185 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15
6186 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
6187 // CHECK8-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6188 // CHECK8:       omp.inner.for.body:
6189 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
6190 // CHECK8-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
6191 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6192 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !15
6193 // CHECK8-NEXT:    invoke void @_Z3foov()
6194 // CHECK8-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !15
6195 // CHECK8:       invoke.cont:
6196 // CHECK8-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6197 // CHECK8:       omp.body.continue:
6198 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6199 // CHECK8:       omp.inner.for.inc:
6200 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
6201 // CHECK8-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
6202 // CHECK8-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
6203 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
6204 // CHECK8:       omp.inner.for.end:
6205 // CHECK8-NEXT:    store i32 100, i32* [[I]], align 4
6206 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_LB3]], align 4
6207 // CHECK8-NEXT:    store i32 99, i32* [[DOTOMP_UB4]], align 4
6208 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
6209 // CHECK8-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
6210 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
6211 // CHECK8:       omp.inner.for.cond7:
6212 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !18
6213 // CHECK8-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !18
6214 // CHECK8-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6215 // CHECK8-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]]
6216 // CHECK8:       omp.inner.for.body9:
6217 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !18
6218 // CHECK8-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
6219 // CHECK8-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
6220 // CHECK8-NEXT:    store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !18
6221 // CHECK8-NEXT:    invoke void @_Z3foov()
6222 // CHECK8-NEXT:    to label [[INVOKE_CONT12:%.*]] unwind label [[TERMINATE_LPAD]], !llvm.access.group !18
6223 // CHECK8:       invoke.cont12:
6224 // CHECK8-NEXT:    br label [[OMP_BODY_CONTINUE13:%.*]]
6225 // CHECK8:       omp.body.continue13:
6226 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC14:%.*]]
6227 // CHECK8:       omp.inner.for.inc14:
6228 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !18
6229 // CHECK8-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP9]], 1
6230 // CHECK8-NEXT:    store i32 [[ADD15]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !18
6231 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP19:![0-9]+]]
6232 // CHECK8:       omp.inner.for.end16:
6233 // CHECK8-NEXT:    store i32 100, i32* [[I6]], align 4
6234 // CHECK8-NEXT:    ret i32 0
6235 // CHECK8:       terminate.lpad:
6236 // CHECK8-NEXT:    [[TMP10:%.*]] = landingpad { i8*, i32 }
6237 // CHECK8-NEXT:    catch i8* null
6238 // CHECK8-NEXT:    [[TMP11:%.*]] = extractvalue { i8*, i32 } [[TMP10]], 0
6239 // CHECK8-NEXT:    call void @__clang_call_terminate(i8* [[TMP11]]) #[[ATTR8]], !llvm.access.group !15
6240 // CHECK8-NEXT:    unreachable
6241 //
6242 //
6243 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SD1Ev
6244 // CHECK8-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6:[0-9]+]] comdat align 2 {
6245 // CHECK8-NEXT:  entry:
6246 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
6247 // CHECK8-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
6248 // CHECK8-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
6249 // CHECK8-NEXT:    call void @_ZN1SD2Ev(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR7]]
6250 // CHECK8-NEXT:    ret void
6251 //
6252 //
6253 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SC2El
6254 // CHECK8-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
6255 // CHECK8-NEXT:  entry:
6256 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
6257 // CHECK8-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
6258 // CHECK8-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
6259 // CHECK8-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
6260 // CHECK8-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
6261 // CHECK8-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
6262 // CHECK8-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
6263 // CHECK8-NEXT:    store i64 [[TMP0]], i64* [[A2]], align 8
6264 // CHECK8-NEXT:    ret void
6265 //
6266 //
6267 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SD2Ev
6268 // CHECK8-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
6269 // CHECK8-NEXT:  entry:
6270 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
6271 // CHECK8-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
6272 // CHECK8-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
6273 // CHECK8-NEXT:    ret void
6274 //
6275 //
6276 // CHECK9-LABEL: define {{[^@]+}}@main
6277 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
6278 // CHECK9-NEXT:  entry:
6279 // CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
6280 // CHECK9-NEXT:    [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
6281 // CHECK9-NEXT:    [[A:%.*]] = alloca i8, align 1
6282 // CHECK9-NEXT:    [[EXN_SLOT:%.*]] = alloca i8*, align 8
6283 // CHECK9-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
6284 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6285 // CHECK9-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
6286 // CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
6287 // CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
6288 // CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
6289 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
6290 // CHECK9-NEXT:    store i32 0, i32* [[RETVAL]], align 4
6291 // CHECK9-NEXT:    call void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[S]], i64 0)
6292 // CHECK9-NEXT:    [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[S]])
6293 // CHECK9-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
6294 // CHECK9:       invoke.cont:
6295 // CHECK9-NEXT:    store i8 [[CALL]], i8* [[A]], align 1
6296 // CHECK9-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100)
6297 // CHECK9-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
6298 // CHECK9-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
6299 // CHECK9-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
6300 // CHECK9:       omp_offload.failed:
6301 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR6:[0-9]+]]
6302 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]
6303 // CHECK9:       lpad:
6304 // CHECK9-NEXT:    [[TMP2:%.*]] = landingpad { i8*, i32 }
6305 // CHECK9-NEXT:    cleanup
6306 // CHECK9-NEXT:    [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0
6307 // CHECK9-NEXT:    store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8
6308 // CHECK9-NEXT:    [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1
6309 // CHECK9-NEXT:    store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4
6310 // CHECK9-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
6311 // CHECK9-NEXT:    br label [[EH_RESUME:%.*]]
6312 // CHECK9:       omp_offload.cont:
6313 // CHECK9-NEXT:    [[TMP5:%.*]] = load i8, i8* [[A]], align 1
6314 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8*
6315 // CHECK9-NEXT:    store i8 [[TMP5]], i8* [[CONV]], align 1
6316 // CHECK9-NEXT:    [[TMP6:%.*]] = load i64, i64* [[A_CASTED]], align 8
6317 // CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6318 // CHECK9-NEXT:    [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
6319 // CHECK9-NEXT:    store i64 [[TMP6]], i64* [[TMP8]], align 8
6320 // CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6321 // CHECK9-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
6322 // CHECK9-NEXT:    store i64 [[TMP6]], i64* [[TMP10]], align 8
6323 // CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
6324 // CHECK9-NEXT:    store i8* null, i8** [[TMP11]], align 8
6325 // CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6326 // CHECK9-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6327 // CHECK9-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
6328 // CHECK9-NEXT:    [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, i32 1, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
6329 // CHECK9-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
6330 // CHECK9-NEXT:    br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
6331 // CHECK9:       omp_offload.failed2:
6332 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP6]]) #[[ATTR6]]
6333 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
6334 // CHECK9:       omp_offload.cont3:
6335 // CHECK9-NEXT:    [[TMP16:%.*]] = load i8, i8* [[A]], align 1
6336 // CHECK9-NEXT:    [[CONV4:%.*]] = sext i8 [[TMP16]] to i32
6337 // CHECK9-NEXT:    [[CALL6:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv()
6338 // CHECK9-NEXT:    to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]]
6339 // CHECK9:       invoke.cont5:
6340 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[CONV4]], [[CALL6]]
6341 // CHECK9-NEXT:    [[CALL8:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv()
6342 // CHECK9-NEXT:    to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD]]
6343 // CHECK9:       invoke.cont7:
6344 // CHECK9-NEXT:    [[ADD9:%.*]] = add nsw i32 [[ADD]], [[CALL8]]
6345 // CHECK9-NEXT:    store i32 [[ADD9]], i32* [[RETVAL]], align 4
6346 // CHECK9-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
6347 // CHECK9-NEXT:    [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4
6348 // CHECK9-NEXT:    ret i32 [[TMP17]]
6349 // CHECK9:       eh.resume:
6350 // CHECK9-NEXT:    [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8
6351 // CHECK9-NEXT:    [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
6352 // CHECK9-NEXT:    [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
6353 // CHECK9-NEXT:    [[LPAD_VAL10:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
6354 // CHECK9-NEXT:    resume { i8*, i32 } [[LPAD_VAL10]]
6355 //
6356 //
6357 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SC1El
6358 // CHECK9-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
6359 // CHECK9-NEXT:  entry:
6360 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
6361 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
6362 // CHECK9-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
6363 // CHECK9-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
6364 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
6365 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
6366 // CHECK9-NEXT:    call void @_ZN1SC2El(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]], i64 [[TMP0]])
6367 // CHECK9-NEXT:    ret void
6368 //
6369 //
6370 // CHECK9-LABEL: define {{[^@]+}}@_ZN1ScvcEv
6371 // CHECK9-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 {
6372 // CHECK9-NEXT:  entry:
6373 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
6374 // CHECK9-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
6375 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
6376 // CHECK9-NEXT:    call void @_Z8mayThrowv()
6377 // CHECK9-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
6378 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A]], align 8
6379 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i8
6380 // CHECK9-NEXT:    ret i8 [[CONV]]
6381 //
6382 //
6383 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
6384 // CHECK9-SAME: () #[[ATTR3:[0-9]+]] {
6385 // CHECK9-NEXT:  entry:
6386 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
6387 // CHECK9-NEXT:    ret void
6388 //
6389 //
6390 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
6391 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
6392 // CHECK9-NEXT:  entry:
6393 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6394 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6395 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6396 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6397 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6398 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6399 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6400 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6401 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
6402 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6403 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6404 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6405 // CHECK9-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
6406 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6407 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6408 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6409 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
6410 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6411 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6412 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
6413 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6414 // CHECK9:       cond.true:
6415 // CHECK9-NEXT:    br label [[COND_END:%.*]]
6416 // CHECK9:       cond.false:
6417 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6418 // CHECK9-NEXT:    br label [[COND_END]]
6419 // CHECK9:       cond.end:
6420 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6421 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6422 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6423 // CHECK9-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
6424 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6425 // CHECK9:       omp.inner.for.cond:
6426 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
6427 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13
6428 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6429 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6430 // CHECK9:       omp.inner.for.body:
6431 // CHECK9-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2), !llvm.access.group !13
6432 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !13
6433 // CHECK9-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
6434 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13
6435 // CHECK9-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
6436 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !13
6437 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6438 // CHECK9:       omp.inner.for.inc:
6439 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
6440 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !13
6441 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
6442 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
6443 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
6444 // CHECK9:       omp.inner.for.end:
6445 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6446 // CHECK9:       omp.loop.exit:
6447 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
6448 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6449 // CHECK9-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
6450 // CHECK9-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6451 // CHECK9:       .omp.final.then:
6452 // CHECK9-NEXT:    store i32 100, i32* [[I]], align 4
6453 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
6454 // CHECK9:       .omp.final.done:
6455 // CHECK9-NEXT:    ret void
6456 //
6457 //
6458 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
6459 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
6460 // CHECK9-NEXT:  entry:
6461 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6462 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6463 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6464 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6465 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6466 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6467 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6468 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6469 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6470 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6471 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
6472 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6473 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6474 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6475 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6476 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6477 // CHECK9-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
6478 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6479 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6480 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6481 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6482 // CHECK9-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6483 // CHECK9-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
6484 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6485 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6486 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6487 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
6488 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6489 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6490 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
6491 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6492 // CHECK9:       cond.true:
6493 // CHECK9-NEXT:    br label [[COND_END:%.*]]
6494 // CHECK9:       cond.false:
6495 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6496 // CHECK9-NEXT:    br label [[COND_END]]
6497 // CHECK9:       cond.end:
6498 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6499 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6500 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6501 // CHECK9-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
6502 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6503 // CHECK9:       omp.inner.for.cond:
6504 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
6505 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !17
6506 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6507 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6508 // CHECK9:       omp.inner.for.body:
6509 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
6510 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6511 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6512 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !17
6513 // CHECK9-NEXT:    invoke void @_Z3foov()
6514 // CHECK9-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !17
6515 // CHECK9:       invoke.cont:
6516 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6517 // CHECK9:       omp.body.continue:
6518 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6519 // CHECK9:       omp.inner.for.inc:
6520 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
6521 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
6522 // CHECK9-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
6523 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
6524 // CHECK9:       omp.inner.for.end:
6525 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6526 // CHECK9:       omp.loop.exit:
6527 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
6528 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6529 // CHECK9-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
6530 // CHECK9-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6531 // CHECK9:       .omp.final.then:
6532 // CHECK9-NEXT:    store i32 100, i32* [[I]], align 4
6533 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
6534 // CHECK9:       .omp.final.done:
6535 // CHECK9-NEXT:    ret void
6536 // CHECK9:       terminate.lpad:
6537 // CHECK9-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
6538 // CHECK9-NEXT:    catch i8* null
6539 // CHECK9-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
6540 // CHECK9-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10:[0-9]+]], !llvm.access.group !17
6541 // CHECK9-NEXT:    unreachable
6542 //
6543 //
6544 // CHECK9-LABEL: define {{[^@]+}}@__clang_call_terminate
6545 // CHECK9-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat {
6546 // CHECK9-NEXT:    [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]]
6547 // CHECK9-NEXT:    call void @_ZSt9terminatev() #[[ATTR10]]
6548 // CHECK9-NEXT:    unreachable
6549 //
6550 //
6551 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74
6552 // CHECK9-SAME: (i64 [[A:%.*]]) #[[ATTR3]] {
6553 // CHECK9-NEXT:  entry:
6554 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
6555 // CHECK9-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
6556 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8*
6557 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i8* [[CONV]])
6558 // CHECK9-NEXT:    ret void
6559 //
6560 //
6561 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2
6562 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i8* nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] {
6563 // CHECK9-NEXT:  entry:
6564 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6565 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6566 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i8*, align 8
6567 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6568 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6569 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6570 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6571 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6572 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6573 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
6574 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6575 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6576 // CHECK9-NEXT:    store i8* [[A]], i8** [[A_ADDR]], align 8
6577 // CHECK9-NEXT:    [[TMP0:%.*]] = load i8*, i8** [[A_ADDR]], align 8
6578 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6579 // CHECK9-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
6580 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6581 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6582 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6583 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6584 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6585 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6586 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
6587 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6588 // CHECK9:       cond.true:
6589 // CHECK9-NEXT:    br label [[COND_END:%.*]]
6590 // CHECK9:       cond.false:
6591 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6592 // CHECK9-NEXT:    br label [[COND_END]]
6593 // CHECK9:       cond.end:
6594 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6595 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6596 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6597 // CHECK9-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6598 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6599 // CHECK9:       omp.inner.for.cond:
6600 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
6601 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !22
6602 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6603 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6604 // CHECK9:       omp.inner.for.body:
6605 // CHECK9-NEXT:    [[TMP8:%.*]] = load i8, i8* [[TMP0]], align 1, !llvm.access.group !22
6606 // CHECK9-NEXT:    [[TMP9:%.*]] = sext i8 [[TMP8]] to i32
6607 // CHECK9-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]]), !llvm.access.group !22
6608 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !22
6609 // CHECK9-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
6610 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !22
6611 // CHECK9-NEXT:    [[TMP13:%.*]] = zext i32 [[TMP12]] to i64
6612 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]]), !llvm.access.group !22
6613 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6614 // CHECK9:       omp.inner.for.inc:
6615 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
6616 // CHECK9-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !22
6617 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
6618 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
6619 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
6620 // CHECK9:       omp.inner.for.end:
6621 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6622 // CHECK9:       omp.loop.exit:
6623 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6624 // CHECK9-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6625 // CHECK9-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
6626 // CHECK9-NEXT:    br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6627 // CHECK9:       .omp.final.then:
6628 // CHECK9-NEXT:    store i32 100, i32* [[I]], align 4
6629 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
6630 // CHECK9:       .omp.final.done:
6631 // CHECK9-NEXT:    ret void
6632 //
6633 //
6634 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3
6635 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
6636 // CHECK9-NEXT:  entry:
6637 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6638 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6639 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6640 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6641 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6642 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6643 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6644 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6645 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6646 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6647 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
6648 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6649 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6650 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6651 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6652 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6653 // CHECK9-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
6654 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6655 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6656 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6657 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6658 // CHECK9-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6659 // CHECK9-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
6660 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6661 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6662 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6663 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
6664 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6665 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6666 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
6667 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6668 // CHECK9:       cond.true:
6669 // CHECK9-NEXT:    br label [[COND_END:%.*]]
6670 // CHECK9:       cond.false:
6671 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6672 // CHECK9-NEXT:    br label [[COND_END]]
6673 // CHECK9:       cond.end:
6674 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6675 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6676 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6677 // CHECK9-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
6678 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6679 // CHECK9:       omp.inner.for.cond:
6680 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
6681 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25
6682 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6683 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6684 // CHECK9:       omp.inner.for.body:
6685 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
6686 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6687 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6688 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !25
6689 // CHECK9-NEXT:    invoke void @_Z3foov()
6690 // CHECK9-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !25
6691 // CHECK9:       invoke.cont:
6692 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6693 // CHECK9:       omp.body.continue:
6694 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6695 // CHECK9:       omp.inner.for.inc:
6696 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
6697 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
6698 // CHECK9-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
6699 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
6700 // CHECK9:       omp.inner.for.end:
6701 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6702 // CHECK9:       omp.loop.exit:
6703 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
6704 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6705 // CHECK9-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
6706 // CHECK9-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6707 // CHECK9:       .omp.final.then:
6708 // CHECK9-NEXT:    store i32 100, i32* [[I]], align 4
6709 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
6710 // CHECK9:       .omp.final.done:
6711 // CHECK9-NEXT:    ret void
6712 // CHECK9:       terminate.lpad:
6713 // CHECK9-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
6714 // CHECK9-NEXT:    catch i8* null
6715 // CHECK9-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
6716 // CHECK9-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !25
6717 // CHECK9-NEXT:    unreachable
6718 //
6719 //
6720 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv
6721 // CHECK9-SAME: () #[[ATTR7:[0-9]+]] comdat {
6722 // CHECK9-NEXT:  entry:
6723 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6724 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
6725 // CHECK9-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
6726 // CHECK9-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
6727 // CHECK9-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
6728 // CHECK9-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
6729 // CHECK9:       omp_offload.failed:
6730 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR6]]
6731 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]
6732 // CHECK9:       omp_offload.cont:
6733 // CHECK9-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
6734 // CHECK9-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
6735 // CHECK9-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
6736 // CHECK9-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
6737 // CHECK9:       omp_offload.failed2:
6738 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR6]]
6739 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
6740 // CHECK9:       omp_offload.cont3:
6741 // CHECK9-NEXT:    ret i32 0
6742 //
6743 //
6744 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv
6745 // CHECK9-SAME: () #[[ATTR7]] comdat {
6746 // CHECK9-NEXT:  entry:
6747 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6748 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
6749 // CHECK9-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
6750 // CHECK9-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
6751 // CHECK9-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
6752 // CHECK9-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
6753 // CHECK9:       omp_offload.failed:
6754 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR6]]
6755 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]
6756 // CHECK9:       omp_offload.cont:
6757 // CHECK9-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
6758 // CHECK9-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
6759 // CHECK9-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
6760 // CHECK9-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
6761 // CHECK9:       omp_offload.failed2:
6762 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR6]]
6763 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
6764 // CHECK9:       omp_offload.cont3:
6765 // CHECK9-NEXT:    ret i32 0
6766 //
6767 //
6768 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SD1Ev
6769 // CHECK9-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 {
6770 // CHECK9-NEXT:  entry:
6771 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
6772 // CHECK9-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
6773 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
6774 // CHECK9-NEXT:    call void @_ZN1SD2Ev(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR6]]
6775 // CHECK9-NEXT:    ret void
6776 //
6777 //
6778 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SC2El
6779 // CHECK9-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
6780 // CHECK9-NEXT:  entry:
6781 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
6782 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
6783 // CHECK9-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
6784 // CHECK9-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
6785 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
6786 // CHECK9-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
6787 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
6788 // CHECK9-NEXT:    store i64 [[TMP0]], i64* [[A2]], align 8
6789 // CHECK9-NEXT:    ret void
6790 //
6791 //
6792 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SD2Ev
6793 // CHECK9-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
6794 // CHECK9-NEXT:  entry:
6795 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
6796 // CHECK9-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
6797 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
6798 // CHECK9-NEXT:    ret void
6799 //
6800 //
6801 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52
6802 // CHECK9-SAME: () #[[ATTR3]] {
6803 // CHECK9-NEXT:  entry:
6804 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
6805 // CHECK9-NEXT:    ret void
6806 //
6807 //
6808 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..4
6809 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
6810 // CHECK9-NEXT:  entry:
6811 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6812 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6813 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6814 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6815 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6816 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6817 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6818 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6819 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
6820 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6821 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6822 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6823 // CHECK9-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
6824 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6825 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6826 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6827 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
6828 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6829 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6830 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
6831 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6832 // CHECK9:       cond.true:
6833 // CHECK9-NEXT:    br label [[COND_END:%.*]]
6834 // CHECK9:       cond.false:
6835 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6836 // CHECK9-NEXT:    br label [[COND_END]]
6837 // CHECK9:       cond.end:
6838 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6839 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6840 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6841 // CHECK9-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
6842 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6843 // CHECK9:       omp.inner.for.cond:
6844 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
6845 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
6846 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6847 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6848 // CHECK9:       omp.inner.for.body:
6849 // CHECK9-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5), !llvm.access.group !28
6850 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28
6851 // CHECK9-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
6852 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
6853 // CHECK9-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
6854 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !28
6855 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6856 // CHECK9:       omp.inner.for.inc:
6857 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
6858 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28
6859 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
6860 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
6861 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]
6862 // CHECK9:       omp.inner.for.end:
6863 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6864 // CHECK9:       omp.loop.exit:
6865 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
6866 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6867 // CHECK9-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
6868 // CHECK9-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6869 // CHECK9:       .omp.final.then:
6870 // CHECK9-NEXT:    store i32 100, i32* [[I]], align 4
6871 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
6872 // CHECK9:       .omp.final.done:
6873 // CHECK9-NEXT:    ret void
6874 //
6875 //
6876 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..5
6877 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
6878 // CHECK9-NEXT:  entry:
6879 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6880 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6881 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6882 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6883 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6884 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6885 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6886 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6887 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6888 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6889 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
6890 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6891 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6892 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6893 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6894 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6895 // CHECK9-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
6896 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6897 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6898 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6899 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6900 // CHECK9-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6901 // CHECK9-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
6902 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6903 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6904 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6905 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
6906 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6907 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6908 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
6909 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6910 // CHECK9:       cond.true:
6911 // CHECK9-NEXT:    br label [[COND_END:%.*]]
6912 // CHECK9:       cond.false:
6913 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6914 // CHECK9-NEXT:    br label [[COND_END]]
6915 // CHECK9:       cond.end:
6916 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6917 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6918 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6919 // CHECK9-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
6920 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6921 // CHECK9:       omp.inner.for.cond:
6922 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
6923 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !31
6924 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6925 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6926 // CHECK9:       omp.inner.for.body:
6927 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
6928 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6929 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6930 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !31
6931 // CHECK9-NEXT:    invoke void @_Z3foov()
6932 // CHECK9-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !31
6933 // CHECK9:       invoke.cont:
6934 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6935 // CHECK9:       omp.body.continue:
6936 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6937 // CHECK9:       omp.inner.for.inc:
6938 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
6939 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
6940 // CHECK9-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
6941 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]
6942 // CHECK9:       omp.inner.for.end:
6943 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6944 // CHECK9:       omp.loop.exit:
6945 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
6946 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6947 // CHECK9-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
6948 // CHECK9-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6949 // CHECK9:       .omp.final.then:
6950 // CHECK9-NEXT:    store i32 100, i32* [[I]], align 4
6951 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
6952 // CHECK9:       .omp.final.done:
6953 // CHECK9-NEXT:    ret void
6954 // CHECK9:       terminate.lpad:
6955 // CHECK9-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
6956 // CHECK9-NEXT:    catch i8* null
6957 // CHECK9-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
6958 // CHECK9-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !31
6959 // CHECK9-NEXT:    unreachable
6960 //
6961 //
6962 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57
6963 // CHECK9-SAME: () #[[ATTR3]] {
6964 // CHECK9-NEXT:  entry:
6965 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
6966 // CHECK9-NEXT:    ret void
6967 //
6968 //
6969 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..6
6970 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
6971 // CHECK9-NEXT:  entry:
6972 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6973 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6974 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6975 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6976 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6977 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6978 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6979 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6980 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
6981 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6982 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6983 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6984 // CHECK9-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
6985 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6986 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6987 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6988 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
6989 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6990 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6991 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
6992 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6993 // CHECK9:       cond.true:
6994 // CHECK9-NEXT:    br label [[COND_END:%.*]]
6995 // CHECK9:       cond.false:
6996 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6997 // CHECK9-NEXT:    br label [[COND_END]]
6998 // CHECK9:       cond.end:
6999 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7000 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7001 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7002 // CHECK9-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
7003 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7004 // CHECK9:       omp.inner.for.cond:
7005 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
7006 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !34
7007 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7008 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7009 // CHECK9:       omp.inner.for.body:
7010 // CHECK9-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23), !llvm.access.group !34
7011 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !34
7012 // CHECK9-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
7013 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !34
7014 // CHECK9-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
7015 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !34
7016 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7017 // CHECK9:       omp.inner.for.inc:
7018 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
7019 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !34
7020 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
7021 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
7022 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]]
7023 // CHECK9:       omp.inner.for.end:
7024 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7025 // CHECK9:       omp.loop.exit:
7026 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
7027 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7028 // CHECK9-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
7029 // CHECK9-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7030 // CHECK9:       .omp.final.then:
7031 // CHECK9-NEXT:    store i32 100, i32* [[I]], align 4
7032 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
7033 // CHECK9:       .omp.final.done:
7034 // CHECK9-NEXT:    ret void
7035 //
7036 //
7037 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..7
7038 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
7039 // CHECK9-NEXT:  entry:
7040 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7041 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7042 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7043 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7044 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7045 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7046 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7047 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7048 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7049 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7050 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
7051 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7052 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7053 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7054 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7055 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
7056 // CHECK9-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
7057 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7058 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
7059 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7060 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
7061 // CHECK9-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
7062 // CHECK9-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
7063 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7064 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7065 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7066 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
7067 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7068 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7069 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
7070 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7071 // CHECK9:       cond.true:
7072 // CHECK9-NEXT:    br label [[COND_END:%.*]]
7073 // CHECK9:       cond.false:
7074 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7075 // CHECK9-NEXT:    br label [[COND_END]]
7076 // CHECK9:       cond.end:
7077 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7078 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7079 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7080 // CHECK9-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
7081 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7082 // CHECK9:       omp.inner.for.cond:
7083 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
7084 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !37
7085 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7086 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7087 // CHECK9:       omp.inner.for.body:
7088 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
7089 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7090 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7091 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !37
7092 // CHECK9-NEXT:    invoke void @_Z3foov()
7093 // CHECK9-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !37
7094 // CHECK9:       invoke.cont:
7095 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7096 // CHECK9:       omp.body.continue:
7097 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7098 // CHECK9:       omp.inner.for.inc:
7099 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
7100 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
7101 // CHECK9-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
7102 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP38:![0-9]+]]
7103 // CHECK9:       omp.inner.for.end:
7104 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7105 // CHECK9:       omp.loop.exit:
7106 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
7107 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7108 // CHECK9-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
7109 // CHECK9-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7110 // CHECK9:       .omp.final.then:
7111 // CHECK9-NEXT:    store i32 100, i32* [[I]], align 4
7112 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
7113 // CHECK9:       .omp.final.done:
7114 // CHECK9-NEXT:    ret void
7115 // CHECK9:       terminate.lpad:
7116 // CHECK9-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
7117 // CHECK9-NEXT:    catch i8* null
7118 // CHECK9-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
7119 // CHECK9-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !37
7120 // CHECK9-NEXT:    unreachable
7121 //
7122 //
7123 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52
7124 // CHECK9-SAME: () #[[ATTR3]] {
7125 // CHECK9-NEXT:  entry:
7126 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*))
7127 // CHECK9-NEXT:    ret void
7128 //
7129 //
7130 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..8
7131 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
7132 // CHECK9-NEXT:  entry:
7133 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7134 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7135 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7136 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7137 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7138 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7139 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7140 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7141 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
7142 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7143 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7144 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7145 // CHECK9-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
7146 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7147 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7148 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7149 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
7150 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7151 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7152 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
7153 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7154 // CHECK9:       cond.true:
7155 // CHECK9-NEXT:    br label [[COND_END:%.*]]
7156 // CHECK9:       cond.false:
7157 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7158 // CHECK9-NEXT:    br label [[COND_END]]
7159 // CHECK9:       cond.end:
7160 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7161 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7162 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7163 // CHECK9-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
7164 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7165 // CHECK9:       omp.inner.for.cond:
7166 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40
7167 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !40
7168 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7169 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7170 // CHECK9:       omp.inner.for.body:
7171 // CHECK9-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1), !llvm.access.group !40
7172 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !40
7173 // CHECK9-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
7174 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !40
7175 // CHECK9-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
7176 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !40
7177 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7178 // CHECK9:       omp.inner.for.inc:
7179 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40
7180 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !40
7181 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
7182 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40
7183 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP41:![0-9]+]]
7184 // CHECK9:       omp.inner.for.end:
7185 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7186 // CHECK9:       omp.loop.exit:
7187 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
7188 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7189 // CHECK9-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
7190 // CHECK9-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7191 // CHECK9:       .omp.final.then:
7192 // CHECK9-NEXT:    store i32 100, i32* [[I]], align 4
7193 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
7194 // CHECK9:       .omp.final.done:
7195 // CHECK9-NEXT:    ret void
7196 //
7197 //
7198 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..9
7199 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
7200 // CHECK9-NEXT:  entry:
7201 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7202 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7203 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7204 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7205 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7206 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7207 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7208 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7209 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7210 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7211 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
7212 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7213 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7214 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7215 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7216 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
7217 // CHECK9-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
7218 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7219 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
7220 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7221 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
7222 // CHECK9-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
7223 // CHECK9-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
7224 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7225 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7226 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7227 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
7228 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7229 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7230 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
7231 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7232 // CHECK9:       cond.true:
7233 // CHECK9-NEXT:    br label [[COND_END:%.*]]
7234 // CHECK9:       cond.false:
7235 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7236 // CHECK9-NEXT:    br label [[COND_END]]
7237 // CHECK9:       cond.end:
7238 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7239 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7240 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7241 // CHECK9-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
7242 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7243 // CHECK9:       omp.inner.for.cond:
7244 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
7245 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !43
7246 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7247 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7248 // CHECK9:       omp.inner.for.body:
7249 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
7250 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7251 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7252 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !43
7253 // CHECK9-NEXT:    invoke void @_Z3foov()
7254 // CHECK9-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !43
7255 // CHECK9:       invoke.cont:
7256 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7257 // CHECK9:       omp.body.continue:
7258 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7259 // CHECK9:       omp.inner.for.inc:
7260 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
7261 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
7262 // CHECK9-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
7263 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]]
7264 // CHECK9:       omp.inner.for.end:
7265 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7266 // CHECK9:       omp.loop.exit:
7267 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
7268 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7269 // CHECK9-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
7270 // CHECK9-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7271 // CHECK9:       .omp.final.then:
7272 // CHECK9-NEXT:    store i32 100, i32* [[I]], align 4
7273 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
7274 // CHECK9:       .omp.final.done:
7275 // CHECK9-NEXT:    ret void
7276 // CHECK9:       terminate.lpad:
7277 // CHECK9-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
7278 // CHECK9-NEXT:    catch i8* null
7279 // CHECK9-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
7280 // CHECK9-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !43
7281 // CHECK9-NEXT:    unreachable
7282 //
7283 //
7284 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57
7285 // CHECK9-SAME: () #[[ATTR3]] {
7286 // CHECK9-NEXT:  entry:
7287 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
7288 // CHECK9-NEXT:    ret void
7289 //
7290 //
7291 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..10
7292 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
7293 // CHECK9-NEXT:  entry:
7294 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7295 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7296 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7297 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7298 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7299 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7300 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7301 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7302 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
7303 // CHECK9-NEXT:    [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8
7304 // CHECK9-NEXT:    [[EXN_SLOT:%.*]] = alloca i8*, align 8
7305 // CHECK9-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
7306 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7307 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7308 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7309 // CHECK9-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
7310 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7311 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7312 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7313 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
7314 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7315 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7316 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
7317 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7318 // CHECK9:       cond.true:
7319 // CHECK9-NEXT:    br label [[COND_END:%.*]]
7320 // CHECK9:       cond.false:
7321 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7322 // CHECK9-NEXT:    br label [[COND_END]]
7323 // CHECK9:       cond.end:
7324 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7325 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7326 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7327 // CHECK9-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
7328 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7329 // CHECK9:       omp.inner.for.cond:
7330 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
7331 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !46
7332 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7333 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7334 // CHECK9:       omp.inner.for.body:
7335 // CHECK9-NEXT:    invoke void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 23)
7336 // CHECK9-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !46
7337 // CHECK9:       invoke.cont:
7338 // CHECK9-NEXT:    [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]])
7339 // CHECK9-NEXT:    to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD:%.*]], !llvm.access.group !46
7340 // CHECK9:       invoke.cont2:
7341 // CHECK9-NEXT:    [[TMP7:%.*]] = sext i8 [[CALL]] to i32
7342 // CHECK9-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]]), !llvm.access.group !46
7343 // CHECK9-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]], !llvm.access.group !46
7344 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !46
7345 // CHECK9-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
7346 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !46
7347 // CHECK9-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
7348 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]), !llvm.access.group !46
7349 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7350 // CHECK9:       omp.inner.for.inc:
7351 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
7352 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !46
7353 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
7354 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
7355 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP47:![0-9]+]]
7356 // CHECK9:       lpad:
7357 // CHECK9-NEXT:    [[TMP14:%.*]] = landingpad { i8*, i32 }
7358 // CHECK9-NEXT:    catch i8* null
7359 // CHECK9-NEXT:    [[TMP15:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 0
7360 // CHECK9-NEXT:    store i8* [[TMP15]], i8** [[EXN_SLOT]], align 8, !llvm.access.group !46
7361 // CHECK9-NEXT:    [[TMP16:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 1
7362 // CHECK9-NEXT:    store i32 [[TMP16]], i32* [[EHSELECTOR_SLOT]], align 4, !llvm.access.group !46
7363 // CHECK9-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]], !llvm.access.group !46
7364 // CHECK9-NEXT:    br label [[TERMINATE_HANDLER:%.*]]
7365 // CHECK9:       omp.inner.for.end:
7366 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7367 // CHECK9:       omp.loop.exit:
7368 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
7369 // CHECK9-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7370 // CHECK9-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
7371 // CHECK9-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7372 // CHECK9:       .omp.final.then:
7373 // CHECK9-NEXT:    store i32 100, i32* [[I]], align 4
7374 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
7375 // CHECK9:       .omp.final.done:
7376 // CHECK9-NEXT:    ret void
7377 // CHECK9:       terminate.lpad:
7378 // CHECK9-NEXT:    [[TMP19:%.*]] = landingpad { i8*, i32 }
7379 // CHECK9-NEXT:    catch i8* null
7380 // CHECK9-NEXT:    [[TMP20:%.*]] = extractvalue { i8*, i32 } [[TMP19]], 0
7381 // CHECK9-NEXT:    call void @__clang_call_terminate(i8* [[TMP20]]) #[[ATTR10]], !llvm.access.group !46
7382 // CHECK9-NEXT:    unreachable
7383 // CHECK9:       terminate.handler:
7384 // CHECK9-NEXT:    [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8, !llvm.access.group !46
7385 // CHECK9-NEXT:    call void @__clang_call_terminate(i8* [[EXN]]) #[[ATTR10]], !llvm.access.group !46
7386 // CHECK9-NEXT:    unreachable
7387 //
7388 //
7389 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..11
7390 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
7391 // CHECK9-NEXT:  entry:
7392 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7393 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7394 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7395 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7396 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7397 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7398 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7399 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7400 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7401 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7402 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
7403 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7404 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7405 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7406 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7407 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
7408 // CHECK9-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
7409 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7410 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
7411 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7412 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
7413 // CHECK9-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
7414 // CHECK9-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
7415 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7416 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7417 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7418 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
7419 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7420 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7421 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
7422 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7423 // CHECK9:       cond.true:
7424 // CHECK9-NEXT:    br label [[COND_END:%.*]]
7425 // CHECK9:       cond.false:
7426 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7427 // CHECK9-NEXT:    br label [[COND_END]]
7428 // CHECK9:       cond.end:
7429 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7430 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7431 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7432 // CHECK9-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
7433 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7434 // CHECK9:       omp.inner.for.cond:
7435 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
7436 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !49
7437 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7438 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7439 // CHECK9:       omp.inner.for.body:
7440 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
7441 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7442 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7443 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !49
7444 // CHECK9-NEXT:    invoke void @_Z3foov()
7445 // CHECK9-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !49
7446 // CHECK9:       invoke.cont:
7447 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7448 // CHECK9:       omp.body.continue:
7449 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7450 // CHECK9:       omp.inner.for.inc:
7451 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
7452 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
7453 // CHECK9-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
7454 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP50:![0-9]+]]
7455 // CHECK9:       omp.inner.for.end:
7456 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7457 // CHECK9:       omp.loop.exit:
7458 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
7459 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7460 // CHECK9-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
7461 // CHECK9-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7462 // CHECK9:       .omp.final.then:
7463 // CHECK9-NEXT:    store i32 100, i32* [[I]], align 4
7464 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
7465 // CHECK9:       .omp.final.done:
7466 // CHECK9-NEXT:    ret void
7467 // CHECK9:       terminate.lpad:
7468 // CHECK9-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
7469 // CHECK9-NEXT:    catch i8* null
7470 // CHECK9-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
7471 // CHECK9-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !49
7472 // CHECK9-NEXT:    unreachable
7473 //
7474 //
7475 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
7476 // CHECK9-SAME: () #[[ATTR9:[0-9]+]] {
7477 // CHECK9-NEXT:  entry:
7478 // CHECK9-NEXT:    call void @__tgt_register_requires(i64 1)
7479 // CHECK9-NEXT:    ret void
7480 //
7481 //
7482 // CHECK10-LABEL: define {{[^@]+}}@main
7483 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
7484 // CHECK10-NEXT:  entry:
7485 // CHECK10-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
7486 // CHECK10-NEXT:    [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
7487 // CHECK10-NEXT:    [[A:%.*]] = alloca i8, align 1
7488 // CHECK10-NEXT:    [[EXN_SLOT:%.*]] = alloca i8*, align 8
7489 // CHECK10-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
7490 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7491 // CHECK10-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
7492 // CHECK10-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
7493 // CHECK10-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
7494 // CHECK10-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
7495 // CHECK10-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
7496 // CHECK10-NEXT:    store i32 0, i32* [[RETVAL]], align 4
7497 // CHECK10-NEXT:    call void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[S]], i64 0)
7498 // CHECK10-NEXT:    [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[S]])
7499 // CHECK10-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
7500 // CHECK10:       invoke.cont:
7501 // CHECK10-NEXT:    store i8 [[CALL]], i8* [[A]], align 1
7502 // CHECK10-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100)
7503 // CHECK10-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
7504 // CHECK10-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
7505 // CHECK10-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
7506 // CHECK10:       omp_offload.failed:
7507 // CHECK10-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR6:[0-9]+]]
7508 // CHECK10-NEXT:    br label [[OMP_OFFLOAD_CONT]]
7509 // CHECK10:       lpad:
7510 // CHECK10-NEXT:    [[TMP2:%.*]] = landingpad { i8*, i32 }
7511 // CHECK10-NEXT:    cleanup
7512 // CHECK10-NEXT:    [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0
7513 // CHECK10-NEXT:    store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8
7514 // CHECK10-NEXT:    [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1
7515 // CHECK10-NEXT:    store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4
7516 // CHECK10-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
7517 // CHECK10-NEXT:    br label [[EH_RESUME:%.*]]
7518 // CHECK10:       omp_offload.cont:
7519 // CHECK10-NEXT:    [[TMP5:%.*]] = load i8, i8* [[A]], align 1
7520 // CHECK10-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8*
7521 // CHECK10-NEXT:    store i8 [[TMP5]], i8* [[CONV]], align 1
7522 // CHECK10-NEXT:    [[TMP6:%.*]] = load i64, i64* [[A_CASTED]], align 8
7523 // CHECK10-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7524 // CHECK10-NEXT:    [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
7525 // CHECK10-NEXT:    store i64 [[TMP6]], i64* [[TMP8]], align 8
7526 // CHECK10-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7527 // CHECK10-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
7528 // CHECK10-NEXT:    store i64 [[TMP6]], i64* [[TMP10]], align 8
7529 // CHECK10-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
7530 // CHECK10-NEXT:    store i8* null, i8** [[TMP11]], align 8
7531 // CHECK10-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7532 // CHECK10-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7533 // CHECK10-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
7534 // CHECK10-NEXT:    [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, i32 1, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
7535 // CHECK10-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
7536 // CHECK10-NEXT:    br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
7537 // CHECK10:       omp_offload.failed2:
7538 // CHECK10-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP6]]) #[[ATTR6]]
7539 // CHECK10-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
7540 // CHECK10:       omp_offload.cont3:
7541 // CHECK10-NEXT:    [[TMP16:%.*]] = load i8, i8* [[A]], align 1
7542 // CHECK10-NEXT:    [[CONV4:%.*]] = sext i8 [[TMP16]] to i32
7543 // CHECK10-NEXT:    [[CALL6:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv()
7544 // CHECK10-NEXT:    to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]]
7545 // CHECK10:       invoke.cont5:
7546 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 [[CONV4]], [[CALL6]]
7547 // CHECK10-NEXT:    [[CALL8:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv()
7548 // CHECK10-NEXT:    to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD]]
7549 // CHECK10:       invoke.cont7:
7550 // CHECK10-NEXT:    [[ADD9:%.*]] = add nsw i32 [[ADD]], [[CALL8]]
7551 // CHECK10-NEXT:    store i32 [[ADD9]], i32* [[RETVAL]], align 4
7552 // CHECK10-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
7553 // CHECK10-NEXT:    [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4
7554 // CHECK10-NEXT:    ret i32 [[TMP17]]
7555 // CHECK10:       eh.resume:
7556 // CHECK10-NEXT:    [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8
7557 // CHECK10-NEXT:    [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
7558 // CHECK10-NEXT:    [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
7559 // CHECK10-NEXT:    [[LPAD_VAL10:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
7560 // CHECK10-NEXT:    resume { i8*, i32 } [[LPAD_VAL10]]
7561 //
7562 //
7563 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SC1El
7564 // CHECK10-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
7565 // CHECK10-NEXT:  entry:
7566 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
7567 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
7568 // CHECK10-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
7569 // CHECK10-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
7570 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
7571 // CHECK10-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
7572 // CHECK10-NEXT:    call void @_ZN1SC2El(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]], i64 [[TMP0]])
7573 // CHECK10-NEXT:    ret void
7574 //
7575 //
7576 // CHECK10-LABEL: define {{[^@]+}}@_ZN1ScvcEv
7577 // CHECK10-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 {
7578 // CHECK10-NEXT:  entry:
7579 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
7580 // CHECK10-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
7581 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
7582 // CHECK10-NEXT:    call void @_Z8mayThrowv()
7583 // CHECK10-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
7584 // CHECK10-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A]], align 8
7585 // CHECK10-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i8
7586 // CHECK10-NEXT:    ret i8 [[CONV]]
7587 //
7588 //
7589 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
7590 // CHECK10-SAME: () #[[ATTR3:[0-9]+]] {
7591 // CHECK10-NEXT:  entry:
7592 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
7593 // CHECK10-NEXT:    ret void
7594 //
7595 //
7596 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined.
7597 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
7598 // CHECK10-NEXT:  entry:
7599 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7600 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7601 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7602 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7603 // CHECK10-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7604 // CHECK10-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7605 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7606 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7607 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
7608 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7609 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7610 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7611 // CHECK10-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
7612 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7613 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7614 // CHECK10-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7615 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
7616 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7617 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7618 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
7619 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7620 // CHECK10:       cond.true:
7621 // CHECK10-NEXT:    br label [[COND_END:%.*]]
7622 // CHECK10:       cond.false:
7623 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7624 // CHECK10-NEXT:    br label [[COND_END]]
7625 // CHECK10:       cond.end:
7626 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7627 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7628 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7629 // CHECK10-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
7630 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7631 // CHECK10:       omp.inner.for.cond:
7632 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
7633 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13
7634 // CHECK10-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7635 // CHECK10-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7636 // CHECK10:       omp.inner.for.body:
7637 // CHECK10-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2), !llvm.access.group !13
7638 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !13
7639 // CHECK10-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
7640 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13
7641 // CHECK10-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
7642 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !13
7643 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7644 // CHECK10:       omp.inner.for.inc:
7645 // CHECK10-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
7646 // CHECK10-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !13
7647 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
7648 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
7649 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
7650 // CHECK10:       omp.inner.for.end:
7651 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7652 // CHECK10:       omp.loop.exit:
7653 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
7654 // CHECK10-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7655 // CHECK10-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
7656 // CHECK10-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7657 // CHECK10:       .omp.final.then:
7658 // CHECK10-NEXT:    store i32 100, i32* [[I]], align 4
7659 // CHECK10-NEXT:    br label [[DOTOMP_FINAL_DONE]]
7660 // CHECK10:       .omp.final.done:
7661 // CHECK10-NEXT:    ret void
7662 //
7663 //
7664 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1
7665 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
7666 // CHECK10-NEXT:  entry:
7667 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7668 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7669 // CHECK10-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7670 // CHECK10-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7671 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7672 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7673 // CHECK10-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7674 // CHECK10-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7675 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7676 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7677 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
7678 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7679 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7680 // CHECK10-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7681 // CHECK10-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7682 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
7683 // CHECK10-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
7684 // CHECK10-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7685 // CHECK10-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
7686 // CHECK10-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7687 // CHECK10-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
7688 // CHECK10-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
7689 // CHECK10-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
7690 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7691 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7692 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7693 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
7694 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7695 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7696 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
7697 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7698 // CHECK10:       cond.true:
7699 // CHECK10-NEXT:    br label [[COND_END:%.*]]
7700 // CHECK10:       cond.false:
7701 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7702 // CHECK10-NEXT:    br label [[COND_END]]
7703 // CHECK10:       cond.end:
7704 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7705 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7706 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7707 // CHECK10-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
7708 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7709 // CHECK10:       omp.inner.for.cond:
7710 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
7711 // CHECK10-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !17
7712 // CHECK10-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7713 // CHECK10-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7714 // CHECK10:       omp.inner.for.body:
7715 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
7716 // CHECK10-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7717 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7718 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !17
7719 // CHECK10-NEXT:    invoke void @_Z3foov()
7720 // CHECK10-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !17
7721 // CHECK10:       invoke.cont:
7722 // CHECK10-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7723 // CHECK10:       omp.body.continue:
7724 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7725 // CHECK10:       omp.inner.for.inc:
7726 // CHECK10-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
7727 // CHECK10-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
7728 // CHECK10-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
7729 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
7730 // CHECK10:       omp.inner.for.end:
7731 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7732 // CHECK10:       omp.loop.exit:
7733 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
7734 // CHECK10-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7735 // CHECK10-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
7736 // CHECK10-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7737 // CHECK10:       .omp.final.then:
7738 // CHECK10-NEXT:    store i32 100, i32* [[I]], align 4
7739 // CHECK10-NEXT:    br label [[DOTOMP_FINAL_DONE]]
7740 // CHECK10:       .omp.final.done:
7741 // CHECK10-NEXT:    ret void
7742 // CHECK10:       terminate.lpad:
7743 // CHECK10-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
7744 // CHECK10-NEXT:    catch i8* null
7745 // CHECK10-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
7746 // CHECK10-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10:[0-9]+]], !llvm.access.group !17
7747 // CHECK10-NEXT:    unreachable
7748 //
7749 //
7750 // CHECK10-LABEL: define {{[^@]+}}@__clang_call_terminate
7751 // CHECK10-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat {
7752 // CHECK10-NEXT:    [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]]
7753 // CHECK10-NEXT:    call void @_ZSt9terminatev() #[[ATTR10]]
7754 // CHECK10-NEXT:    unreachable
7755 //
7756 //
7757 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74
7758 // CHECK10-SAME: (i64 [[A:%.*]]) #[[ATTR3]] {
7759 // CHECK10-NEXT:  entry:
7760 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
7761 // CHECK10-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
7762 // CHECK10-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8*
7763 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i8* [[CONV]])
7764 // CHECK10-NEXT:    ret void
7765 //
7766 //
7767 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..2
7768 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i8* nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] {
7769 // CHECK10-NEXT:  entry:
7770 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7771 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7772 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca i8*, align 8
7773 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7774 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7775 // CHECK10-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7776 // CHECK10-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7777 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7778 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7779 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
7780 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7781 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7782 // CHECK10-NEXT:    store i8* [[A]], i8** [[A_ADDR]], align 8
7783 // CHECK10-NEXT:    [[TMP0:%.*]] = load i8*, i8** [[A_ADDR]], align 8
7784 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7785 // CHECK10-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
7786 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7787 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7788 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7789 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
7790 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7791 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7792 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
7793 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7794 // CHECK10:       cond.true:
7795 // CHECK10-NEXT:    br label [[COND_END:%.*]]
7796 // CHECK10:       cond.false:
7797 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7798 // CHECK10-NEXT:    br label [[COND_END]]
7799 // CHECK10:       cond.end:
7800 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
7801 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7802 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7803 // CHECK10-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
7804 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7805 // CHECK10:       omp.inner.for.cond:
7806 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
7807 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !22
7808 // CHECK10-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7809 // CHECK10-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7810 // CHECK10:       omp.inner.for.body:
7811 // CHECK10-NEXT:    [[TMP8:%.*]] = load i8, i8* [[TMP0]], align 1, !llvm.access.group !22
7812 // CHECK10-NEXT:    [[TMP9:%.*]] = sext i8 [[TMP8]] to i32
7813 // CHECK10-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]]), !llvm.access.group !22
7814 // CHECK10-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !22
7815 // CHECK10-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
7816 // CHECK10-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !22
7817 // CHECK10-NEXT:    [[TMP13:%.*]] = zext i32 [[TMP12]] to i64
7818 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]]), !llvm.access.group !22
7819 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7820 // CHECK10:       omp.inner.for.inc:
7821 // CHECK10-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
7822 // CHECK10-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !22
7823 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
7824 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
7825 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
7826 // CHECK10:       omp.inner.for.end:
7827 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7828 // CHECK10:       omp.loop.exit:
7829 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
7830 // CHECK10-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7831 // CHECK10-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
7832 // CHECK10-NEXT:    br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7833 // CHECK10:       .omp.final.then:
7834 // CHECK10-NEXT:    store i32 100, i32* [[I]], align 4
7835 // CHECK10-NEXT:    br label [[DOTOMP_FINAL_DONE]]
7836 // CHECK10:       .omp.final.done:
7837 // CHECK10-NEXT:    ret void
7838 //
7839 //
7840 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..3
7841 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
7842 // CHECK10-NEXT:  entry:
7843 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7844 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7845 // CHECK10-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7846 // CHECK10-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7847 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7848 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7849 // CHECK10-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7850 // CHECK10-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7851 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7852 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7853 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
7854 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7855 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7856 // CHECK10-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7857 // CHECK10-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7858 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
7859 // CHECK10-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
7860 // CHECK10-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7861 // CHECK10-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
7862 // CHECK10-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7863 // CHECK10-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
7864 // CHECK10-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
7865 // CHECK10-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
7866 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7867 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7868 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7869 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
7870 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7871 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7872 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
7873 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7874 // CHECK10:       cond.true:
7875 // CHECK10-NEXT:    br label [[COND_END:%.*]]
7876 // CHECK10:       cond.false:
7877 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7878 // CHECK10-NEXT:    br label [[COND_END]]
7879 // CHECK10:       cond.end:
7880 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7881 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7882 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7883 // CHECK10-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
7884 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7885 // CHECK10:       omp.inner.for.cond:
7886 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
7887 // CHECK10-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25
7888 // CHECK10-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7889 // CHECK10-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7890 // CHECK10:       omp.inner.for.body:
7891 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
7892 // CHECK10-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7893 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7894 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !25
7895 // CHECK10-NEXT:    invoke void @_Z3foov()
7896 // CHECK10-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !25
7897 // CHECK10:       invoke.cont:
7898 // CHECK10-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7899 // CHECK10:       omp.body.continue:
7900 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7901 // CHECK10:       omp.inner.for.inc:
7902 // CHECK10-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
7903 // CHECK10-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
7904 // CHECK10-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
7905 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
7906 // CHECK10:       omp.inner.for.end:
7907 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7908 // CHECK10:       omp.loop.exit:
7909 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
7910 // CHECK10-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7911 // CHECK10-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
7912 // CHECK10-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7913 // CHECK10:       .omp.final.then:
7914 // CHECK10-NEXT:    store i32 100, i32* [[I]], align 4
7915 // CHECK10-NEXT:    br label [[DOTOMP_FINAL_DONE]]
7916 // CHECK10:       .omp.final.done:
7917 // CHECK10-NEXT:    ret void
7918 // CHECK10:       terminate.lpad:
7919 // CHECK10-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
7920 // CHECK10-NEXT:    catch i8* null
7921 // CHECK10-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
7922 // CHECK10-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !25
7923 // CHECK10-NEXT:    unreachable
7924 //
7925 //
7926 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv
7927 // CHECK10-SAME: () #[[ATTR7:[0-9]+]] comdat {
7928 // CHECK10-NEXT:  entry:
7929 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7930 // CHECK10-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
7931 // CHECK10-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
7932 // CHECK10-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
7933 // CHECK10-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
7934 // CHECK10-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
7935 // CHECK10:       omp_offload.failed:
7936 // CHECK10-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR6]]
7937 // CHECK10-NEXT:    br label [[OMP_OFFLOAD_CONT]]
7938 // CHECK10:       omp_offload.cont:
7939 // CHECK10-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
7940 // CHECK10-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
7941 // CHECK10-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
7942 // CHECK10-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
7943 // CHECK10:       omp_offload.failed2:
7944 // CHECK10-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR6]]
7945 // CHECK10-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
7946 // CHECK10:       omp_offload.cont3:
7947 // CHECK10-NEXT:    ret i32 0
7948 //
7949 //
7950 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv
7951 // CHECK10-SAME: () #[[ATTR7]] comdat {
7952 // CHECK10-NEXT:  entry:
7953 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7954 // CHECK10-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
7955 // CHECK10-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
7956 // CHECK10-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
7957 // CHECK10-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
7958 // CHECK10-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
7959 // CHECK10:       omp_offload.failed:
7960 // CHECK10-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR6]]
7961 // CHECK10-NEXT:    br label [[OMP_OFFLOAD_CONT]]
7962 // CHECK10:       omp_offload.cont:
7963 // CHECK10-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
7964 // CHECK10-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
7965 // CHECK10-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
7966 // CHECK10-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
7967 // CHECK10:       omp_offload.failed2:
7968 // CHECK10-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR6]]
7969 // CHECK10-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
7970 // CHECK10:       omp_offload.cont3:
7971 // CHECK10-NEXT:    ret i32 0
7972 //
7973 //
7974 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SD1Ev
7975 // CHECK10-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 {
7976 // CHECK10-NEXT:  entry:
7977 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
7978 // CHECK10-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
7979 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
7980 // CHECK10-NEXT:    call void @_ZN1SD2Ev(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR6]]
7981 // CHECK10-NEXT:    ret void
7982 //
7983 //
7984 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SC2El
7985 // CHECK10-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
7986 // CHECK10-NEXT:  entry:
7987 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
7988 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
7989 // CHECK10-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
7990 // CHECK10-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
7991 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
7992 // CHECK10-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
7993 // CHECK10-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
7994 // CHECK10-NEXT:    store i64 [[TMP0]], i64* [[A2]], align 8
7995 // CHECK10-NEXT:    ret void
7996 //
7997 //
7998 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SD2Ev
7999 // CHECK10-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
8000 // CHECK10-NEXT:  entry:
8001 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
8002 // CHECK10-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
8003 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
8004 // CHECK10-NEXT:    ret void
8005 //
8006 //
8007 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52
8008 // CHECK10-SAME: () #[[ATTR3]] {
8009 // CHECK10-NEXT:  entry:
8010 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
8011 // CHECK10-NEXT:    ret void
8012 //
8013 //
8014 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..4
8015 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
8016 // CHECK10-NEXT:  entry:
8017 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8018 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8019 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8020 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8021 // CHECK10-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8022 // CHECK10-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8023 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8024 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8025 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
8026 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8027 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8028 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8029 // CHECK10-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
8030 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8031 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8032 // CHECK10-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8033 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
8034 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8035 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8036 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
8037 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8038 // CHECK10:       cond.true:
8039 // CHECK10-NEXT:    br label [[COND_END:%.*]]
8040 // CHECK10:       cond.false:
8041 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8042 // CHECK10-NEXT:    br label [[COND_END]]
8043 // CHECK10:       cond.end:
8044 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
8045 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8046 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8047 // CHECK10-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
8048 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8049 // CHECK10:       omp.inner.for.cond:
8050 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
8051 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
8052 // CHECK10-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
8053 // CHECK10-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8054 // CHECK10:       omp.inner.for.body:
8055 // CHECK10-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5), !llvm.access.group !28
8056 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28
8057 // CHECK10-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
8058 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
8059 // CHECK10-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
8060 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !28
8061 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8062 // CHECK10:       omp.inner.for.inc:
8063 // CHECK10-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
8064 // CHECK10-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28
8065 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
8066 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
8067 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]
8068 // CHECK10:       omp.inner.for.end:
8069 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8070 // CHECK10:       omp.loop.exit:
8071 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
8072 // CHECK10-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8073 // CHECK10-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
8074 // CHECK10-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8075 // CHECK10:       .omp.final.then:
8076 // CHECK10-NEXT:    store i32 100, i32* [[I]], align 4
8077 // CHECK10-NEXT:    br label [[DOTOMP_FINAL_DONE]]
8078 // CHECK10:       .omp.final.done:
8079 // CHECK10-NEXT:    ret void
8080 //
8081 //
8082 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..5
8083 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
8084 // CHECK10-NEXT:  entry:
8085 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8086 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8087 // CHECK10-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
8088 // CHECK10-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
8089 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8090 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8091 // CHECK10-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8092 // CHECK10-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8093 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8094 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8095 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
8096 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8097 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8098 // CHECK10-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8099 // CHECK10-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8100 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
8101 // CHECK10-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
8102 // CHECK10-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8103 // CHECK10-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
8104 // CHECK10-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8105 // CHECK10-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
8106 // CHECK10-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
8107 // CHECK10-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
8108 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8109 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8110 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8111 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
8112 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8113 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8114 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
8115 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8116 // CHECK10:       cond.true:
8117 // CHECK10-NEXT:    br label [[COND_END:%.*]]
8118 // CHECK10:       cond.false:
8119 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8120 // CHECK10-NEXT:    br label [[COND_END]]
8121 // CHECK10:       cond.end:
8122 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
8123 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8124 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8125 // CHECK10-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
8126 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8127 // CHECK10:       omp.inner.for.cond:
8128 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
8129 // CHECK10-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !31
8130 // CHECK10-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
8131 // CHECK10-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8132 // CHECK10:       omp.inner.for.body:
8133 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
8134 // CHECK10-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
8135 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8136 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !31
8137 // CHECK10-NEXT:    invoke void @_Z3foov()
8138 // CHECK10-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !31
8139 // CHECK10:       invoke.cont:
8140 // CHECK10-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8141 // CHECK10:       omp.body.continue:
8142 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8143 // CHECK10:       omp.inner.for.inc:
8144 // CHECK10-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
8145 // CHECK10-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
8146 // CHECK10-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
8147 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]
8148 // CHECK10:       omp.inner.for.end:
8149 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8150 // CHECK10:       omp.loop.exit:
8151 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
8152 // CHECK10-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8153 // CHECK10-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
8154 // CHECK10-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8155 // CHECK10:       .omp.final.then:
8156 // CHECK10-NEXT:    store i32 100, i32* [[I]], align 4
8157 // CHECK10-NEXT:    br label [[DOTOMP_FINAL_DONE]]
8158 // CHECK10:       .omp.final.done:
8159 // CHECK10-NEXT:    ret void
8160 // CHECK10:       terminate.lpad:
8161 // CHECK10-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
8162 // CHECK10-NEXT:    catch i8* null
8163 // CHECK10-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
8164 // CHECK10-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !31
8165 // CHECK10-NEXT:    unreachable
8166 //
8167 //
8168 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57
8169 // CHECK10-SAME: () #[[ATTR3]] {
8170 // CHECK10-NEXT:  entry:
8171 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
8172 // CHECK10-NEXT:    ret void
8173 //
8174 //
8175 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..6
8176 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
8177 // CHECK10-NEXT:  entry:
8178 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8179 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8180 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8181 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8182 // CHECK10-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8183 // CHECK10-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8184 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8185 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8186 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
8187 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8188 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8189 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8190 // CHECK10-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
8191 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8192 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8193 // CHECK10-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8194 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
8195 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8196 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8197 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
8198 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8199 // CHECK10:       cond.true:
8200 // CHECK10-NEXT:    br label [[COND_END:%.*]]
8201 // CHECK10:       cond.false:
8202 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8203 // CHECK10-NEXT:    br label [[COND_END]]
8204 // CHECK10:       cond.end:
8205 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
8206 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8207 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8208 // CHECK10-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
8209 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8210 // CHECK10:       omp.inner.for.cond:
8211 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
8212 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !34
8213 // CHECK10-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
8214 // CHECK10-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8215 // CHECK10:       omp.inner.for.body:
8216 // CHECK10-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23), !llvm.access.group !34
8217 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !34
8218 // CHECK10-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
8219 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !34
8220 // CHECK10-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
8221 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !34
8222 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8223 // CHECK10:       omp.inner.for.inc:
8224 // CHECK10-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
8225 // CHECK10-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !34
8226 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
8227 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
8228 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]]
8229 // CHECK10:       omp.inner.for.end:
8230 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8231 // CHECK10:       omp.loop.exit:
8232 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
8233 // CHECK10-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8234 // CHECK10-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
8235 // CHECK10-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8236 // CHECK10:       .omp.final.then:
8237 // CHECK10-NEXT:    store i32 100, i32* [[I]], align 4
8238 // CHECK10-NEXT:    br label [[DOTOMP_FINAL_DONE]]
8239 // CHECK10:       .omp.final.done:
8240 // CHECK10-NEXT:    ret void
8241 //
8242 //
8243 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..7
8244 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
8245 // CHECK10-NEXT:  entry:
8246 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8247 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8248 // CHECK10-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
8249 // CHECK10-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
8250 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8251 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8252 // CHECK10-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8253 // CHECK10-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8254 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8255 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8256 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
8257 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8258 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8259 // CHECK10-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8260 // CHECK10-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8261 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
8262 // CHECK10-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
8263 // CHECK10-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8264 // CHECK10-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
8265 // CHECK10-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8266 // CHECK10-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
8267 // CHECK10-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
8268 // CHECK10-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
8269 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8270 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8271 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8272 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
8273 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8274 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8275 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
8276 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8277 // CHECK10:       cond.true:
8278 // CHECK10-NEXT:    br label [[COND_END:%.*]]
8279 // CHECK10:       cond.false:
8280 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8281 // CHECK10-NEXT:    br label [[COND_END]]
8282 // CHECK10:       cond.end:
8283 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
8284 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8285 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8286 // CHECK10-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
8287 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8288 // CHECK10:       omp.inner.for.cond:
8289 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
8290 // CHECK10-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !37
8291 // CHECK10-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
8292 // CHECK10-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8293 // CHECK10:       omp.inner.for.body:
8294 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
8295 // CHECK10-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
8296 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8297 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !37
8298 // CHECK10-NEXT:    invoke void @_Z3foov()
8299 // CHECK10-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !37
8300 // CHECK10:       invoke.cont:
8301 // CHECK10-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8302 // CHECK10:       omp.body.continue:
8303 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8304 // CHECK10:       omp.inner.for.inc:
8305 // CHECK10-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
8306 // CHECK10-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
8307 // CHECK10-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
8308 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP38:![0-9]+]]
8309 // CHECK10:       omp.inner.for.end:
8310 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8311 // CHECK10:       omp.loop.exit:
8312 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
8313 // CHECK10-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8314 // CHECK10-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
8315 // CHECK10-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8316 // CHECK10:       .omp.final.then:
8317 // CHECK10-NEXT:    store i32 100, i32* [[I]], align 4
8318 // CHECK10-NEXT:    br label [[DOTOMP_FINAL_DONE]]
8319 // CHECK10:       .omp.final.done:
8320 // CHECK10-NEXT:    ret void
8321 // CHECK10:       terminate.lpad:
8322 // CHECK10-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
8323 // CHECK10-NEXT:    catch i8* null
8324 // CHECK10-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
8325 // CHECK10-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !37
8326 // CHECK10-NEXT:    unreachable
8327 //
8328 //
8329 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52
8330 // CHECK10-SAME: () #[[ATTR3]] {
8331 // CHECK10-NEXT:  entry:
8332 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*))
8333 // CHECK10-NEXT:    ret void
8334 //
8335 //
8336 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..8
8337 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
8338 // CHECK10-NEXT:  entry:
8339 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8340 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8341 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8342 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8343 // CHECK10-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8344 // CHECK10-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8345 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8346 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8347 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
8348 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8349 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8350 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8351 // CHECK10-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
8352 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8353 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8354 // CHECK10-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8355 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
8356 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8357 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8358 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
8359 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8360 // CHECK10:       cond.true:
8361 // CHECK10-NEXT:    br label [[COND_END:%.*]]
8362 // CHECK10:       cond.false:
8363 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8364 // CHECK10-NEXT:    br label [[COND_END]]
8365 // CHECK10:       cond.end:
8366 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
8367 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8368 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8369 // CHECK10-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
8370 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8371 // CHECK10:       omp.inner.for.cond:
8372 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40
8373 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !40
8374 // CHECK10-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
8375 // CHECK10-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8376 // CHECK10:       omp.inner.for.body:
8377 // CHECK10-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1), !llvm.access.group !40
8378 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !40
8379 // CHECK10-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
8380 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !40
8381 // CHECK10-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
8382 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !40
8383 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8384 // CHECK10:       omp.inner.for.inc:
8385 // CHECK10-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40
8386 // CHECK10-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !40
8387 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
8388 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40
8389 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP41:![0-9]+]]
8390 // CHECK10:       omp.inner.for.end:
8391 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8392 // CHECK10:       omp.loop.exit:
8393 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
8394 // CHECK10-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8395 // CHECK10-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
8396 // CHECK10-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8397 // CHECK10:       .omp.final.then:
8398 // CHECK10-NEXT:    store i32 100, i32* [[I]], align 4
8399 // CHECK10-NEXT:    br label [[DOTOMP_FINAL_DONE]]
8400 // CHECK10:       .omp.final.done:
8401 // CHECK10-NEXT:    ret void
8402 //
8403 //
8404 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..9
8405 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
8406 // CHECK10-NEXT:  entry:
8407 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8408 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8409 // CHECK10-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
8410 // CHECK10-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
8411 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8412 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8413 // CHECK10-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8414 // CHECK10-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8415 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8416 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8417 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
8418 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8419 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8420 // CHECK10-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8421 // CHECK10-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8422 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
8423 // CHECK10-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
8424 // CHECK10-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8425 // CHECK10-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
8426 // CHECK10-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8427 // CHECK10-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
8428 // CHECK10-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
8429 // CHECK10-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
8430 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8431 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8432 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8433 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
8434 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8435 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8436 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
8437 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8438 // CHECK10:       cond.true:
8439 // CHECK10-NEXT:    br label [[COND_END:%.*]]
8440 // CHECK10:       cond.false:
8441 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8442 // CHECK10-NEXT:    br label [[COND_END]]
8443 // CHECK10:       cond.end:
8444 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
8445 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8446 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8447 // CHECK10-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
8448 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8449 // CHECK10:       omp.inner.for.cond:
8450 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
8451 // CHECK10-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !43
8452 // CHECK10-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
8453 // CHECK10-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8454 // CHECK10:       omp.inner.for.body:
8455 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
8456 // CHECK10-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
8457 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8458 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !43
8459 // CHECK10-NEXT:    invoke void @_Z3foov()
8460 // CHECK10-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !43
8461 // CHECK10:       invoke.cont:
8462 // CHECK10-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8463 // CHECK10:       omp.body.continue:
8464 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8465 // CHECK10:       omp.inner.for.inc:
8466 // CHECK10-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
8467 // CHECK10-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
8468 // CHECK10-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
8469 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]]
8470 // CHECK10:       omp.inner.for.end:
8471 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8472 // CHECK10:       omp.loop.exit:
8473 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
8474 // CHECK10-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8475 // CHECK10-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
8476 // CHECK10-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8477 // CHECK10:       .omp.final.then:
8478 // CHECK10-NEXT:    store i32 100, i32* [[I]], align 4
8479 // CHECK10-NEXT:    br label [[DOTOMP_FINAL_DONE]]
8480 // CHECK10:       .omp.final.done:
8481 // CHECK10-NEXT:    ret void
8482 // CHECK10:       terminate.lpad:
8483 // CHECK10-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
8484 // CHECK10-NEXT:    catch i8* null
8485 // CHECK10-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
8486 // CHECK10-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !43
8487 // CHECK10-NEXT:    unreachable
8488 //
8489 //
8490 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57
8491 // CHECK10-SAME: () #[[ATTR3]] {
8492 // CHECK10-NEXT:  entry:
8493 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
8494 // CHECK10-NEXT:    ret void
8495 //
8496 //
8497 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..10
8498 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
8499 // CHECK10-NEXT:  entry:
8500 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8501 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8502 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8503 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8504 // CHECK10-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8505 // CHECK10-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8506 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8507 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8508 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
8509 // CHECK10-NEXT:    [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8
8510 // CHECK10-NEXT:    [[EXN_SLOT:%.*]] = alloca i8*, align 8
8511 // CHECK10-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
8512 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8513 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8514 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8515 // CHECK10-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
8516 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8517 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8518 // CHECK10-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8519 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
8520 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8521 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8522 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
8523 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8524 // CHECK10:       cond.true:
8525 // CHECK10-NEXT:    br label [[COND_END:%.*]]
8526 // CHECK10:       cond.false:
8527 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8528 // CHECK10-NEXT:    br label [[COND_END]]
8529 // CHECK10:       cond.end:
8530 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
8531 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8532 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8533 // CHECK10-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
8534 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8535 // CHECK10:       omp.inner.for.cond:
8536 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
8537 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !46
8538 // CHECK10-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
8539 // CHECK10-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8540 // CHECK10:       omp.inner.for.body:
8541 // CHECK10-NEXT:    invoke void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 23)
8542 // CHECK10-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !46
8543 // CHECK10:       invoke.cont:
8544 // CHECK10-NEXT:    [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]])
8545 // CHECK10-NEXT:    to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD:%.*]], !llvm.access.group !46
8546 // CHECK10:       invoke.cont2:
8547 // CHECK10-NEXT:    [[TMP7:%.*]] = sext i8 [[CALL]] to i32
8548 // CHECK10-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]]), !llvm.access.group !46
8549 // CHECK10-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]], !llvm.access.group !46
8550 // CHECK10-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !46
8551 // CHECK10-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
8552 // CHECK10-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !46
8553 // CHECK10-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
8554 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]), !llvm.access.group !46
8555 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8556 // CHECK10:       omp.inner.for.inc:
8557 // CHECK10-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
8558 // CHECK10-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !46
8559 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
8560 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
8561 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP47:![0-9]+]]
8562 // CHECK10:       lpad:
8563 // CHECK10-NEXT:    [[TMP14:%.*]] = landingpad { i8*, i32 }
8564 // CHECK10-NEXT:    catch i8* null
8565 // CHECK10-NEXT:    [[TMP15:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 0
8566 // CHECK10-NEXT:    store i8* [[TMP15]], i8** [[EXN_SLOT]], align 8, !llvm.access.group !46
8567 // CHECK10-NEXT:    [[TMP16:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 1
8568 // CHECK10-NEXT:    store i32 [[TMP16]], i32* [[EHSELECTOR_SLOT]], align 4, !llvm.access.group !46
8569 // CHECK10-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]], !llvm.access.group !46
8570 // CHECK10-NEXT:    br label [[TERMINATE_HANDLER:%.*]]
8571 // CHECK10:       omp.inner.for.end:
8572 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8573 // CHECK10:       omp.loop.exit:
8574 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
8575 // CHECK10-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8576 // CHECK10-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
8577 // CHECK10-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8578 // CHECK10:       .omp.final.then:
8579 // CHECK10-NEXT:    store i32 100, i32* [[I]], align 4
8580 // CHECK10-NEXT:    br label [[DOTOMP_FINAL_DONE]]
8581 // CHECK10:       .omp.final.done:
8582 // CHECK10-NEXT:    ret void
8583 // CHECK10:       terminate.lpad:
8584 // CHECK10-NEXT:    [[TMP19:%.*]] = landingpad { i8*, i32 }
8585 // CHECK10-NEXT:    catch i8* null
8586 // CHECK10-NEXT:    [[TMP20:%.*]] = extractvalue { i8*, i32 } [[TMP19]], 0
8587 // CHECK10-NEXT:    call void @__clang_call_terminate(i8* [[TMP20]]) #[[ATTR10]], !llvm.access.group !46
8588 // CHECK10-NEXT:    unreachable
8589 // CHECK10:       terminate.handler:
8590 // CHECK10-NEXT:    [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8, !llvm.access.group !46
8591 // CHECK10-NEXT:    call void @__clang_call_terminate(i8* [[EXN]]) #[[ATTR10]], !llvm.access.group !46
8592 // CHECK10-NEXT:    unreachable
8593 //
8594 //
8595 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..11
8596 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
8597 // CHECK10-NEXT:  entry:
8598 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8599 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8600 // CHECK10-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
8601 // CHECK10-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
8602 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8603 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8604 // CHECK10-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8605 // CHECK10-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8606 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8607 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8608 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
8609 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8610 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8611 // CHECK10-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8612 // CHECK10-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8613 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
8614 // CHECK10-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
8615 // CHECK10-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8616 // CHECK10-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
8617 // CHECK10-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8618 // CHECK10-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
8619 // CHECK10-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
8620 // CHECK10-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
8621 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8622 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8623 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8624 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
8625 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8626 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8627 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
8628 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8629 // CHECK10:       cond.true:
8630 // CHECK10-NEXT:    br label [[COND_END:%.*]]
8631 // CHECK10:       cond.false:
8632 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8633 // CHECK10-NEXT:    br label [[COND_END]]
8634 // CHECK10:       cond.end:
8635 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
8636 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8637 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8638 // CHECK10-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
8639 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8640 // CHECK10:       omp.inner.for.cond:
8641 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
8642 // CHECK10-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !49
8643 // CHECK10-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
8644 // CHECK10-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8645 // CHECK10:       omp.inner.for.body:
8646 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
8647 // CHECK10-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
8648 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8649 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !49
8650 // CHECK10-NEXT:    invoke void @_Z3foov()
8651 // CHECK10-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !49
8652 // CHECK10:       invoke.cont:
8653 // CHECK10-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8654 // CHECK10:       omp.body.continue:
8655 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8656 // CHECK10:       omp.inner.for.inc:
8657 // CHECK10-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
8658 // CHECK10-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
8659 // CHECK10-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
8660 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP50:![0-9]+]]
8661 // CHECK10:       omp.inner.for.end:
8662 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8663 // CHECK10:       omp.loop.exit:
8664 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
8665 // CHECK10-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8666 // CHECK10-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
8667 // CHECK10-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8668 // CHECK10:       .omp.final.then:
8669 // CHECK10-NEXT:    store i32 100, i32* [[I]], align 4
8670 // CHECK10-NEXT:    br label [[DOTOMP_FINAL_DONE]]
8671 // CHECK10:       .omp.final.done:
8672 // CHECK10-NEXT:    ret void
8673 // CHECK10:       terminate.lpad:
8674 // CHECK10-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
8675 // CHECK10-NEXT:    catch i8* null
8676 // CHECK10-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
8677 // CHECK10-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !49
8678 // CHECK10-NEXT:    unreachable
8679 //
8680 //
8681 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
8682 // CHECK10-SAME: () #[[ATTR9:[0-9]+]] {
8683 // CHECK10-NEXT:  entry:
8684 // CHECK10-NEXT:    call void @__tgt_register_requires(i64 1)
8685 // CHECK10-NEXT:    ret void
8686 //
8687 //
8688 // CHECK11-LABEL: define {{[^@]+}}@main
8689 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
8690 // CHECK11-NEXT:  entry:
8691 // CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
8692 // CHECK11-NEXT:    [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
8693 // CHECK11-NEXT:    [[A:%.*]] = alloca i8, align 1
8694 // CHECK11-NEXT:    [[EXN_SLOT:%.*]] = alloca i8*, align 8
8695 // CHECK11-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
8696 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8697 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8698 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8699 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8700 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
8701 // CHECK11-NEXT:    [[_TMP3:%.*]] = alloca i32, align 4
8702 // CHECK11-NEXT:    [[DOTOMP_LB4:%.*]] = alloca i32, align 4
8703 // CHECK11-NEXT:    [[DOTOMP_UB5:%.*]] = alloca i32, align 4
8704 // CHECK11-NEXT:    [[DOTOMP_IV6:%.*]] = alloca i32, align 4
8705 // CHECK11-NEXT:    [[I7:%.*]] = alloca i32, align 4
8706 // CHECK11-NEXT:    store i32 0, i32* [[RETVAL]], align 4
8707 // CHECK11-NEXT:    call void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[S]], i64 0)
8708 // CHECK11-NEXT:    [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[S]])
8709 // CHECK11-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
8710 // CHECK11:       invoke.cont:
8711 // CHECK11-NEXT:    store i8 [[CALL]], i8* [[A]], align 1
8712 // CHECK11-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
8713 // CHECK11-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
8714 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8715 // CHECK11-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
8716 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8717 // CHECK11:       omp.inner.for.cond:
8718 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
8719 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
8720 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
8721 // CHECK11-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8722 // CHECK11:       omp.inner.for.body:
8723 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
8724 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
8725 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8726 // CHECK11-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6
8727 // CHECK11-NEXT:    invoke void @_Z3foov()
8728 // CHECK11-NEXT:    to label [[INVOKE_CONT1:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !6
8729 // CHECK11:       invoke.cont1:
8730 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8731 // CHECK11:       omp.body.continue:
8732 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8733 // CHECK11:       omp.inner.for.inc:
8734 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
8735 // CHECK11-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP4]], 1
8736 // CHECK11-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
8737 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
8738 // CHECK11:       lpad:
8739 // CHECK11-NEXT:    [[TMP5:%.*]] = landingpad { i8*, i32 }
8740 // CHECK11-NEXT:    cleanup
8741 // CHECK11-NEXT:    [[TMP6:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 0
8742 // CHECK11-NEXT:    store i8* [[TMP6]], i8** [[EXN_SLOT]], align 8
8743 // CHECK11-NEXT:    [[TMP7:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 1
8744 // CHECK11-NEXT:    store i32 [[TMP7]], i32* [[EHSELECTOR_SLOT]], align 4
8745 // CHECK11-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR7:[0-9]+]]
8746 // CHECK11-NEXT:    br label [[EH_RESUME:%.*]]
8747 // CHECK11:       omp.inner.for.end:
8748 // CHECK11-NEXT:    store i32 100, i32* [[I]], align 4
8749 // CHECK11-NEXT:    store i32 0, i32* [[DOTOMP_LB4]], align 4
8750 // CHECK11-NEXT:    store i32 99, i32* [[DOTOMP_UB5]], align 4
8751 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB4]], align 4
8752 // CHECK11-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV6]], align 4
8753 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND8:%.*]]
8754 // CHECK11:       omp.inner.for.cond8:
8755 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !10
8756 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB5]], align 4, !llvm.access.group !10
8757 // CHECK11-NEXT:    [[CMP9:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
8758 // CHECK11-NEXT:    br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END17:%.*]]
8759 // CHECK11:       omp.inner.for.body10:
8760 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !10
8761 // CHECK11-NEXT:    [[MUL11:%.*]] = mul nsw i32 [[TMP11]], 1
8762 // CHECK11-NEXT:    [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
8763 // CHECK11-NEXT:    store i32 [[ADD12]], i32* [[I7]], align 4, !llvm.access.group !10
8764 // CHECK11-NEXT:    invoke void @_Z3foov()
8765 // CHECK11-NEXT:    to label [[INVOKE_CONT13:%.*]] unwind label [[TERMINATE_LPAD]], !llvm.access.group !10
8766 // CHECK11:       invoke.cont13:
8767 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE14:%.*]]
8768 // CHECK11:       omp.body.continue14:
8769 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC15:%.*]]
8770 // CHECK11:       omp.inner.for.inc15:
8771 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !10
8772 // CHECK11-NEXT:    [[ADD16:%.*]] = add nsw i32 [[TMP12]], 1
8773 // CHECK11-NEXT:    store i32 [[ADD16]], i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !10
8774 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP11:![0-9]+]]
8775 // CHECK11:       omp.inner.for.end17:
8776 // CHECK11-NEXT:    store i32 100, i32* [[I7]], align 4
8777 // CHECK11-NEXT:    [[TMP13:%.*]] = load i8, i8* [[A]], align 1
8778 // CHECK11-NEXT:    [[CONV:%.*]] = sext i8 [[TMP13]] to i32
8779 // CHECK11-NEXT:    [[CALL19:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv()
8780 // CHECK11-NEXT:    to label [[INVOKE_CONT18:%.*]] unwind label [[LPAD]]
8781 // CHECK11:       invoke.cont18:
8782 // CHECK11-NEXT:    [[ADD20:%.*]] = add nsw i32 [[CONV]], [[CALL19]]
8783 // CHECK11-NEXT:    [[CALL22:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv()
8784 // CHECK11-NEXT:    to label [[INVOKE_CONT21:%.*]] unwind label [[LPAD]]
8785 // CHECK11:       invoke.cont21:
8786 // CHECK11-NEXT:    [[ADD23:%.*]] = add nsw i32 [[ADD20]], [[CALL22]]
8787 // CHECK11-NEXT:    store i32 [[ADD23]], i32* [[RETVAL]], align 4
8788 // CHECK11-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR7]]
8789 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4
8790 // CHECK11-NEXT:    ret i32 [[TMP14]]
8791 // CHECK11:       eh.resume:
8792 // CHECK11-NEXT:    [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8
8793 // CHECK11-NEXT:    [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
8794 // CHECK11-NEXT:    [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
8795 // CHECK11-NEXT:    [[LPAD_VAL24:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
8796 // CHECK11-NEXT:    resume { i8*, i32 } [[LPAD_VAL24]]
8797 // CHECK11:       terminate.lpad:
8798 // CHECK11-NEXT:    [[TMP15:%.*]] = landingpad { i8*, i32 }
8799 // CHECK11-NEXT:    catch i8* null
8800 // CHECK11-NEXT:    [[TMP16:%.*]] = extractvalue { i8*, i32 } [[TMP15]], 0
8801 // CHECK11-NEXT:    call void @__clang_call_terminate(i8* [[TMP16]]) #[[ATTR8:[0-9]+]], !llvm.access.group !6
8802 // CHECK11-NEXT:    unreachable
8803 //
8804 //
8805 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SC1El
8806 // CHECK11-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
8807 // CHECK11-NEXT:  entry:
8808 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
8809 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
8810 // CHECK11-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
8811 // CHECK11-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
8812 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
8813 // CHECK11-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
8814 // CHECK11-NEXT:    call void @_ZN1SC2El(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]], i64 [[TMP0]])
8815 // CHECK11-NEXT:    ret void
8816 //
8817 //
8818 // CHECK11-LABEL: define {{[^@]+}}@_ZN1ScvcEv
8819 // CHECK11-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 {
8820 // CHECK11-NEXT:  entry:
8821 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
8822 // CHECK11-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
8823 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
8824 // CHECK11-NEXT:    call void @_Z8mayThrowv()
8825 // CHECK11-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
8826 // CHECK11-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A]], align 8
8827 // CHECK11-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i8
8828 // CHECK11-NEXT:    ret i8 [[CONV]]
8829 //
8830 //
8831 // CHECK11-LABEL: define {{[^@]+}}@__clang_call_terminate
8832 // CHECK11-SAME: (i8* [[TMP0:%.*]]) #[[ATTR4:[0-9]+]] comdat {
8833 // CHECK11-NEXT:    [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR7]]
8834 // CHECK11-NEXT:    call void @_ZSt9terminatev() #[[ATTR8]]
8835 // CHECK11-NEXT:    unreachable
8836 //
8837 //
8838 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv
8839 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
8840 // CHECK11-NEXT:  entry:
8841 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8842 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8843 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8844 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8845 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
8846 // CHECK11-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
8847 // CHECK11-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
8848 // CHECK11-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
8849 // CHECK11-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
8850 // CHECK11-NEXT:    [[I6:%.*]] = alloca i32, align 4
8851 // CHECK11-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
8852 // CHECK11-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
8853 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8854 // CHECK11-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
8855 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8856 // CHECK11:       omp.inner.for.cond:
8857 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
8858 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
8859 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
8860 // CHECK11-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8861 // CHECK11:       omp.inner.for.body:
8862 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
8863 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
8864 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8865 // CHECK11-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
8866 // CHECK11-NEXT:    invoke void @_Z3foov()
8867 // CHECK11-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !13
8868 // CHECK11:       invoke.cont:
8869 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8870 // CHECK11:       omp.body.continue:
8871 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8872 // CHECK11:       omp.inner.for.inc:
8873 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
8874 // CHECK11-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
8875 // CHECK11-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
8876 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
8877 // CHECK11:       omp.inner.for.end:
8878 // CHECK11-NEXT:    store i32 100, i32* [[I]], align 4
8879 // CHECK11-NEXT:    store i32 0, i32* [[DOTOMP_LB3]], align 4
8880 // CHECK11-NEXT:    store i32 99, i32* [[DOTOMP_UB4]], align 4
8881 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
8882 // CHECK11-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
8883 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
8884 // CHECK11:       omp.inner.for.cond7:
8885 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16
8886 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !16
8887 // CHECK11-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
8888 // CHECK11-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]]
8889 // CHECK11:       omp.inner.for.body9:
8890 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16
8891 // CHECK11-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
8892 // CHECK11-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
8893 // CHECK11-NEXT:    store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !16
8894 // CHECK11-NEXT:    invoke void @_Z3foov()
8895 // CHECK11-NEXT:    to label [[INVOKE_CONT12:%.*]] unwind label [[TERMINATE_LPAD]], !llvm.access.group !16
8896 // CHECK11:       invoke.cont12:
8897 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE13:%.*]]
8898 // CHECK11:       omp.body.continue13:
8899 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC14:%.*]]
8900 // CHECK11:       omp.inner.for.inc14:
8901 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16
8902 // CHECK11-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP9]], 1
8903 // CHECK11-NEXT:    store i32 [[ADD15]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16
8904 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP17:![0-9]+]]
8905 // CHECK11:       omp.inner.for.end16:
8906 // CHECK11-NEXT:    store i32 100, i32* [[I6]], align 4
8907 // CHECK11-NEXT:    ret i32 0
8908 // CHECK11:       terminate.lpad:
8909 // CHECK11-NEXT:    [[TMP10:%.*]] = landingpad { i8*, i32 }
8910 // CHECK11-NEXT:    catch i8* null
8911 // CHECK11-NEXT:    [[TMP11:%.*]] = extractvalue { i8*, i32 } [[TMP10]], 0
8912 // CHECK11-NEXT:    call void @__clang_call_terminate(i8* [[TMP11]]) #[[ATTR8]], !llvm.access.group !13
8913 // CHECK11-NEXT:    unreachable
8914 //
8915 //
8916 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv
8917 // CHECK11-SAME: () #[[ATTR5]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
8918 // CHECK11-NEXT:  entry:
8919 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8920 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8921 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8922 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8923 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
8924 // CHECK11-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
8925 // CHECK11-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
8926 // CHECK11-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
8927 // CHECK11-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
8928 // CHECK11-NEXT:    [[I6:%.*]] = alloca i32, align 4
8929 // CHECK11-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
8930 // CHECK11-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
8931 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8932 // CHECK11-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
8933 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8934 // CHECK11:       omp.inner.for.cond:
8935 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
8936 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19
8937 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
8938 // CHECK11-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8939 // CHECK11:       omp.inner.for.body:
8940 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
8941 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
8942 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8943 // CHECK11-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !19
8944 // CHECK11-NEXT:    invoke void @_Z3foov()
8945 // CHECK11-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !19
8946 // CHECK11:       invoke.cont:
8947 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8948 // CHECK11:       omp.body.continue:
8949 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8950 // CHECK11:       omp.inner.for.inc:
8951 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
8952 // CHECK11-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
8953 // CHECK11-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
8954 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
8955 // CHECK11:       omp.inner.for.end:
8956 // CHECK11-NEXT:    store i32 100, i32* [[I]], align 4
8957 // CHECK11-NEXT:    store i32 0, i32* [[DOTOMP_LB3]], align 4
8958 // CHECK11-NEXT:    store i32 99, i32* [[DOTOMP_UB4]], align 4
8959 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
8960 // CHECK11-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
8961 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
8962 // CHECK11:       omp.inner.for.cond7:
8963 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !22
8964 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !22
8965 // CHECK11-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
8966 // CHECK11-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]]
8967 // CHECK11:       omp.inner.for.body9:
8968 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !22
8969 // CHECK11-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
8970 // CHECK11-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
8971 // CHECK11-NEXT:    store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !22
8972 // CHECK11-NEXT:    invoke void @_Z3foov()
8973 // CHECK11-NEXT:    to label [[INVOKE_CONT12:%.*]] unwind label [[TERMINATE_LPAD]], !llvm.access.group !22
8974 // CHECK11:       invoke.cont12:
8975 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE13:%.*]]
8976 // CHECK11:       omp.body.continue13:
8977 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC14:%.*]]
8978 // CHECK11:       omp.inner.for.inc14:
8979 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !22
8980 // CHECK11-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP9]], 1
8981 // CHECK11-NEXT:    store i32 [[ADD15]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !22
8982 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP23:![0-9]+]]
8983 // CHECK11:       omp.inner.for.end16:
8984 // CHECK11-NEXT:    store i32 100, i32* [[I6]], align 4
8985 // CHECK11-NEXT:    ret i32 0
8986 // CHECK11:       terminate.lpad:
8987 // CHECK11-NEXT:    [[TMP10:%.*]] = landingpad { i8*, i32 }
8988 // CHECK11-NEXT:    catch i8* null
8989 // CHECK11-NEXT:    [[TMP11:%.*]] = extractvalue { i8*, i32 } [[TMP10]], 0
8990 // CHECK11-NEXT:    call void @__clang_call_terminate(i8* [[TMP11]]) #[[ATTR8]], !llvm.access.group !19
8991 // CHECK11-NEXT:    unreachable
8992 //
8993 //
8994 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SD1Ev
8995 // CHECK11-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6:[0-9]+]] comdat align 2 {
8996 // CHECK11-NEXT:  entry:
8997 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
8998 // CHECK11-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
8999 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
9000 // CHECK11-NEXT:    call void @_ZN1SD2Ev(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR7]]
9001 // CHECK11-NEXT:    ret void
9002 //
9003 //
9004 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SC2El
9005 // CHECK11-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
9006 // CHECK11-NEXT:  entry:
9007 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
9008 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
9009 // CHECK11-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
9010 // CHECK11-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
9011 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
9012 // CHECK11-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
9013 // CHECK11-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
9014 // CHECK11-NEXT:    store i64 [[TMP0]], i64* [[A2]], align 8
9015 // CHECK11-NEXT:    ret void
9016 //
9017 //
9018 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SD2Ev
9019 // CHECK11-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
9020 // CHECK11-NEXT:  entry:
9021 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
9022 // CHECK11-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
9023 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
9024 // CHECK11-NEXT:    ret void
9025 //
9026 //
9027 // CHECK12-LABEL: define {{[^@]+}}@main
9028 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
9029 // CHECK12-NEXT:  entry:
9030 // CHECK12-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
9031 // CHECK12-NEXT:    [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
9032 // CHECK12-NEXT:    [[A:%.*]] = alloca i8, align 1
9033 // CHECK12-NEXT:    [[EXN_SLOT:%.*]] = alloca i8*, align 8
9034 // CHECK12-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
9035 // CHECK12-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9036 // CHECK12-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
9037 // CHECK12-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
9038 // CHECK12-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9039 // CHECK12-NEXT:    [[I:%.*]] = alloca i32, align 4
9040 // CHECK12-NEXT:    [[_TMP3:%.*]] = alloca i32, align 4
9041 // CHECK12-NEXT:    [[DOTOMP_LB4:%.*]] = alloca i32, align 4
9042 // CHECK12-NEXT:    [[DOTOMP_UB5:%.*]] = alloca i32, align 4
9043 // CHECK12-NEXT:    [[DOTOMP_IV6:%.*]] = alloca i32, align 4
9044 // CHECK12-NEXT:    [[I7:%.*]] = alloca i32, align 4
9045 // CHECK12-NEXT:    store i32 0, i32* [[RETVAL]], align 4
9046 // CHECK12-NEXT:    call void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[S]], i64 0)
9047 // CHECK12-NEXT:    [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[S]])
9048 // CHECK12-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
9049 // CHECK12:       invoke.cont:
9050 // CHECK12-NEXT:    store i8 [[CALL]], i8* [[A]], align 1
9051 // CHECK12-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
9052 // CHECK12-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
9053 // CHECK12-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9054 // CHECK12-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
9055 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9056 // CHECK12:       omp.inner.for.cond:
9057 // CHECK12-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
9058 // CHECK12-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
9059 // CHECK12-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
9060 // CHECK12-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9061 // CHECK12:       omp.inner.for.body:
9062 // CHECK12-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
9063 // CHECK12-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
9064 // CHECK12-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9065 // CHECK12-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6
9066 // CHECK12-NEXT:    invoke void @_Z3foov()
9067 // CHECK12-NEXT:    to label [[INVOKE_CONT1:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !6
9068 // CHECK12:       invoke.cont1:
9069 // CHECK12-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
9070 // CHECK12:       omp.body.continue:
9071 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9072 // CHECK12:       omp.inner.for.inc:
9073 // CHECK12-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
9074 // CHECK12-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP4]], 1
9075 // CHECK12-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
9076 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
9077 // CHECK12:       lpad:
9078 // CHECK12-NEXT:    [[TMP5:%.*]] = landingpad { i8*, i32 }
9079 // CHECK12-NEXT:    cleanup
9080 // CHECK12-NEXT:    [[TMP6:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 0
9081 // CHECK12-NEXT:    store i8* [[TMP6]], i8** [[EXN_SLOT]], align 8
9082 // CHECK12-NEXT:    [[TMP7:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 1
9083 // CHECK12-NEXT:    store i32 [[TMP7]], i32* [[EHSELECTOR_SLOT]], align 4
9084 // CHECK12-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR7:[0-9]+]]
9085 // CHECK12-NEXT:    br label [[EH_RESUME:%.*]]
9086 // CHECK12:       omp.inner.for.end:
9087 // CHECK12-NEXT:    store i32 100, i32* [[I]], align 4
9088 // CHECK12-NEXT:    store i32 0, i32* [[DOTOMP_LB4]], align 4
9089 // CHECK12-NEXT:    store i32 99, i32* [[DOTOMP_UB5]], align 4
9090 // CHECK12-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB4]], align 4
9091 // CHECK12-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV6]], align 4
9092 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND8:%.*]]
9093 // CHECK12:       omp.inner.for.cond8:
9094 // CHECK12-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !10
9095 // CHECK12-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB5]], align 4, !llvm.access.group !10
9096 // CHECK12-NEXT:    [[CMP9:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
9097 // CHECK12-NEXT:    br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END17:%.*]]
9098 // CHECK12:       omp.inner.for.body10:
9099 // CHECK12-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !10
9100 // CHECK12-NEXT:    [[MUL11:%.*]] = mul nsw i32 [[TMP11]], 1
9101 // CHECK12-NEXT:    [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
9102 // CHECK12-NEXT:    store i32 [[ADD12]], i32* [[I7]], align 4, !llvm.access.group !10
9103 // CHECK12-NEXT:    invoke void @_Z3foov()
9104 // CHECK12-NEXT:    to label [[INVOKE_CONT13:%.*]] unwind label [[TERMINATE_LPAD]], !llvm.access.group !10
9105 // CHECK12:       invoke.cont13:
9106 // CHECK12-NEXT:    br label [[OMP_BODY_CONTINUE14:%.*]]
9107 // CHECK12:       omp.body.continue14:
9108 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_INC15:%.*]]
9109 // CHECK12:       omp.inner.for.inc15:
9110 // CHECK12-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !10
9111 // CHECK12-NEXT:    [[ADD16:%.*]] = add nsw i32 [[TMP12]], 1
9112 // CHECK12-NEXT:    store i32 [[ADD16]], i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !10
9113 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP11:![0-9]+]]
9114 // CHECK12:       omp.inner.for.end17:
9115 // CHECK12-NEXT:    store i32 100, i32* [[I7]], align 4
9116 // CHECK12-NEXT:    [[TMP13:%.*]] = load i8, i8* [[A]], align 1
9117 // CHECK12-NEXT:    [[CONV:%.*]] = sext i8 [[TMP13]] to i32
9118 // CHECK12-NEXT:    [[CALL19:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv()
9119 // CHECK12-NEXT:    to label [[INVOKE_CONT18:%.*]] unwind label [[LPAD]]
9120 // CHECK12:       invoke.cont18:
9121 // CHECK12-NEXT:    [[ADD20:%.*]] = add nsw i32 [[CONV]], [[CALL19]]
9122 // CHECK12-NEXT:    [[CALL22:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv()
9123 // CHECK12-NEXT:    to label [[INVOKE_CONT21:%.*]] unwind label [[LPAD]]
9124 // CHECK12:       invoke.cont21:
9125 // CHECK12-NEXT:    [[ADD23:%.*]] = add nsw i32 [[ADD20]], [[CALL22]]
9126 // CHECK12-NEXT:    store i32 [[ADD23]], i32* [[RETVAL]], align 4
9127 // CHECK12-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR7]]
9128 // CHECK12-NEXT:    [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4
9129 // CHECK12-NEXT:    ret i32 [[TMP14]]
9130 // CHECK12:       eh.resume:
9131 // CHECK12-NEXT:    [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8
9132 // CHECK12-NEXT:    [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
9133 // CHECK12-NEXT:    [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
9134 // CHECK12-NEXT:    [[LPAD_VAL24:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
9135 // CHECK12-NEXT:    resume { i8*, i32 } [[LPAD_VAL24]]
9136 // CHECK12:       terminate.lpad:
9137 // CHECK12-NEXT:    [[TMP15:%.*]] = landingpad { i8*, i32 }
9138 // CHECK12-NEXT:    catch i8* null
9139 // CHECK12-NEXT:    [[TMP16:%.*]] = extractvalue { i8*, i32 } [[TMP15]], 0
9140 // CHECK12-NEXT:    call void @__clang_call_terminate(i8* [[TMP16]]) #[[ATTR8:[0-9]+]], !llvm.access.group !6
9141 // CHECK12-NEXT:    unreachable
9142 //
9143 //
9144 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SC1El
9145 // CHECK12-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
9146 // CHECK12-NEXT:  entry:
9147 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
9148 // CHECK12-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
9149 // CHECK12-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
9150 // CHECK12-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
9151 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
9152 // CHECK12-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
9153 // CHECK12-NEXT:    call void @_ZN1SC2El(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]], i64 [[TMP0]])
9154 // CHECK12-NEXT:    ret void
9155 //
9156 //
9157 // CHECK12-LABEL: define {{[^@]+}}@_ZN1ScvcEv
9158 // CHECK12-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 {
9159 // CHECK12-NEXT:  entry:
9160 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
9161 // CHECK12-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
9162 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
9163 // CHECK12-NEXT:    call void @_Z8mayThrowv()
9164 // CHECK12-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
9165 // CHECK12-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A]], align 8
9166 // CHECK12-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i8
9167 // CHECK12-NEXT:    ret i8 [[CONV]]
9168 //
9169 //
9170 // CHECK12-LABEL: define {{[^@]+}}@__clang_call_terminate
9171 // CHECK12-SAME: (i8* [[TMP0:%.*]]) #[[ATTR4:[0-9]+]] comdat {
9172 // CHECK12-NEXT:    [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR7]]
9173 // CHECK12-NEXT:    call void @_ZSt9terminatev() #[[ATTR8]]
9174 // CHECK12-NEXT:    unreachable
9175 //
9176 //
9177 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv
9178 // CHECK12-SAME: () #[[ATTR5:[0-9]+]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
9179 // CHECK12-NEXT:  entry:
9180 // CHECK12-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9181 // CHECK12-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
9182 // CHECK12-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
9183 // CHECK12-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9184 // CHECK12-NEXT:    [[I:%.*]] = alloca i32, align 4
9185 // CHECK12-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
9186 // CHECK12-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
9187 // CHECK12-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
9188 // CHECK12-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
9189 // CHECK12-NEXT:    [[I6:%.*]] = alloca i32, align 4
9190 // CHECK12-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
9191 // CHECK12-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
9192 // CHECK12-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9193 // CHECK12-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
9194 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9195 // CHECK12:       omp.inner.for.cond:
9196 // CHECK12-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
9197 // CHECK12-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
9198 // CHECK12-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
9199 // CHECK12-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9200 // CHECK12:       omp.inner.for.body:
9201 // CHECK12-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
9202 // CHECK12-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
9203 // CHECK12-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9204 // CHECK12-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
9205 // CHECK12-NEXT:    invoke void @_Z3foov()
9206 // CHECK12-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !13
9207 // CHECK12:       invoke.cont:
9208 // CHECK12-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
9209 // CHECK12:       omp.body.continue:
9210 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9211 // CHECK12:       omp.inner.for.inc:
9212 // CHECK12-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
9213 // CHECK12-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
9214 // CHECK12-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
9215 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
9216 // CHECK12:       omp.inner.for.end:
9217 // CHECK12-NEXT:    store i32 100, i32* [[I]], align 4
9218 // CHECK12-NEXT:    store i32 0, i32* [[DOTOMP_LB3]], align 4
9219 // CHECK12-NEXT:    store i32 99, i32* [[DOTOMP_UB4]], align 4
9220 // CHECK12-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
9221 // CHECK12-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
9222 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
9223 // CHECK12:       omp.inner.for.cond7:
9224 // CHECK12-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16
9225 // CHECK12-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !16
9226 // CHECK12-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
9227 // CHECK12-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]]
9228 // CHECK12:       omp.inner.for.body9:
9229 // CHECK12-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16
9230 // CHECK12-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
9231 // CHECK12-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
9232 // CHECK12-NEXT:    store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !16
9233 // CHECK12-NEXT:    invoke void @_Z3foov()
9234 // CHECK12-NEXT:    to label [[INVOKE_CONT12:%.*]] unwind label [[TERMINATE_LPAD]], !llvm.access.group !16
9235 // CHECK12:       invoke.cont12:
9236 // CHECK12-NEXT:    br label [[OMP_BODY_CONTINUE13:%.*]]
9237 // CHECK12:       omp.body.continue13:
9238 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_INC14:%.*]]
9239 // CHECK12:       omp.inner.for.inc14:
9240 // CHECK12-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16
9241 // CHECK12-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP9]], 1
9242 // CHECK12-NEXT:    store i32 [[ADD15]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16
9243 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP17:![0-9]+]]
9244 // CHECK12:       omp.inner.for.end16:
9245 // CHECK12-NEXT:    store i32 100, i32* [[I6]], align 4
9246 // CHECK12-NEXT:    ret i32 0
9247 // CHECK12:       terminate.lpad:
9248 // CHECK12-NEXT:    [[TMP10:%.*]] = landingpad { i8*, i32 }
9249 // CHECK12-NEXT:    catch i8* null
9250 // CHECK12-NEXT:    [[TMP11:%.*]] = extractvalue { i8*, i32 } [[TMP10]], 0
9251 // CHECK12-NEXT:    call void @__clang_call_terminate(i8* [[TMP11]]) #[[ATTR8]], !llvm.access.group !13
9252 // CHECK12-NEXT:    unreachable
9253 //
9254 //
9255 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv
9256 // CHECK12-SAME: () #[[ATTR5]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
9257 // CHECK12-NEXT:  entry:
9258 // CHECK12-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9259 // CHECK12-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
9260 // CHECK12-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
9261 // CHECK12-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9262 // CHECK12-NEXT:    [[I:%.*]] = alloca i32, align 4
9263 // CHECK12-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
9264 // CHECK12-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
9265 // CHECK12-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
9266 // CHECK12-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
9267 // CHECK12-NEXT:    [[I6:%.*]] = alloca i32, align 4
9268 // CHECK12-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
9269 // CHECK12-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
9270 // CHECK12-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9271 // CHECK12-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
9272 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9273 // CHECK12:       omp.inner.for.cond:
9274 // CHECK12-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
9275 // CHECK12-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19
9276 // CHECK12-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
9277 // CHECK12-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9278 // CHECK12:       omp.inner.for.body:
9279 // CHECK12-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
9280 // CHECK12-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
9281 // CHECK12-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9282 // CHECK12-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !19
9283 // CHECK12-NEXT:    invoke void @_Z3foov()
9284 // CHECK12-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !19
9285 // CHECK12:       invoke.cont:
9286 // CHECK12-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
9287 // CHECK12:       omp.body.continue:
9288 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9289 // CHECK12:       omp.inner.for.inc:
9290 // CHECK12-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
9291 // CHECK12-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
9292 // CHECK12-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
9293 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
9294 // CHECK12:       omp.inner.for.end:
9295 // CHECK12-NEXT:    store i32 100, i32* [[I]], align 4
9296 // CHECK12-NEXT:    store i32 0, i32* [[DOTOMP_LB3]], align 4
9297 // CHECK12-NEXT:    store i32 99, i32* [[DOTOMP_UB4]], align 4
9298 // CHECK12-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
9299 // CHECK12-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
9300 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
9301 // CHECK12:       omp.inner.for.cond7:
9302 // CHECK12-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !22
9303 // CHECK12-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !22
9304 // CHECK12-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
9305 // CHECK12-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]]
9306 // CHECK12:       omp.inner.for.body9:
9307 // CHECK12-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !22
9308 // CHECK12-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
9309 // CHECK12-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
9310 // CHECK12-NEXT:    store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !22
9311 // CHECK12-NEXT:    invoke void @_Z3foov()
9312 // CHECK12-NEXT:    to label [[INVOKE_CONT12:%.*]] unwind label [[TERMINATE_LPAD]], !llvm.access.group !22
9313 // CHECK12:       invoke.cont12:
9314 // CHECK12-NEXT:    br label [[OMP_BODY_CONTINUE13:%.*]]
9315 // CHECK12:       omp.body.continue13:
9316 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_INC14:%.*]]
9317 // CHECK12:       omp.inner.for.inc14:
9318 // CHECK12-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !22
9319 // CHECK12-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP9]], 1
9320 // CHECK12-NEXT:    store i32 [[ADD15]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !22
9321 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP23:![0-9]+]]
9322 // CHECK12:       omp.inner.for.end16:
9323 // CHECK12-NEXT:    store i32 100, i32* [[I6]], align 4
9324 // CHECK12-NEXT:    ret i32 0
9325 // CHECK12:       terminate.lpad:
9326 // CHECK12-NEXT:    [[TMP10:%.*]] = landingpad { i8*, i32 }
9327 // CHECK12-NEXT:    catch i8* null
9328 // CHECK12-NEXT:    [[TMP11:%.*]] = extractvalue { i8*, i32 } [[TMP10]], 0
9329 // CHECK12-NEXT:    call void @__clang_call_terminate(i8* [[TMP11]]) #[[ATTR8]], !llvm.access.group !19
9330 // CHECK12-NEXT:    unreachable
9331 //
9332 //
9333 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SD1Ev
9334 // CHECK12-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6:[0-9]+]] comdat align 2 {
9335 // CHECK12-NEXT:  entry:
9336 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
9337 // CHECK12-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
9338 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
9339 // CHECK12-NEXT:    call void @_ZN1SD2Ev(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR7]]
9340 // CHECK12-NEXT:    ret void
9341 //
9342 //
9343 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SC2El
9344 // CHECK12-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
9345 // CHECK12-NEXT:  entry:
9346 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
9347 // CHECK12-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
9348 // CHECK12-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
9349 // CHECK12-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
9350 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
9351 // CHECK12-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
9352 // CHECK12-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
9353 // CHECK12-NEXT:    store i64 [[TMP0]], i64* [[A2]], align 8
9354 // CHECK12-NEXT:    ret void
9355 //
9356 //
9357 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SD2Ev
9358 // CHECK12-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
9359 // CHECK12-NEXT:  entry:
9360 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
9361 // CHECK12-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
9362 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
9363 // CHECK12-NEXT:    ret void
9364 //
9365 //
9366 // CHECK13-LABEL: define {{[^@]+}}@main
9367 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
9368 // CHECK13-NEXT:  entry:
9369 // CHECK13-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
9370 // CHECK13-NEXT:    [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
9371 // CHECK13-NEXT:    [[A:%.*]] = alloca i8, align 1
9372 // CHECK13-NEXT:    [[EXN_SLOT:%.*]] = alloca i8*, align 8
9373 // CHECK13-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
9374 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9375 // CHECK13-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
9376 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
9377 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
9378 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
9379 // CHECK13-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
9380 // CHECK13-NEXT:    store i32 0, i32* [[RETVAL]], align 4
9381 // CHECK13-NEXT:    call void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[S]], i64 0)
9382 // CHECK13-NEXT:    [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[S]])
9383 // CHECK13-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
9384 // CHECK13:       invoke.cont:
9385 // CHECK13-NEXT:    store i8 [[CALL]], i8* [[A]], align 1
9386 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100)
9387 // CHECK13-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
9388 // CHECK13-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
9389 // CHECK13-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
9390 // CHECK13:       omp_offload.failed:
9391 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR6:[0-9]+]]
9392 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT]]
9393 // CHECK13:       lpad:
9394 // CHECK13-NEXT:    [[TMP2:%.*]] = landingpad { i8*, i32 }
9395 // CHECK13-NEXT:    cleanup
9396 // CHECK13-NEXT:    [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0
9397 // CHECK13-NEXT:    store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8
9398 // CHECK13-NEXT:    [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1
9399 // CHECK13-NEXT:    store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4
9400 // CHECK13-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
9401 // CHECK13-NEXT:    br label [[EH_RESUME:%.*]]
9402 // CHECK13:       omp_offload.cont:
9403 // CHECK13-NEXT:    [[TMP5:%.*]] = load i8, i8* [[A]], align 1
9404 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8*
9405 // CHECK13-NEXT:    store i8 [[TMP5]], i8* [[CONV]], align 1
9406 // CHECK13-NEXT:    [[TMP6:%.*]] = load i64, i64* [[A_CASTED]], align 8
9407 // CHECK13-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
9408 // CHECK13-NEXT:    [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
9409 // CHECK13-NEXT:    store i64 [[TMP6]], i64* [[TMP8]], align 8
9410 // CHECK13-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
9411 // CHECK13-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
9412 // CHECK13-NEXT:    store i64 [[TMP6]], i64* [[TMP10]], align 8
9413 // CHECK13-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
9414 // CHECK13-NEXT:    store i8* null, i8** [[TMP11]], align 8
9415 // CHECK13-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
9416 // CHECK13-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
9417 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
9418 // CHECK13-NEXT:    [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, i32 1, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
9419 // CHECK13-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
9420 // CHECK13-NEXT:    br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
9421 // CHECK13:       omp_offload.failed2:
9422 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP6]]) #[[ATTR6]]
9423 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
9424 // CHECK13:       omp_offload.cont3:
9425 // CHECK13-NEXT:    [[TMP16:%.*]] = load i8, i8* [[A]], align 1
9426 // CHECK13-NEXT:    [[CONV4:%.*]] = sext i8 [[TMP16]] to i32
9427 // CHECK13-NEXT:    [[CALL6:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv()
9428 // CHECK13-NEXT:    to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]]
9429 // CHECK13:       invoke.cont5:
9430 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[CONV4]], [[CALL6]]
9431 // CHECK13-NEXT:    [[CALL8:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv()
9432 // CHECK13-NEXT:    to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD]]
9433 // CHECK13:       invoke.cont7:
9434 // CHECK13-NEXT:    [[ADD9:%.*]] = add nsw i32 [[ADD]], [[CALL8]]
9435 // CHECK13-NEXT:    store i32 [[ADD9]], i32* [[RETVAL]], align 4
9436 // CHECK13-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
9437 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4
9438 // CHECK13-NEXT:    ret i32 [[TMP17]]
9439 // CHECK13:       eh.resume:
9440 // CHECK13-NEXT:    [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8
9441 // CHECK13-NEXT:    [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
9442 // CHECK13-NEXT:    [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
9443 // CHECK13-NEXT:    [[LPAD_VAL10:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
9444 // CHECK13-NEXT:    resume { i8*, i32 } [[LPAD_VAL10]]
9445 //
9446 //
9447 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SC1El
9448 // CHECK13-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
9449 // CHECK13-NEXT:  entry:
9450 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
9451 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
9452 // CHECK13-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
9453 // CHECK13-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
9454 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
9455 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
9456 // CHECK13-NEXT:    call void @_ZN1SC2El(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]], i64 [[TMP0]])
9457 // CHECK13-NEXT:    ret void
9458 //
9459 //
9460 // CHECK13-LABEL: define {{[^@]+}}@_ZN1ScvcEv
9461 // CHECK13-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 {
9462 // CHECK13-NEXT:  entry:
9463 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
9464 // CHECK13-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
9465 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
9466 // CHECK13-NEXT:    call void @_Z8mayThrowv()
9467 // CHECK13-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
9468 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A]], align 8
9469 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i8
9470 // CHECK13-NEXT:    ret i8 [[CONV]]
9471 //
9472 //
9473 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
9474 // CHECK13-SAME: () #[[ATTR3:[0-9]+]] {
9475 // CHECK13-NEXT:  entry:
9476 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
9477 // CHECK13-NEXT:    ret void
9478 //
9479 //
9480 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined.
9481 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
9482 // CHECK13-NEXT:  entry:
9483 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9484 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9485 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9486 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9487 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9488 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9489 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9490 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9491 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9492 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9493 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9494 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9495 // CHECK13-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
9496 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9497 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9498 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9499 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
9500 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9501 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9502 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
9503 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9504 // CHECK13:       cond.true:
9505 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9506 // CHECK13:       cond.false:
9507 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9508 // CHECK13-NEXT:    br label [[COND_END]]
9509 // CHECK13:       cond.end:
9510 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
9511 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9512 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9513 // CHECK13-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
9514 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9515 // CHECK13:       omp.inner.for.cond:
9516 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
9517 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13
9518 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
9519 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9520 // CHECK13:       omp.inner.for.body:
9521 // CHECK13-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2), !llvm.access.group !13
9522 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !13
9523 // CHECK13-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
9524 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13
9525 // CHECK13-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
9526 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !13
9527 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9528 // CHECK13:       omp.inner.for.inc:
9529 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
9530 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !13
9531 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
9532 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
9533 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
9534 // CHECK13:       omp.inner.for.end:
9535 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9536 // CHECK13:       omp.loop.exit:
9537 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
9538 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9539 // CHECK13-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
9540 // CHECK13-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9541 // CHECK13:       .omp.final.then:
9542 // CHECK13-NEXT:    store i32 100, i32* [[I]], align 4
9543 // CHECK13-NEXT:    br label [[DOTOMP_FINAL_DONE]]
9544 // CHECK13:       .omp.final.done:
9545 // CHECK13-NEXT:    ret void
9546 //
9547 //
9548 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..1
9549 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
9550 // CHECK13-NEXT:  entry:
9551 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9552 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9553 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9554 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9555 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9556 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9557 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
9558 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
9559 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9560 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9561 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9562 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9563 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9564 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9565 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9566 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
9567 // CHECK13-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
9568 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9569 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
9570 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9571 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
9572 // CHECK13-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
9573 // CHECK13-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
9574 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9575 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9576 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9577 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
9578 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9579 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9580 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
9581 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9582 // CHECK13:       cond.true:
9583 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9584 // CHECK13:       cond.false:
9585 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9586 // CHECK13-NEXT:    br label [[COND_END]]
9587 // CHECK13:       cond.end:
9588 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
9589 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9590 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9591 // CHECK13-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
9592 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9593 // CHECK13:       omp.inner.for.cond:
9594 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
9595 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !17
9596 // CHECK13-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
9597 // CHECK13-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9598 // CHECK13:       omp.inner.for.body:
9599 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
9600 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
9601 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9602 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !17
9603 // CHECK13-NEXT:    invoke void @_Z3foov()
9604 // CHECK13-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !17
9605 // CHECK13:       invoke.cont:
9606 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
9607 // CHECK13:       omp.body.continue:
9608 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9609 // CHECK13:       omp.inner.for.inc:
9610 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
9611 // CHECK13-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
9612 // CHECK13-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
9613 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
9614 // CHECK13:       omp.inner.for.end:
9615 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9616 // CHECK13:       omp.loop.exit:
9617 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
9618 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9619 // CHECK13-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
9620 // CHECK13-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9621 // CHECK13:       .omp.final.then:
9622 // CHECK13-NEXT:    store i32 100, i32* [[I]], align 4
9623 // CHECK13-NEXT:    br label [[DOTOMP_FINAL_DONE]]
9624 // CHECK13:       .omp.final.done:
9625 // CHECK13-NEXT:    ret void
9626 // CHECK13:       terminate.lpad:
9627 // CHECK13-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
9628 // CHECK13-NEXT:    catch i8* null
9629 // CHECK13-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
9630 // CHECK13-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10:[0-9]+]], !llvm.access.group !17
9631 // CHECK13-NEXT:    unreachable
9632 //
9633 //
9634 // CHECK13-LABEL: define {{[^@]+}}@__clang_call_terminate
9635 // CHECK13-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat {
9636 // CHECK13-NEXT:    [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]]
9637 // CHECK13-NEXT:    call void @_ZSt9terminatev() #[[ATTR10]]
9638 // CHECK13-NEXT:    unreachable
9639 //
9640 //
9641 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74
9642 // CHECK13-SAME: (i64 [[A:%.*]]) #[[ATTR3]] {
9643 // CHECK13-NEXT:  entry:
9644 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
9645 // CHECK13-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
9646 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8*
9647 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i8* [[CONV]])
9648 // CHECK13-NEXT:    ret void
9649 //
9650 //
9651 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..2
9652 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i8* nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] {
9653 // CHECK13-NEXT:  entry:
9654 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9655 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9656 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i8*, align 8
9657 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9658 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9659 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9660 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9661 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9662 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9663 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9664 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9665 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9666 // CHECK13-NEXT:    store i8* [[A]], i8** [[A_ADDR]], align 8
9667 // CHECK13-NEXT:    [[TMP0:%.*]] = load i8*, i8** [[A_ADDR]], align 8
9668 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9669 // CHECK13-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
9670 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9671 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9672 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9673 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
9674 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9675 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9676 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
9677 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9678 // CHECK13:       cond.true:
9679 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9680 // CHECK13:       cond.false:
9681 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9682 // CHECK13-NEXT:    br label [[COND_END]]
9683 // CHECK13:       cond.end:
9684 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
9685 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9686 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9687 // CHECK13-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
9688 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9689 // CHECK13:       omp.inner.for.cond:
9690 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
9691 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !22
9692 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
9693 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9694 // CHECK13:       omp.inner.for.body:
9695 // CHECK13-NEXT:    [[TMP8:%.*]] = load i8, i8* [[TMP0]], align 1, !llvm.access.group !22
9696 // CHECK13-NEXT:    [[TMP9:%.*]] = sext i8 [[TMP8]] to i32
9697 // CHECK13-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]]), !llvm.access.group !22
9698 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !22
9699 // CHECK13-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
9700 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !22
9701 // CHECK13-NEXT:    [[TMP13:%.*]] = zext i32 [[TMP12]] to i64
9702 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]]), !llvm.access.group !22
9703 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9704 // CHECK13:       omp.inner.for.inc:
9705 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
9706 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !22
9707 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
9708 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
9709 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
9710 // CHECK13:       omp.inner.for.end:
9711 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9712 // CHECK13:       omp.loop.exit:
9713 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
9714 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9715 // CHECK13-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
9716 // CHECK13-NEXT:    br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9717 // CHECK13:       .omp.final.then:
9718 // CHECK13-NEXT:    store i32 100, i32* [[I]], align 4
9719 // CHECK13-NEXT:    br label [[DOTOMP_FINAL_DONE]]
9720 // CHECK13:       .omp.final.done:
9721 // CHECK13-NEXT:    ret void
9722 //
9723 //
9724 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..3
9725 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
9726 // CHECK13-NEXT:  entry:
9727 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9728 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9729 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9730 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9731 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9732 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9733 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
9734 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
9735 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9736 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9737 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9738 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9739 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9740 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9741 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9742 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
9743 // CHECK13-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
9744 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9745 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
9746 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9747 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
9748 // CHECK13-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
9749 // CHECK13-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
9750 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9751 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9752 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9753 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
9754 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9755 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9756 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
9757 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9758 // CHECK13:       cond.true:
9759 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9760 // CHECK13:       cond.false:
9761 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9762 // CHECK13-NEXT:    br label [[COND_END]]
9763 // CHECK13:       cond.end:
9764 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
9765 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9766 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9767 // CHECK13-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
9768 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9769 // CHECK13:       omp.inner.for.cond:
9770 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
9771 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25
9772 // CHECK13-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
9773 // CHECK13-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9774 // CHECK13:       omp.inner.for.body:
9775 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
9776 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
9777 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9778 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !25
9779 // CHECK13-NEXT:    invoke void @_Z3foov()
9780 // CHECK13-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !25
9781 // CHECK13:       invoke.cont:
9782 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
9783 // CHECK13:       omp.body.continue:
9784 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9785 // CHECK13:       omp.inner.for.inc:
9786 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
9787 // CHECK13-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
9788 // CHECK13-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
9789 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
9790 // CHECK13:       omp.inner.for.end:
9791 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9792 // CHECK13:       omp.loop.exit:
9793 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
9794 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9795 // CHECK13-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
9796 // CHECK13-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9797 // CHECK13:       .omp.final.then:
9798 // CHECK13-NEXT:    store i32 100, i32* [[I]], align 4
9799 // CHECK13-NEXT:    br label [[DOTOMP_FINAL_DONE]]
9800 // CHECK13:       .omp.final.done:
9801 // CHECK13-NEXT:    ret void
9802 // CHECK13:       terminate.lpad:
9803 // CHECK13-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
9804 // CHECK13-NEXT:    catch i8* null
9805 // CHECK13-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
9806 // CHECK13-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !25
9807 // CHECK13-NEXT:    unreachable
9808 //
9809 //
9810 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv
9811 // CHECK13-SAME: () #[[ATTR7:[0-9]+]] comdat {
9812 // CHECK13-NEXT:  entry:
9813 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9814 // CHECK13-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
9815 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
9816 // CHECK13-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
9817 // CHECK13-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
9818 // CHECK13-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
9819 // CHECK13:       omp_offload.failed:
9820 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR6]]
9821 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT]]
9822 // CHECK13:       omp_offload.cont:
9823 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
9824 // CHECK13-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
9825 // CHECK13-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
9826 // CHECK13-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
9827 // CHECK13:       omp_offload.failed2:
9828 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR6]]
9829 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
9830 // CHECK13:       omp_offload.cont3:
9831 // CHECK13-NEXT:    ret i32 0
9832 //
9833 //
9834 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv
9835 // CHECK13-SAME: () #[[ATTR7]] comdat {
9836 // CHECK13-NEXT:  entry:
9837 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9838 // CHECK13-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
9839 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
9840 // CHECK13-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
9841 // CHECK13-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
9842 // CHECK13-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
9843 // CHECK13:       omp_offload.failed:
9844 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR6]]
9845 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT]]
9846 // CHECK13:       omp_offload.cont:
9847 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
9848 // CHECK13-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
9849 // CHECK13-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
9850 // CHECK13-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
9851 // CHECK13:       omp_offload.failed2:
9852 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR6]]
9853 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
9854 // CHECK13:       omp_offload.cont3:
9855 // CHECK13-NEXT:    ret i32 0
9856 //
9857 //
9858 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SD1Ev
9859 // CHECK13-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 {
9860 // CHECK13-NEXT:  entry:
9861 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
9862 // CHECK13-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
9863 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
9864 // CHECK13-NEXT:    call void @_ZN1SD2Ev(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR6]]
9865 // CHECK13-NEXT:    ret void
9866 //
9867 //
9868 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SC2El
9869 // CHECK13-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
9870 // CHECK13-NEXT:  entry:
9871 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
9872 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
9873 // CHECK13-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
9874 // CHECK13-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
9875 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
9876 // CHECK13-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
9877 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
9878 // CHECK13-NEXT:    store i64 [[TMP0]], i64* [[A2]], align 8
9879 // CHECK13-NEXT:    ret void
9880 //
9881 //
9882 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52
9883 // CHECK13-SAME: () #[[ATTR3]] {
9884 // CHECK13-NEXT:  entry:
9885 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
9886 // CHECK13-NEXT:    ret void
9887 //
9888 //
9889 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..4
9890 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
9891 // CHECK13-NEXT:  entry:
9892 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9893 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9894 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9895 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9896 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9897 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9898 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9899 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9900 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9901 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9902 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9903 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9904 // CHECK13-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
9905 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9906 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9907 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9908 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
9909 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9910 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9911 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
9912 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9913 // CHECK13:       cond.true:
9914 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9915 // CHECK13:       cond.false:
9916 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9917 // CHECK13-NEXT:    br label [[COND_END]]
9918 // CHECK13:       cond.end:
9919 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
9920 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9921 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9922 // CHECK13-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
9923 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9924 // CHECK13:       omp.inner.for.cond:
9925 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
9926 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
9927 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
9928 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9929 // CHECK13:       omp.inner.for.body:
9930 // CHECK13-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5), !llvm.access.group !28
9931 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28
9932 // CHECK13-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
9933 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
9934 // CHECK13-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
9935 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !28
9936 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9937 // CHECK13:       omp.inner.for.inc:
9938 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
9939 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28
9940 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
9941 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
9942 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]
9943 // CHECK13:       omp.inner.for.end:
9944 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9945 // CHECK13:       omp.loop.exit:
9946 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
9947 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9948 // CHECK13-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
9949 // CHECK13-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9950 // CHECK13:       .omp.final.then:
9951 // CHECK13-NEXT:    store i32 100, i32* [[I]], align 4
9952 // CHECK13-NEXT:    br label [[DOTOMP_FINAL_DONE]]
9953 // CHECK13:       .omp.final.done:
9954 // CHECK13-NEXT:    ret void
9955 //
9956 //
9957 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..5
9958 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
9959 // CHECK13-NEXT:  entry:
9960 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9961 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9962 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9963 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9964 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9965 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9966 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
9967 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
9968 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9969 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9970 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9971 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9972 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9973 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9974 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9975 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
9976 // CHECK13-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
9977 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9978 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
9979 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9980 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
9981 // CHECK13-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
9982 // CHECK13-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
9983 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9984 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9985 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9986 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
9987 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9988 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9989 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
9990 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9991 // CHECK13:       cond.true:
9992 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9993 // CHECK13:       cond.false:
9994 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9995 // CHECK13-NEXT:    br label [[COND_END]]
9996 // CHECK13:       cond.end:
9997 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
9998 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9999 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10000 // CHECK13-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
10001 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10002 // CHECK13:       omp.inner.for.cond:
10003 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
10004 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !31
10005 // CHECK13-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
10006 // CHECK13-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10007 // CHECK13:       omp.inner.for.body:
10008 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
10009 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
10010 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10011 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !31
10012 // CHECK13-NEXT:    invoke void @_Z3foov()
10013 // CHECK13-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !31
10014 // CHECK13:       invoke.cont:
10015 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
10016 // CHECK13:       omp.body.continue:
10017 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10018 // CHECK13:       omp.inner.for.inc:
10019 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
10020 // CHECK13-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
10021 // CHECK13-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
10022 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]
10023 // CHECK13:       omp.inner.for.end:
10024 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10025 // CHECK13:       omp.loop.exit:
10026 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
10027 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10028 // CHECK13-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
10029 // CHECK13-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10030 // CHECK13:       .omp.final.then:
10031 // CHECK13-NEXT:    store i32 100, i32* [[I]], align 4
10032 // CHECK13-NEXT:    br label [[DOTOMP_FINAL_DONE]]
10033 // CHECK13:       .omp.final.done:
10034 // CHECK13-NEXT:    ret void
10035 // CHECK13:       terminate.lpad:
10036 // CHECK13-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
10037 // CHECK13-NEXT:    catch i8* null
10038 // CHECK13-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
10039 // CHECK13-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !31
10040 // CHECK13-NEXT:    unreachable
10041 //
10042 //
10043 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57
10044 // CHECK13-SAME: () #[[ATTR3]] {
10045 // CHECK13-NEXT:  entry:
10046 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
10047 // CHECK13-NEXT:    ret void
10048 //
10049 //
10050 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..6
10051 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
10052 // CHECK13-NEXT:  entry:
10053 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10054 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10055 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10056 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10057 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10058 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10059 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10060 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10061 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
10062 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10063 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10064 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10065 // CHECK13-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
10066 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10067 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10068 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10069 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
10070 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10071 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10072 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
10073 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10074 // CHECK13:       cond.true:
10075 // CHECK13-NEXT:    br label [[COND_END:%.*]]
10076 // CHECK13:       cond.false:
10077 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10078 // CHECK13-NEXT:    br label [[COND_END]]
10079 // CHECK13:       cond.end:
10080 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
10081 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10082 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10083 // CHECK13-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
10084 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10085 // CHECK13:       omp.inner.for.cond:
10086 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
10087 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !34
10088 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
10089 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10090 // CHECK13:       omp.inner.for.body:
10091 // CHECK13-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23), !llvm.access.group !34
10092 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !34
10093 // CHECK13-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
10094 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !34
10095 // CHECK13-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
10096 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !34
10097 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10098 // CHECK13:       omp.inner.for.inc:
10099 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
10100 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !34
10101 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
10102 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
10103 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]]
10104 // CHECK13:       omp.inner.for.end:
10105 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10106 // CHECK13:       omp.loop.exit:
10107 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
10108 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10109 // CHECK13-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
10110 // CHECK13-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10111 // CHECK13:       .omp.final.then:
10112 // CHECK13-NEXT:    store i32 100, i32* [[I]], align 4
10113 // CHECK13-NEXT:    br label [[DOTOMP_FINAL_DONE]]
10114 // CHECK13:       .omp.final.done:
10115 // CHECK13-NEXT:    ret void
10116 //
10117 //
10118 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..7
10119 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
10120 // CHECK13-NEXT:  entry:
10121 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10122 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10123 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10124 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10125 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10126 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10127 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
10128 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
10129 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10130 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10131 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
10132 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10133 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10134 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10135 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10136 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
10137 // CHECK13-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
10138 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10139 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
10140 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10141 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
10142 // CHECK13-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
10143 // CHECK13-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
10144 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10145 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10146 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10147 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
10148 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10149 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10150 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
10151 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10152 // CHECK13:       cond.true:
10153 // CHECK13-NEXT:    br label [[COND_END:%.*]]
10154 // CHECK13:       cond.false:
10155 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10156 // CHECK13-NEXT:    br label [[COND_END]]
10157 // CHECK13:       cond.end:
10158 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
10159 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10160 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10161 // CHECK13-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
10162 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10163 // CHECK13:       omp.inner.for.cond:
10164 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
10165 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !37
10166 // CHECK13-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
10167 // CHECK13-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10168 // CHECK13:       omp.inner.for.body:
10169 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
10170 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
10171 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10172 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !37
10173 // CHECK13-NEXT:    invoke void @_Z3foov()
10174 // CHECK13-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !37
10175 // CHECK13:       invoke.cont:
10176 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
10177 // CHECK13:       omp.body.continue:
10178 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10179 // CHECK13:       omp.inner.for.inc:
10180 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
10181 // CHECK13-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
10182 // CHECK13-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
10183 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP38:![0-9]+]]
10184 // CHECK13:       omp.inner.for.end:
10185 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10186 // CHECK13:       omp.loop.exit:
10187 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
10188 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10189 // CHECK13-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
10190 // CHECK13-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10191 // CHECK13:       .omp.final.then:
10192 // CHECK13-NEXT:    store i32 100, i32* [[I]], align 4
10193 // CHECK13-NEXT:    br label [[DOTOMP_FINAL_DONE]]
10194 // CHECK13:       .omp.final.done:
10195 // CHECK13-NEXT:    ret void
10196 // CHECK13:       terminate.lpad:
10197 // CHECK13-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
10198 // CHECK13-NEXT:    catch i8* null
10199 // CHECK13-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
10200 // CHECK13-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !37
10201 // CHECK13-NEXT:    unreachable
10202 //
10203 //
10204 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52
10205 // CHECK13-SAME: () #[[ATTR3]] {
10206 // CHECK13-NEXT:  entry:
10207 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*))
10208 // CHECK13-NEXT:    ret void
10209 //
10210 //
10211 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..8
10212 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
10213 // CHECK13-NEXT:  entry:
10214 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10215 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10216 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10217 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10218 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10219 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10220 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10221 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10222 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
10223 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10224 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10225 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10226 // CHECK13-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
10227 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10228 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10229 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10230 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
10231 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10232 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10233 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
10234 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10235 // CHECK13:       cond.true:
10236 // CHECK13-NEXT:    br label [[COND_END:%.*]]
10237 // CHECK13:       cond.false:
10238 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10239 // CHECK13-NEXT:    br label [[COND_END]]
10240 // CHECK13:       cond.end:
10241 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
10242 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10243 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10244 // CHECK13-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
10245 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10246 // CHECK13:       omp.inner.for.cond:
10247 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40
10248 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !40
10249 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
10250 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10251 // CHECK13:       omp.inner.for.body:
10252 // CHECK13-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1), !llvm.access.group !40
10253 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !40
10254 // CHECK13-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
10255 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !40
10256 // CHECK13-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
10257 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !40
10258 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10259 // CHECK13:       omp.inner.for.inc:
10260 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40
10261 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !40
10262 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
10263 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40
10264 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP41:![0-9]+]]
10265 // CHECK13:       omp.inner.for.end:
10266 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10267 // CHECK13:       omp.loop.exit:
10268 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
10269 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10270 // CHECK13-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
10271 // CHECK13-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10272 // CHECK13:       .omp.final.then:
10273 // CHECK13-NEXT:    store i32 100, i32* [[I]], align 4
10274 // CHECK13-NEXT:    br label [[DOTOMP_FINAL_DONE]]
10275 // CHECK13:       .omp.final.done:
10276 // CHECK13-NEXT:    ret void
10277 //
10278 //
10279 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..9
10280 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
10281 // CHECK13-NEXT:  entry:
10282 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10283 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10284 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10285 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10286 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10287 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10288 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
10289 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
10290 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10291 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10292 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
10293 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10294 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10295 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10296 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10297 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
10298 // CHECK13-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
10299 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10300 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
10301 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10302 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
10303 // CHECK13-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
10304 // CHECK13-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
10305 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10306 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10307 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10308 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
10309 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10310 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10311 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
10312 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10313 // CHECK13:       cond.true:
10314 // CHECK13-NEXT:    br label [[COND_END:%.*]]
10315 // CHECK13:       cond.false:
10316 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10317 // CHECK13-NEXT:    br label [[COND_END]]
10318 // CHECK13:       cond.end:
10319 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
10320 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10321 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10322 // CHECK13-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
10323 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10324 // CHECK13:       omp.inner.for.cond:
10325 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
10326 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !43
10327 // CHECK13-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
10328 // CHECK13-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10329 // CHECK13:       omp.inner.for.body:
10330 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
10331 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
10332 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10333 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !43
10334 // CHECK13-NEXT:    invoke void @_Z3foov()
10335 // CHECK13-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !43
10336 // CHECK13:       invoke.cont:
10337 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
10338 // CHECK13:       omp.body.continue:
10339 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10340 // CHECK13:       omp.inner.for.inc:
10341 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
10342 // CHECK13-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
10343 // CHECK13-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
10344 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]]
10345 // CHECK13:       omp.inner.for.end:
10346 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10347 // CHECK13:       omp.loop.exit:
10348 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
10349 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10350 // CHECK13-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
10351 // CHECK13-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10352 // CHECK13:       .omp.final.then:
10353 // CHECK13-NEXT:    store i32 100, i32* [[I]], align 4
10354 // CHECK13-NEXT:    br label [[DOTOMP_FINAL_DONE]]
10355 // CHECK13:       .omp.final.done:
10356 // CHECK13-NEXT:    ret void
10357 // CHECK13:       terminate.lpad:
10358 // CHECK13-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
10359 // CHECK13-NEXT:    catch i8* null
10360 // CHECK13-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
10361 // CHECK13-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !43
10362 // CHECK13-NEXT:    unreachable
10363 //
10364 //
10365 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57
10366 // CHECK13-SAME: () #[[ATTR3]] {
10367 // CHECK13-NEXT:  entry:
10368 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
10369 // CHECK13-NEXT:    ret void
10370 //
10371 //
10372 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..10
10373 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
10374 // CHECK13-NEXT:  entry:
10375 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10376 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10377 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10378 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10379 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10380 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10381 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10382 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10383 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
10384 // CHECK13-NEXT:    [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8
10385 // CHECK13-NEXT:    [[EXN_SLOT:%.*]] = alloca i8*, align 8
10386 // CHECK13-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
10387 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10388 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10389 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10390 // CHECK13-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
10391 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10392 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10393 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10394 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
10395 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10396 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10397 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
10398 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10399 // CHECK13:       cond.true:
10400 // CHECK13-NEXT:    br label [[COND_END:%.*]]
10401 // CHECK13:       cond.false:
10402 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10403 // CHECK13-NEXT:    br label [[COND_END]]
10404 // CHECK13:       cond.end:
10405 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
10406 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10407 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10408 // CHECK13-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
10409 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10410 // CHECK13:       omp.inner.for.cond:
10411 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
10412 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !46
10413 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
10414 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10415 // CHECK13:       omp.inner.for.body:
10416 // CHECK13-NEXT:    invoke void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 23)
10417 // CHECK13-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !46
10418 // CHECK13:       invoke.cont:
10419 // CHECK13-NEXT:    [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]])
10420 // CHECK13-NEXT:    to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD:%.*]], !llvm.access.group !46
10421 // CHECK13:       invoke.cont2:
10422 // CHECK13-NEXT:    [[TMP7:%.*]] = sext i8 [[CALL]] to i32
10423 // CHECK13-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]]), !llvm.access.group !46
10424 // CHECK13-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]], !llvm.access.group !46
10425 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !46
10426 // CHECK13-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
10427 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !46
10428 // CHECK13-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
10429 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]), !llvm.access.group !46
10430 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10431 // CHECK13:       omp.inner.for.inc:
10432 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
10433 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !46
10434 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
10435 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
10436 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP47:![0-9]+]]
10437 // CHECK13:       lpad:
10438 // CHECK13-NEXT:    [[TMP14:%.*]] = landingpad { i8*, i32 }
10439 // CHECK13-NEXT:    catch i8* null
10440 // CHECK13-NEXT:    [[TMP15:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 0
10441 // CHECK13-NEXT:    store i8* [[TMP15]], i8** [[EXN_SLOT]], align 8, !llvm.access.group !46
10442 // CHECK13-NEXT:    [[TMP16:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 1
10443 // CHECK13-NEXT:    store i32 [[TMP16]], i32* [[EHSELECTOR_SLOT]], align 4, !llvm.access.group !46
10444 // CHECK13-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]], !llvm.access.group !46
10445 // CHECK13-NEXT:    br label [[TERMINATE_HANDLER:%.*]]
10446 // CHECK13:       omp.inner.for.end:
10447 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10448 // CHECK13:       omp.loop.exit:
10449 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
10450 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10451 // CHECK13-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
10452 // CHECK13-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10453 // CHECK13:       .omp.final.then:
10454 // CHECK13-NEXT:    store i32 100, i32* [[I]], align 4
10455 // CHECK13-NEXT:    br label [[DOTOMP_FINAL_DONE]]
10456 // CHECK13:       .omp.final.done:
10457 // CHECK13-NEXT:    ret void
10458 // CHECK13:       terminate.lpad:
10459 // CHECK13-NEXT:    [[TMP19:%.*]] = landingpad { i8*, i32 }
10460 // CHECK13-NEXT:    catch i8* null
10461 // CHECK13-NEXT:    [[TMP20:%.*]] = extractvalue { i8*, i32 } [[TMP19]], 0
10462 // CHECK13-NEXT:    call void @__clang_call_terminate(i8* [[TMP20]]) #[[ATTR10]], !llvm.access.group !46
10463 // CHECK13-NEXT:    unreachable
10464 // CHECK13:       terminate.handler:
10465 // CHECK13-NEXT:    [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8, !llvm.access.group !46
10466 // CHECK13-NEXT:    call void @__clang_call_terminate(i8* [[EXN]]) #[[ATTR10]], !llvm.access.group !46
10467 // CHECK13-NEXT:    unreachable
10468 //
10469 //
10470 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..11
10471 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
10472 // CHECK13-NEXT:  entry:
10473 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10474 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10475 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10476 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10477 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10478 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10479 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
10480 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
10481 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10482 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10483 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
10484 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10485 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10486 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10487 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10488 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
10489 // CHECK13-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
10490 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10491 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
10492 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10493 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
10494 // CHECK13-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
10495 // CHECK13-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
10496 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10497 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10498 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10499 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
10500 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10501 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10502 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
10503 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10504 // CHECK13:       cond.true:
10505 // CHECK13-NEXT:    br label [[COND_END:%.*]]
10506 // CHECK13:       cond.false:
10507 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10508 // CHECK13-NEXT:    br label [[COND_END]]
10509 // CHECK13:       cond.end:
10510 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
10511 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10512 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10513 // CHECK13-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
10514 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10515 // CHECK13:       omp.inner.for.cond:
10516 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
10517 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !49
10518 // CHECK13-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
10519 // CHECK13-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10520 // CHECK13:       omp.inner.for.body:
10521 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
10522 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
10523 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10524 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !49
10525 // CHECK13-NEXT:    invoke void @_Z3foov()
10526 // CHECK13-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !49
10527 // CHECK13:       invoke.cont:
10528 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
10529 // CHECK13:       omp.body.continue:
10530 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10531 // CHECK13:       omp.inner.for.inc:
10532 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
10533 // CHECK13-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
10534 // CHECK13-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
10535 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP50:![0-9]+]]
10536 // CHECK13:       omp.inner.for.end:
10537 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10538 // CHECK13:       omp.loop.exit:
10539 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
10540 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10541 // CHECK13-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
10542 // CHECK13-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10543 // CHECK13:       .omp.final.then:
10544 // CHECK13-NEXT:    store i32 100, i32* [[I]], align 4
10545 // CHECK13-NEXT:    br label [[DOTOMP_FINAL_DONE]]
10546 // CHECK13:       .omp.final.done:
10547 // CHECK13-NEXT:    ret void
10548 // CHECK13:       terminate.lpad:
10549 // CHECK13-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
10550 // CHECK13-NEXT:    catch i8* null
10551 // CHECK13-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
10552 // CHECK13-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !49
10553 // CHECK13-NEXT:    unreachable
10554 //
10555 //
10556 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SD2Ev
10557 // CHECK13-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
10558 // CHECK13-NEXT:  entry:
10559 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
10560 // CHECK13-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
10561 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
10562 // CHECK13-NEXT:    ret void
10563 //
10564 //
10565 // CHECK13-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
10566 // CHECK13-SAME: () #[[ATTR9:[0-9]+]] {
10567 // CHECK13-NEXT:  entry:
10568 // CHECK13-NEXT:    call void @__tgt_register_requires(i64 1)
10569 // CHECK13-NEXT:    ret void
10570 //
10571 //
10572 // CHECK14-LABEL: define {{[^@]+}}@main
10573 // CHECK14-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
10574 // CHECK14-NEXT:  entry:
10575 // CHECK14-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
10576 // CHECK14-NEXT:    [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
10577 // CHECK14-NEXT:    [[A:%.*]] = alloca i8, align 1
10578 // CHECK14-NEXT:    [[EXN_SLOT:%.*]] = alloca i8*, align 8
10579 // CHECK14-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
10580 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10581 // CHECK14-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
10582 // CHECK14-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
10583 // CHECK14-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
10584 // CHECK14-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
10585 // CHECK14-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
10586 // CHECK14-NEXT:    store i32 0, i32* [[RETVAL]], align 4
10587 // CHECK14-NEXT:    call void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[S]], i64 0)
10588 // CHECK14-NEXT:    [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[S]])
10589 // CHECK14-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
10590 // CHECK14:       invoke.cont:
10591 // CHECK14-NEXT:    store i8 [[CALL]], i8* [[A]], align 1
10592 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100)
10593 // CHECK14-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
10594 // CHECK14-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
10595 // CHECK14-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
10596 // CHECK14:       omp_offload.failed:
10597 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR6:[0-9]+]]
10598 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT]]
10599 // CHECK14:       lpad:
10600 // CHECK14-NEXT:    [[TMP2:%.*]] = landingpad { i8*, i32 }
10601 // CHECK14-NEXT:    cleanup
10602 // CHECK14-NEXT:    [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0
10603 // CHECK14-NEXT:    store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8
10604 // CHECK14-NEXT:    [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1
10605 // CHECK14-NEXT:    store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4
10606 // CHECK14-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
10607 // CHECK14-NEXT:    br label [[EH_RESUME:%.*]]
10608 // CHECK14:       omp_offload.cont:
10609 // CHECK14-NEXT:    [[TMP5:%.*]] = load i8, i8* [[A]], align 1
10610 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8*
10611 // CHECK14-NEXT:    store i8 [[TMP5]], i8* [[CONV]], align 1
10612 // CHECK14-NEXT:    [[TMP6:%.*]] = load i64, i64* [[A_CASTED]], align 8
10613 // CHECK14-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
10614 // CHECK14-NEXT:    [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
10615 // CHECK14-NEXT:    store i64 [[TMP6]], i64* [[TMP8]], align 8
10616 // CHECK14-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
10617 // CHECK14-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
10618 // CHECK14-NEXT:    store i64 [[TMP6]], i64* [[TMP10]], align 8
10619 // CHECK14-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
10620 // CHECK14-NEXT:    store i8* null, i8** [[TMP11]], align 8
10621 // CHECK14-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
10622 // CHECK14-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
10623 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
10624 // CHECK14-NEXT:    [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, i32 1, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
10625 // CHECK14-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
10626 // CHECK14-NEXT:    br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
10627 // CHECK14:       omp_offload.failed2:
10628 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP6]]) #[[ATTR6]]
10629 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
10630 // CHECK14:       omp_offload.cont3:
10631 // CHECK14-NEXT:    [[TMP16:%.*]] = load i8, i8* [[A]], align 1
10632 // CHECK14-NEXT:    [[CONV4:%.*]] = sext i8 [[TMP16]] to i32
10633 // CHECK14-NEXT:    [[CALL6:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv()
10634 // CHECK14-NEXT:    to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]]
10635 // CHECK14:       invoke.cont5:
10636 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[CONV4]], [[CALL6]]
10637 // CHECK14-NEXT:    [[CALL8:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv()
10638 // CHECK14-NEXT:    to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD]]
10639 // CHECK14:       invoke.cont7:
10640 // CHECK14-NEXT:    [[ADD9:%.*]] = add nsw i32 [[ADD]], [[CALL8]]
10641 // CHECK14-NEXT:    store i32 [[ADD9]], i32* [[RETVAL]], align 4
10642 // CHECK14-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
10643 // CHECK14-NEXT:    [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4
10644 // CHECK14-NEXT:    ret i32 [[TMP17]]
10645 // CHECK14:       eh.resume:
10646 // CHECK14-NEXT:    [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8
10647 // CHECK14-NEXT:    [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
10648 // CHECK14-NEXT:    [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
10649 // CHECK14-NEXT:    [[LPAD_VAL10:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
10650 // CHECK14-NEXT:    resume { i8*, i32 } [[LPAD_VAL10]]
10651 //
10652 //
10653 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SC1El
10654 // CHECK14-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
10655 // CHECK14-NEXT:  entry:
10656 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
10657 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
10658 // CHECK14-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
10659 // CHECK14-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
10660 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
10661 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
10662 // CHECK14-NEXT:    call void @_ZN1SC2El(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]], i64 [[TMP0]])
10663 // CHECK14-NEXT:    ret void
10664 //
10665 //
10666 // CHECK14-LABEL: define {{[^@]+}}@_ZN1ScvcEv
10667 // CHECK14-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 {
10668 // CHECK14-NEXT:  entry:
10669 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
10670 // CHECK14-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
10671 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
10672 // CHECK14-NEXT:    call void @_Z8mayThrowv()
10673 // CHECK14-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
10674 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A]], align 8
10675 // CHECK14-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i8
10676 // CHECK14-NEXT:    ret i8 [[CONV]]
10677 //
10678 //
10679 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
10680 // CHECK14-SAME: () #[[ATTR3:[0-9]+]] {
10681 // CHECK14-NEXT:  entry:
10682 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
10683 // CHECK14-NEXT:    ret void
10684 //
10685 //
10686 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined.
10687 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
10688 // CHECK14-NEXT:  entry:
10689 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10690 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10691 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10692 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10693 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10694 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10695 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10696 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10697 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
10698 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10699 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10700 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10701 // CHECK14-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
10702 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10703 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10704 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10705 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
10706 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10707 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10708 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
10709 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10710 // CHECK14:       cond.true:
10711 // CHECK14-NEXT:    br label [[COND_END:%.*]]
10712 // CHECK14:       cond.false:
10713 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10714 // CHECK14-NEXT:    br label [[COND_END]]
10715 // CHECK14:       cond.end:
10716 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
10717 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10718 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10719 // CHECK14-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
10720 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10721 // CHECK14:       omp.inner.for.cond:
10722 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
10723 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13
10724 // CHECK14-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
10725 // CHECK14-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10726 // CHECK14:       omp.inner.for.body:
10727 // CHECK14-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2), !llvm.access.group !13
10728 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !13
10729 // CHECK14-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
10730 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13
10731 // CHECK14-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
10732 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !13
10733 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10734 // CHECK14:       omp.inner.for.inc:
10735 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
10736 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !13
10737 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
10738 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
10739 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
10740 // CHECK14:       omp.inner.for.end:
10741 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10742 // CHECK14:       omp.loop.exit:
10743 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
10744 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10745 // CHECK14-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
10746 // CHECK14-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10747 // CHECK14:       .omp.final.then:
10748 // CHECK14-NEXT:    store i32 100, i32* [[I]], align 4
10749 // CHECK14-NEXT:    br label [[DOTOMP_FINAL_DONE]]
10750 // CHECK14:       .omp.final.done:
10751 // CHECK14-NEXT:    ret void
10752 //
10753 //
10754 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..1
10755 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
10756 // CHECK14-NEXT:  entry:
10757 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10758 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10759 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10760 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10761 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10762 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10763 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
10764 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
10765 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10766 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10767 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
10768 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10769 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10770 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10771 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10772 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
10773 // CHECK14-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
10774 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10775 // CHECK14-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
10776 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10777 // CHECK14-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
10778 // CHECK14-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
10779 // CHECK14-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
10780 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10781 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10782 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10783 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
10784 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10785 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10786 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
10787 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10788 // CHECK14:       cond.true:
10789 // CHECK14-NEXT:    br label [[COND_END:%.*]]
10790 // CHECK14:       cond.false:
10791 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10792 // CHECK14-NEXT:    br label [[COND_END]]
10793 // CHECK14:       cond.end:
10794 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
10795 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10796 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10797 // CHECK14-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
10798 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10799 // CHECK14:       omp.inner.for.cond:
10800 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
10801 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !17
10802 // CHECK14-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
10803 // CHECK14-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10804 // CHECK14:       omp.inner.for.body:
10805 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
10806 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
10807 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10808 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !17
10809 // CHECK14-NEXT:    invoke void @_Z3foov()
10810 // CHECK14-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !17
10811 // CHECK14:       invoke.cont:
10812 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
10813 // CHECK14:       omp.body.continue:
10814 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10815 // CHECK14:       omp.inner.for.inc:
10816 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
10817 // CHECK14-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
10818 // CHECK14-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
10819 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
10820 // CHECK14:       omp.inner.for.end:
10821 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10822 // CHECK14:       omp.loop.exit:
10823 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
10824 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10825 // CHECK14-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
10826 // CHECK14-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10827 // CHECK14:       .omp.final.then:
10828 // CHECK14-NEXT:    store i32 100, i32* [[I]], align 4
10829 // CHECK14-NEXT:    br label [[DOTOMP_FINAL_DONE]]
10830 // CHECK14:       .omp.final.done:
10831 // CHECK14-NEXT:    ret void
10832 // CHECK14:       terminate.lpad:
10833 // CHECK14-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
10834 // CHECK14-NEXT:    catch i8* null
10835 // CHECK14-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
10836 // CHECK14-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10:[0-9]+]], !llvm.access.group !17
10837 // CHECK14-NEXT:    unreachable
10838 //
10839 //
10840 // CHECK14-LABEL: define {{[^@]+}}@__clang_call_terminate
10841 // CHECK14-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat {
10842 // CHECK14-NEXT:    [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]]
10843 // CHECK14-NEXT:    call void @_ZSt9terminatev() #[[ATTR10]]
10844 // CHECK14-NEXT:    unreachable
10845 //
10846 //
10847 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74
10848 // CHECK14-SAME: (i64 [[A:%.*]]) #[[ATTR3]] {
10849 // CHECK14-NEXT:  entry:
10850 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
10851 // CHECK14-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
10852 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8*
10853 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i8* [[CONV]])
10854 // CHECK14-NEXT:    ret void
10855 //
10856 //
10857 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..2
10858 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i8* nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] {
10859 // CHECK14-NEXT:  entry:
10860 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10861 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10862 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i8*, align 8
10863 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10864 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10865 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10866 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10867 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10868 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10869 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
10870 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10871 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10872 // CHECK14-NEXT:    store i8* [[A]], i8** [[A_ADDR]], align 8
10873 // CHECK14-NEXT:    [[TMP0:%.*]] = load i8*, i8** [[A_ADDR]], align 8
10874 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10875 // CHECK14-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
10876 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10877 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10878 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10879 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
10880 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10881 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10882 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
10883 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10884 // CHECK14:       cond.true:
10885 // CHECK14-NEXT:    br label [[COND_END:%.*]]
10886 // CHECK14:       cond.false:
10887 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10888 // CHECK14-NEXT:    br label [[COND_END]]
10889 // CHECK14:       cond.end:
10890 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
10891 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10892 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10893 // CHECK14-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
10894 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10895 // CHECK14:       omp.inner.for.cond:
10896 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
10897 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !22
10898 // CHECK14-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
10899 // CHECK14-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10900 // CHECK14:       omp.inner.for.body:
10901 // CHECK14-NEXT:    [[TMP8:%.*]] = load i8, i8* [[TMP0]], align 1, !llvm.access.group !22
10902 // CHECK14-NEXT:    [[TMP9:%.*]] = sext i8 [[TMP8]] to i32
10903 // CHECK14-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]]), !llvm.access.group !22
10904 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !22
10905 // CHECK14-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
10906 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !22
10907 // CHECK14-NEXT:    [[TMP13:%.*]] = zext i32 [[TMP12]] to i64
10908 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]]), !llvm.access.group !22
10909 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10910 // CHECK14:       omp.inner.for.inc:
10911 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
10912 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !22
10913 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
10914 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
10915 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
10916 // CHECK14:       omp.inner.for.end:
10917 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10918 // CHECK14:       omp.loop.exit:
10919 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
10920 // CHECK14-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10921 // CHECK14-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
10922 // CHECK14-NEXT:    br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10923 // CHECK14:       .omp.final.then:
10924 // CHECK14-NEXT:    store i32 100, i32* [[I]], align 4
10925 // CHECK14-NEXT:    br label [[DOTOMP_FINAL_DONE]]
10926 // CHECK14:       .omp.final.done:
10927 // CHECK14-NEXT:    ret void
10928 //
10929 //
10930 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..3
10931 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
10932 // CHECK14-NEXT:  entry:
10933 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10934 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10935 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10936 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10937 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10938 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10939 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
10940 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
10941 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10942 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10943 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
10944 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10945 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10946 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10947 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10948 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
10949 // CHECK14-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
10950 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10951 // CHECK14-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
10952 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10953 // CHECK14-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
10954 // CHECK14-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
10955 // CHECK14-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
10956 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10957 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10958 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10959 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
10960 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10961 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10962 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
10963 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10964 // CHECK14:       cond.true:
10965 // CHECK14-NEXT:    br label [[COND_END:%.*]]
10966 // CHECK14:       cond.false:
10967 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10968 // CHECK14-NEXT:    br label [[COND_END]]
10969 // CHECK14:       cond.end:
10970 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
10971 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10972 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10973 // CHECK14-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
10974 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10975 // CHECK14:       omp.inner.for.cond:
10976 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
10977 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25
10978 // CHECK14-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
10979 // CHECK14-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10980 // CHECK14:       omp.inner.for.body:
10981 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
10982 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
10983 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10984 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !25
10985 // CHECK14-NEXT:    invoke void @_Z3foov()
10986 // CHECK14-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !25
10987 // CHECK14:       invoke.cont:
10988 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
10989 // CHECK14:       omp.body.continue:
10990 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10991 // CHECK14:       omp.inner.for.inc:
10992 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
10993 // CHECK14-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
10994 // CHECK14-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
10995 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
10996 // CHECK14:       omp.inner.for.end:
10997 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10998 // CHECK14:       omp.loop.exit:
10999 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
11000 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11001 // CHECK14-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
11002 // CHECK14-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11003 // CHECK14:       .omp.final.then:
11004 // CHECK14-NEXT:    store i32 100, i32* [[I]], align 4
11005 // CHECK14-NEXT:    br label [[DOTOMP_FINAL_DONE]]
11006 // CHECK14:       .omp.final.done:
11007 // CHECK14-NEXT:    ret void
11008 // CHECK14:       terminate.lpad:
11009 // CHECK14-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
11010 // CHECK14-NEXT:    catch i8* null
11011 // CHECK14-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
11012 // CHECK14-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !25
11013 // CHECK14-NEXT:    unreachable
11014 //
11015 //
11016 // CHECK14-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv
11017 // CHECK14-SAME: () #[[ATTR7:[0-9]+]] comdat {
11018 // CHECK14-NEXT:  entry:
11019 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11020 // CHECK14-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
11021 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
11022 // CHECK14-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
11023 // CHECK14-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
11024 // CHECK14-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
11025 // CHECK14:       omp_offload.failed:
11026 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR6]]
11027 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT]]
11028 // CHECK14:       omp_offload.cont:
11029 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
11030 // CHECK14-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
11031 // CHECK14-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
11032 // CHECK14-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
11033 // CHECK14:       omp_offload.failed2:
11034 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR6]]
11035 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
11036 // CHECK14:       omp_offload.cont3:
11037 // CHECK14-NEXT:    ret i32 0
11038 //
11039 //
11040 // CHECK14-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv
11041 // CHECK14-SAME: () #[[ATTR7]] comdat {
11042 // CHECK14-NEXT:  entry:
11043 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11044 // CHECK14-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
11045 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
11046 // CHECK14-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
11047 // CHECK14-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
11048 // CHECK14-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
11049 // CHECK14:       omp_offload.failed:
11050 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR6]]
11051 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT]]
11052 // CHECK14:       omp_offload.cont:
11053 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
11054 // CHECK14-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
11055 // CHECK14-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
11056 // CHECK14-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
11057 // CHECK14:       omp_offload.failed2:
11058 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR6]]
11059 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
11060 // CHECK14:       omp_offload.cont3:
11061 // CHECK14-NEXT:    ret i32 0
11062 //
11063 //
11064 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SD1Ev
11065 // CHECK14-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 {
11066 // CHECK14-NEXT:  entry:
11067 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
11068 // CHECK14-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
11069 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
11070 // CHECK14-NEXT:    call void @_ZN1SD2Ev(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR6]]
11071 // CHECK14-NEXT:    ret void
11072 //
11073 //
11074 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SC2El
11075 // CHECK14-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
11076 // CHECK14-NEXT:  entry:
11077 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
11078 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
11079 // CHECK14-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
11080 // CHECK14-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
11081 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
11082 // CHECK14-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
11083 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
11084 // CHECK14-NEXT:    store i64 [[TMP0]], i64* [[A2]], align 8
11085 // CHECK14-NEXT:    ret void
11086 //
11087 //
11088 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52
11089 // CHECK14-SAME: () #[[ATTR3]] {
11090 // CHECK14-NEXT:  entry:
11091 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
11092 // CHECK14-NEXT:    ret void
11093 //
11094 //
11095 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..4
11096 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
11097 // CHECK14-NEXT:  entry:
11098 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11099 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11100 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11101 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11102 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11103 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11104 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11105 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11106 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11107 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11108 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11109 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11110 // CHECK14-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
11111 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11112 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11113 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11114 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
11115 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11116 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11117 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
11118 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11119 // CHECK14:       cond.true:
11120 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11121 // CHECK14:       cond.false:
11122 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11123 // CHECK14-NEXT:    br label [[COND_END]]
11124 // CHECK14:       cond.end:
11125 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
11126 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11127 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11128 // CHECK14-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
11129 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11130 // CHECK14:       omp.inner.for.cond:
11131 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
11132 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
11133 // CHECK14-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
11134 // CHECK14-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11135 // CHECK14:       omp.inner.for.body:
11136 // CHECK14-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5), !llvm.access.group !28
11137 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28
11138 // CHECK14-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
11139 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
11140 // CHECK14-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
11141 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !28
11142 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11143 // CHECK14:       omp.inner.for.inc:
11144 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
11145 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28
11146 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
11147 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
11148 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]
11149 // CHECK14:       omp.inner.for.end:
11150 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11151 // CHECK14:       omp.loop.exit:
11152 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
11153 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11154 // CHECK14-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
11155 // CHECK14-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11156 // CHECK14:       .omp.final.then:
11157 // CHECK14-NEXT:    store i32 100, i32* [[I]], align 4
11158 // CHECK14-NEXT:    br label [[DOTOMP_FINAL_DONE]]
11159 // CHECK14:       .omp.final.done:
11160 // CHECK14-NEXT:    ret void
11161 //
11162 //
11163 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..5
11164 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
11165 // CHECK14-NEXT:  entry:
11166 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11167 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11168 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11169 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11170 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11171 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11172 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
11173 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
11174 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11175 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11176 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11177 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11178 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11179 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11180 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11181 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
11182 // CHECK14-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
11183 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11184 // CHECK14-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
11185 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11186 // CHECK14-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
11187 // CHECK14-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
11188 // CHECK14-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
11189 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11190 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11191 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11192 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
11193 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11194 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11195 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
11196 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11197 // CHECK14:       cond.true:
11198 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11199 // CHECK14:       cond.false:
11200 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11201 // CHECK14-NEXT:    br label [[COND_END]]
11202 // CHECK14:       cond.end:
11203 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
11204 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11205 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11206 // CHECK14-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
11207 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11208 // CHECK14:       omp.inner.for.cond:
11209 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
11210 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !31
11211 // CHECK14-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
11212 // CHECK14-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11213 // CHECK14:       omp.inner.for.body:
11214 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
11215 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
11216 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11217 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !31
11218 // CHECK14-NEXT:    invoke void @_Z3foov()
11219 // CHECK14-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !31
11220 // CHECK14:       invoke.cont:
11221 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
11222 // CHECK14:       omp.body.continue:
11223 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11224 // CHECK14:       omp.inner.for.inc:
11225 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
11226 // CHECK14-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
11227 // CHECK14-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
11228 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]
11229 // CHECK14:       omp.inner.for.end:
11230 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11231 // CHECK14:       omp.loop.exit:
11232 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
11233 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11234 // CHECK14-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
11235 // CHECK14-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11236 // CHECK14:       .omp.final.then:
11237 // CHECK14-NEXT:    store i32 100, i32* [[I]], align 4
11238 // CHECK14-NEXT:    br label [[DOTOMP_FINAL_DONE]]
11239 // CHECK14:       .omp.final.done:
11240 // CHECK14-NEXT:    ret void
11241 // CHECK14:       terminate.lpad:
11242 // CHECK14-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
11243 // CHECK14-NEXT:    catch i8* null
11244 // CHECK14-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
11245 // CHECK14-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !31
11246 // CHECK14-NEXT:    unreachable
11247 //
11248 //
11249 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57
11250 // CHECK14-SAME: () #[[ATTR3]] {
11251 // CHECK14-NEXT:  entry:
11252 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
11253 // CHECK14-NEXT:    ret void
11254 //
11255 //
11256 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..6
11257 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
11258 // CHECK14-NEXT:  entry:
11259 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11260 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11261 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11262 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11263 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11264 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11265 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11266 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11267 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11268 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11269 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11270 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11271 // CHECK14-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
11272 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11273 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11274 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11275 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
11276 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11277 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11278 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
11279 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11280 // CHECK14:       cond.true:
11281 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11282 // CHECK14:       cond.false:
11283 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11284 // CHECK14-NEXT:    br label [[COND_END]]
11285 // CHECK14:       cond.end:
11286 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
11287 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11288 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11289 // CHECK14-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
11290 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11291 // CHECK14:       omp.inner.for.cond:
11292 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
11293 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !34
11294 // CHECK14-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
11295 // CHECK14-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11296 // CHECK14:       omp.inner.for.body:
11297 // CHECK14-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23), !llvm.access.group !34
11298 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !34
11299 // CHECK14-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
11300 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !34
11301 // CHECK14-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
11302 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !34
11303 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11304 // CHECK14:       omp.inner.for.inc:
11305 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
11306 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !34
11307 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
11308 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
11309 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]]
11310 // CHECK14:       omp.inner.for.end:
11311 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11312 // CHECK14:       omp.loop.exit:
11313 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
11314 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11315 // CHECK14-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
11316 // CHECK14-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11317 // CHECK14:       .omp.final.then:
11318 // CHECK14-NEXT:    store i32 100, i32* [[I]], align 4
11319 // CHECK14-NEXT:    br label [[DOTOMP_FINAL_DONE]]
11320 // CHECK14:       .omp.final.done:
11321 // CHECK14-NEXT:    ret void
11322 //
11323 //
11324 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..7
11325 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
11326 // CHECK14-NEXT:  entry:
11327 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11328 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11329 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11330 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11331 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11332 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11333 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
11334 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
11335 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11336 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11337 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11338 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11339 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11340 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11341 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11342 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
11343 // CHECK14-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
11344 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11345 // CHECK14-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
11346 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11347 // CHECK14-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
11348 // CHECK14-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
11349 // CHECK14-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
11350 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11351 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11352 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11353 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
11354 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11355 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11356 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
11357 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11358 // CHECK14:       cond.true:
11359 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11360 // CHECK14:       cond.false:
11361 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11362 // CHECK14-NEXT:    br label [[COND_END]]
11363 // CHECK14:       cond.end:
11364 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
11365 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11366 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11367 // CHECK14-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
11368 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11369 // CHECK14:       omp.inner.for.cond:
11370 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
11371 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !37
11372 // CHECK14-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
11373 // CHECK14-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11374 // CHECK14:       omp.inner.for.body:
11375 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
11376 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
11377 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11378 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !37
11379 // CHECK14-NEXT:    invoke void @_Z3foov()
11380 // CHECK14-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !37
11381 // CHECK14:       invoke.cont:
11382 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
11383 // CHECK14:       omp.body.continue:
11384 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11385 // CHECK14:       omp.inner.for.inc:
11386 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
11387 // CHECK14-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
11388 // CHECK14-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
11389 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP38:![0-9]+]]
11390 // CHECK14:       omp.inner.for.end:
11391 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11392 // CHECK14:       omp.loop.exit:
11393 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
11394 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11395 // CHECK14-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
11396 // CHECK14-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11397 // CHECK14:       .omp.final.then:
11398 // CHECK14-NEXT:    store i32 100, i32* [[I]], align 4
11399 // CHECK14-NEXT:    br label [[DOTOMP_FINAL_DONE]]
11400 // CHECK14:       .omp.final.done:
11401 // CHECK14-NEXT:    ret void
11402 // CHECK14:       terminate.lpad:
11403 // CHECK14-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
11404 // CHECK14-NEXT:    catch i8* null
11405 // CHECK14-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
11406 // CHECK14-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !37
11407 // CHECK14-NEXT:    unreachable
11408 //
11409 //
11410 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52
11411 // CHECK14-SAME: () #[[ATTR3]] {
11412 // CHECK14-NEXT:  entry:
11413 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*))
11414 // CHECK14-NEXT:    ret void
11415 //
11416 //
11417 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..8
11418 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
11419 // CHECK14-NEXT:  entry:
11420 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11421 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11422 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11423 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11424 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11425 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11426 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11427 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11428 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11429 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11430 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11431 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11432 // CHECK14-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
11433 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11434 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11435 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11436 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
11437 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11438 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11439 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
11440 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11441 // CHECK14:       cond.true:
11442 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11443 // CHECK14:       cond.false:
11444 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11445 // CHECK14-NEXT:    br label [[COND_END]]
11446 // CHECK14:       cond.end:
11447 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
11448 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11449 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11450 // CHECK14-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
11451 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11452 // CHECK14:       omp.inner.for.cond:
11453 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40
11454 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !40
11455 // CHECK14-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
11456 // CHECK14-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11457 // CHECK14:       omp.inner.for.body:
11458 // CHECK14-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1), !llvm.access.group !40
11459 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !40
11460 // CHECK14-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
11461 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !40
11462 // CHECK14-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
11463 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !40
11464 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11465 // CHECK14:       omp.inner.for.inc:
11466 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40
11467 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !40
11468 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
11469 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40
11470 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP41:![0-9]+]]
11471 // CHECK14:       omp.inner.for.end:
11472 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11473 // CHECK14:       omp.loop.exit:
11474 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
11475 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11476 // CHECK14-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
11477 // CHECK14-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11478 // CHECK14:       .omp.final.then:
11479 // CHECK14-NEXT:    store i32 100, i32* [[I]], align 4
11480 // CHECK14-NEXT:    br label [[DOTOMP_FINAL_DONE]]
11481 // CHECK14:       .omp.final.done:
11482 // CHECK14-NEXT:    ret void
11483 //
11484 //
11485 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..9
11486 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
11487 // CHECK14-NEXT:  entry:
11488 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11489 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11490 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11491 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11492 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11493 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11494 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
11495 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
11496 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11497 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11498 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11499 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11500 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11501 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11502 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11503 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
11504 // CHECK14-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
11505 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11506 // CHECK14-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
11507 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11508 // CHECK14-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
11509 // CHECK14-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
11510 // CHECK14-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
11511 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11512 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11513 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11514 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
11515 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11516 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11517 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
11518 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11519 // CHECK14:       cond.true:
11520 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11521 // CHECK14:       cond.false:
11522 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11523 // CHECK14-NEXT:    br label [[COND_END]]
11524 // CHECK14:       cond.end:
11525 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
11526 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11527 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11528 // CHECK14-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
11529 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11530 // CHECK14:       omp.inner.for.cond:
11531 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
11532 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !43
11533 // CHECK14-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
11534 // CHECK14-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11535 // CHECK14:       omp.inner.for.body:
11536 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
11537 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
11538 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11539 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !43
11540 // CHECK14-NEXT:    invoke void @_Z3foov()
11541 // CHECK14-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !43
11542 // CHECK14:       invoke.cont:
11543 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
11544 // CHECK14:       omp.body.continue:
11545 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11546 // CHECK14:       omp.inner.for.inc:
11547 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
11548 // CHECK14-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
11549 // CHECK14-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
11550 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]]
11551 // CHECK14:       omp.inner.for.end:
11552 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11553 // CHECK14:       omp.loop.exit:
11554 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
11555 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11556 // CHECK14-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
11557 // CHECK14-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11558 // CHECK14:       .omp.final.then:
11559 // CHECK14-NEXT:    store i32 100, i32* [[I]], align 4
11560 // CHECK14-NEXT:    br label [[DOTOMP_FINAL_DONE]]
11561 // CHECK14:       .omp.final.done:
11562 // CHECK14-NEXT:    ret void
11563 // CHECK14:       terminate.lpad:
11564 // CHECK14-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
11565 // CHECK14-NEXT:    catch i8* null
11566 // CHECK14-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
11567 // CHECK14-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !43
11568 // CHECK14-NEXT:    unreachable
11569 //
11570 //
11571 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57
11572 // CHECK14-SAME: () #[[ATTR3]] {
11573 // CHECK14-NEXT:  entry:
11574 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
11575 // CHECK14-NEXT:    ret void
11576 //
11577 //
11578 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..10
11579 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
11580 // CHECK14-NEXT:  entry:
11581 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11582 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11583 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11584 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11585 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11586 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11587 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11588 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11589 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11590 // CHECK14-NEXT:    [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8
11591 // CHECK14-NEXT:    [[EXN_SLOT:%.*]] = alloca i8*, align 8
11592 // CHECK14-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
11593 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11594 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11595 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11596 // CHECK14-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
11597 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11598 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11599 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11600 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
11601 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11602 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11603 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
11604 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11605 // CHECK14:       cond.true:
11606 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11607 // CHECK14:       cond.false:
11608 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11609 // CHECK14-NEXT:    br label [[COND_END]]
11610 // CHECK14:       cond.end:
11611 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
11612 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11613 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11614 // CHECK14-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
11615 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11616 // CHECK14:       omp.inner.for.cond:
11617 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
11618 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !46
11619 // CHECK14-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
11620 // CHECK14-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11621 // CHECK14:       omp.inner.for.body:
11622 // CHECK14-NEXT:    invoke void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 23)
11623 // CHECK14-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !46
11624 // CHECK14:       invoke.cont:
11625 // CHECK14-NEXT:    [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]])
11626 // CHECK14-NEXT:    to label [[INVOKE_CONT2:%.*]] unwind label [[LPAD:%.*]], !llvm.access.group !46
11627 // CHECK14:       invoke.cont2:
11628 // CHECK14-NEXT:    [[TMP7:%.*]] = sext i8 [[CALL]] to i32
11629 // CHECK14-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]]), !llvm.access.group !46
11630 // CHECK14-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]], !llvm.access.group !46
11631 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !46
11632 // CHECK14-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
11633 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !46
11634 // CHECK14-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
11635 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]), !llvm.access.group !46
11636 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11637 // CHECK14:       omp.inner.for.inc:
11638 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
11639 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !46
11640 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
11641 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
11642 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP47:![0-9]+]]
11643 // CHECK14:       lpad:
11644 // CHECK14-NEXT:    [[TMP14:%.*]] = landingpad { i8*, i32 }
11645 // CHECK14-NEXT:    catch i8* null
11646 // CHECK14-NEXT:    [[TMP15:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 0
11647 // CHECK14-NEXT:    store i8* [[TMP15]], i8** [[EXN_SLOT]], align 8, !llvm.access.group !46
11648 // CHECK14-NEXT:    [[TMP16:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 1
11649 // CHECK14-NEXT:    store i32 [[TMP16]], i32* [[EHSELECTOR_SLOT]], align 4, !llvm.access.group !46
11650 // CHECK14-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]], !llvm.access.group !46
11651 // CHECK14-NEXT:    br label [[TERMINATE_HANDLER:%.*]]
11652 // CHECK14:       omp.inner.for.end:
11653 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11654 // CHECK14:       omp.loop.exit:
11655 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
11656 // CHECK14-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11657 // CHECK14-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
11658 // CHECK14-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11659 // CHECK14:       .omp.final.then:
11660 // CHECK14-NEXT:    store i32 100, i32* [[I]], align 4
11661 // CHECK14-NEXT:    br label [[DOTOMP_FINAL_DONE]]
11662 // CHECK14:       .omp.final.done:
11663 // CHECK14-NEXT:    ret void
11664 // CHECK14:       terminate.lpad:
11665 // CHECK14-NEXT:    [[TMP19:%.*]] = landingpad { i8*, i32 }
11666 // CHECK14-NEXT:    catch i8* null
11667 // CHECK14-NEXT:    [[TMP20:%.*]] = extractvalue { i8*, i32 } [[TMP19]], 0
11668 // CHECK14-NEXT:    call void @__clang_call_terminate(i8* [[TMP20]]) #[[ATTR10]], !llvm.access.group !46
11669 // CHECK14-NEXT:    unreachable
11670 // CHECK14:       terminate.handler:
11671 // CHECK14-NEXT:    [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8, !llvm.access.group !46
11672 // CHECK14-NEXT:    call void @__clang_call_terminate(i8* [[EXN]]) #[[ATTR10]], !llvm.access.group !46
11673 // CHECK14-NEXT:    unreachable
11674 //
11675 //
11676 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..11
11677 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
11678 // CHECK14-NEXT:  entry:
11679 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11680 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11681 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11682 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11683 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11684 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11685 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
11686 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
11687 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11688 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11689 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11690 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11691 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11692 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11693 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11694 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
11695 // CHECK14-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
11696 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11697 // CHECK14-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
11698 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11699 // CHECK14-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
11700 // CHECK14-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
11701 // CHECK14-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
11702 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11703 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11704 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11705 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
11706 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11707 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11708 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
11709 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11710 // CHECK14:       cond.true:
11711 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11712 // CHECK14:       cond.false:
11713 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11714 // CHECK14-NEXT:    br label [[COND_END]]
11715 // CHECK14:       cond.end:
11716 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
11717 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11718 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11719 // CHECK14-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
11720 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11721 // CHECK14:       omp.inner.for.cond:
11722 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
11723 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !49
11724 // CHECK14-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
11725 // CHECK14-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11726 // CHECK14:       omp.inner.for.body:
11727 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
11728 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
11729 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11730 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !49
11731 // CHECK14-NEXT:    invoke void @_Z3foov()
11732 // CHECK14-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !49
11733 // CHECK14:       invoke.cont:
11734 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
11735 // CHECK14:       omp.body.continue:
11736 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11737 // CHECK14:       omp.inner.for.inc:
11738 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
11739 // CHECK14-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
11740 // CHECK14-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
11741 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP50:![0-9]+]]
11742 // CHECK14:       omp.inner.for.end:
11743 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11744 // CHECK14:       omp.loop.exit:
11745 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
11746 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11747 // CHECK14-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
11748 // CHECK14-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11749 // CHECK14:       .omp.final.then:
11750 // CHECK14-NEXT:    store i32 100, i32* [[I]], align 4
11751 // CHECK14-NEXT:    br label [[DOTOMP_FINAL_DONE]]
11752 // CHECK14:       .omp.final.done:
11753 // CHECK14-NEXT:    ret void
11754 // CHECK14:       terminate.lpad:
11755 // CHECK14-NEXT:    [[TMP13:%.*]] = landingpad { i8*, i32 }
11756 // CHECK14-NEXT:    catch i8* null
11757 // CHECK14-NEXT:    [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
11758 // CHECK14-NEXT:    call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group !49
11759 // CHECK14-NEXT:    unreachable
11760 //
11761 //
11762 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SD2Ev
11763 // CHECK14-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
11764 // CHECK14-NEXT:  entry:
11765 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
11766 // CHECK14-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
11767 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
11768 // CHECK14-NEXT:    ret void
11769 //
11770 //
11771 // CHECK14-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
11772 // CHECK14-SAME: () #[[ATTR9:[0-9]+]] {
11773 // CHECK14-NEXT:  entry:
11774 // CHECK14-NEXT:    call void @__tgt_register_requires(i64 1)
11775 // CHECK14-NEXT:    ret void
11776 //
11777 //
11778 // CHECK15-LABEL: define {{[^@]+}}@main
11779 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
11780 // CHECK15-NEXT:  entry:
11781 // CHECK15-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
11782 // CHECK15-NEXT:    [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
11783 // CHECK15-NEXT:    [[A:%.*]] = alloca i8, align 1
11784 // CHECK15-NEXT:    [[EXN_SLOT:%.*]] = alloca i8*, align 8
11785 // CHECK15-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
11786 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11787 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
11788 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
11789 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11790 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
11791 // CHECK15-NEXT:    [[_TMP3:%.*]] = alloca i32, align 4
11792 // CHECK15-NEXT:    [[DOTOMP_LB4:%.*]] = alloca i32, align 4
11793 // CHECK15-NEXT:    [[DOTOMP_UB5:%.*]] = alloca i32, align 4
11794 // CHECK15-NEXT:    [[DOTOMP_IV6:%.*]] = alloca i32, align 4
11795 // CHECK15-NEXT:    [[I7:%.*]] = alloca i32, align 4
11796 // CHECK15-NEXT:    store i32 0, i32* [[RETVAL]], align 4
11797 // CHECK15-NEXT:    call void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[S]], i64 0)
11798 // CHECK15-NEXT:    [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[S]])
11799 // CHECK15-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
11800 // CHECK15:       invoke.cont:
11801 // CHECK15-NEXT:    store i8 [[CALL]], i8* [[A]], align 1
11802 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
11803 // CHECK15-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
11804 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11805 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
11806 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11807 // CHECK15:       omp.inner.for.cond:
11808 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
11809 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
11810 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
11811 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11812 // CHECK15:       omp.inner.for.body:
11813 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
11814 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
11815 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11816 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6
11817 // CHECK15-NEXT:    invoke void @_Z3foov()
11818 // CHECK15-NEXT:    to label [[INVOKE_CONT1:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !6
11819 // CHECK15:       invoke.cont1:
11820 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
11821 // CHECK15:       omp.body.continue:
11822 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11823 // CHECK15:       omp.inner.for.inc:
11824 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
11825 // CHECK15-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP4]], 1
11826 // CHECK15-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
11827 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
11828 // CHECK15:       lpad:
11829 // CHECK15-NEXT:    [[TMP5:%.*]] = landingpad { i8*, i32 }
11830 // CHECK15-NEXT:    cleanup
11831 // CHECK15-NEXT:    [[TMP6:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 0
11832 // CHECK15-NEXT:    store i8* [[TMP6]], i8** [[EXN_SLOT]], align 8
11833 // CHECK15-NEXT:    [[TMP7:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 1
11834 // CHECK15-NEXT:    store i32 [[TMP7]], i32* [[EHSELECTOR_SLOT]], align 4
11835 // CHECK15-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR7:[0-9]+]]
11836 // CHECK15-NEXT:    br label [[EH_RESUME:%.*]]
11837 // CHECK15:       omp.inner.for.end:
11838 // CHECK15-NEXT:    store i32 100, i32* [[I]], align 4
11839 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB4]], align 4
11840 // CHECK15-NEXT:    store i32 99, i32* [[DOTOMP_UB5]], align 4
11841 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB4]], align 4
11842 // CHECK15-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV6]], align 4
11843 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND8:%.*]]
11844 // CHECK15:       omp.inner.for.cond8:
11845 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !10
11846 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB5]], align 4, !llvm.access.group !10
11847 // CHECK15-NEXT:    [[CMP9:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
11848 // CHECK15-NEXT:    br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END17:%.*]]
11849 // CHECK15:       omp.inner.for.body10:
11850 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !10
11851 // CHECK15-NEXT:    [[MUL11:%.*]] = mul nsw i32 [[TMP11]], 1
11852 // CHECK15-NEXT:    [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
11853 // CHECK15-NEXT:    store i32 [[ADD12]], i32* [[I7]], align 4, !llvm.access.group !10
11854 // CHECK15-NEXT:    invoke void @_Z3foov()
11855 // CHECK15-NEXT:    to label [[INVOKE_CONT13:%.*]] unwind label [[TERMINATE_LPAD]], !llvm.access.group !10
11856 // CHECK15:       invoke.cont13:
11857 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE14:%.*]]
11858 // CHECK15:       omp.body.continue14:
11859 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC15:%.*]]
11860 // CHECK15:       omp.inner.for.inc15:
11861 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !10
11862 // CHECK15-NEXT:    [[ADD16:%.*]] = add nsw i32 [[TMP12]], 1
11863 // CHECK15-NEXT:    store i32 [[ADD16]], i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !10
11864 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP11:![0-9]+]]
11865 // CHECK15:       omp.inner.for.end17:
11866 // CHECK15-NEXT:    store i32 100, i32* [[I7]], align 4
11867 // CHECK15-NEXT:    [[TMP13:%.*]] = load i8, i8* [[A]], align 1
11868 // CHECK15-NEXT:    [[CONV:%.*]] = sext i8 [[TMP13]] to i32
11869 // CHECK15-NEXT:    [[CALL19:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv()
11870 // CHECK15-NEXT:    to label [[INVOKE_CONT18:%.*]] unwind label [[LPAD]]
11871 // CHECK15:       invoke.cont18:
11872 // CHECK15-NEXT:    [[ADD20:%.*]] = add nsw i32 [[CONV]], [[CALL19]]
11873 // CHECK15-NEXT:    [[CALL22:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv()
11874 // CHECK15-NEXT:    to label [[INVOKE_CONT21:%.*]] unwind label [[LPAD]]
11875 // CHECK15:       invoke.cont21:
11876 // CHECK15-NEXT:    [[ADD23:%.*]] = add nsw i32 [[ADD20]], [[CALL22]]
11877 // CHECK15-NEXT:    store i32 [[ADD23]], i32* [[RETVAL]], align 4
11878 // CHECK15-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR7]]
11879 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4
11880 // CHECK15-NEXT:    ret i32 [[TMP14]]
11881 // CHECK15:       eh.resume:
11882 // CHECK15-NEXT:    [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8
11883 // CHECK15-NEXT:    [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
11884 // CHECK15-NEXT:    [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
11885 // CHECK15-NEXT:    [[LPAD_VAL24:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
11886 // CHECK15-NEXT:    resume { i8*, i32 } [[LPAD_VAL24]]
11887 // CHECK15:       terminate.lpad:
11888 // CHECK15-NEXT:    [[TMP15:%.*]] = landingpad { i8*, i32 }
11889 // CHECK15-NEXT:    catch i8* null
11890 // CHECK15-NEXT:    [[TMP16:%.*]] = extractvalue { i8*, i32 } [[TMP15]], 0
11891 // CHECK15-NEXT:    call void @__clang_call_terminate(i8* [[TMP16]]) #[[ATTR8:[0-9]+]], !llvm.access.group !6
11892 // CHECK15-NEXT:    unreachable
11893 //
11894 //
11895 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SC1El
11896 // CHECK15-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
11897 // CHECK15-NEXT:  entry:
11898 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
11899 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
11900 // CHECK15-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
11901 // CHECK15-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
11902 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
11903 // CHECK15-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
11904 // CHECK15-NEXT:    call void @_ZN1SC2El(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]], i64 [[TMP0]])
11905 // CHECK15-NEXT:    ret void
11906 //
11907 //
11908 // CHECK15-LABEL: define {{[^@]+}}@_ZN1ScvcEv
11909 // CHECK15-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 {
11910 // CHECK15-NEXT:  entry:
11911 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
11912 // CHECK15-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
11913 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
11914 // CHECK15-NEXT:    call void @_Z8mayThrowv()
11915 // CHECK15-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
11916 // CHECK15-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A]], align 8
11917 // CHECK15-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i8
11918 // CHECK15-NEXT:    ret i8 [[CONV]]
11919 //
11920 //
11921 // CHECK15-LABEL: define {{[^@]+}}@__clang_call_terminate
11922 // CHECK15-SAME: (i8* [[TMP0:%.*]]) #[[ATTR4:[0-9]+]] comdat {
11923 // CHECK15-NEXT:    [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR7]]
11924 // CHECK15-NEXT:    call void @_ZSt9terminatev() #[[ATTR8]]
11925 // CHECK15-NEXT:    unreachable
11926 //
11927 //
11928 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv
11929 // CHECK15-SAME: () #[[ATTR5:[0-9]+]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
11930 // CHECK15-NEXT:  entry:
11931 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11932 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
11933 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
11934 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11935 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
11936 // CHECK15-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
11937 // CHECK15-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
11938 // CHECK15-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
11939 // CHECK15-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
11940 // CHECK15-NEXT:    [[I6:%.*]] = alloca i32, align 4
11941 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
11942 // CHECK15-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
11943 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11944 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
11945 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11946 // CHECK15:       omp.inner.for.cond:
11947 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
11948 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
11949 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
11950 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11951 // CHECK15:       omp.inner.for.body:
11952 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
11953 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
11954 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11955 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
11956 // CHECK15-NEXT:    invoke void @_Z3foov()
11957 // CHECK15-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !13
11958 // CHECK15:       invoke.cont:
11959 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
11960 // CHECK15:       omp.body.continue:
11961 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11962 // CHECK15:       omp.inner.for.inc:
11963 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
11964 // CHECK15-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
11965 // CHECK15-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
11966 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
11967 // CHECK15:       omp.inner.for.end:
11968 // CHECK15-NEXT:    store i32 100, i32* [[I]], align 4
11969 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB3]], align 4
11970 // CHECK15-NEXT:    store i32 99, i32* [[DOTOMP_UB4]], align 4
11971 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
11972 // CHECK15-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
11973 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
11974 // CHECK15:       omp.inner.for.cond7:
11975 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16
11976 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !16
11977 // CHECK15-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
11978 // CHECK15-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]]
11979 // CHECK15:       omp.inner.for.body9:
11980 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16
11981 // CHECK15-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
11982 // CHECK15-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
11983 // CHECK15-NEXT:    store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !16
11984 // CHECK15-NEXT:    invoke void @_Z3foov()
11985 // CHECK15-NEXT:    to label [[INVOKE_CONT12:%.*]] unwind label [[TERMINATE_LPAD]], !llvm.access.group !16
11986 // CHECK15:       invoke.cont12:
11987 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE13:%.*]]
11988 // CHECK15:       omp.body.continue13:
11989 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC14:%.*]]
11990 // CHECK15:       omp.inner.for.inc14:
11991 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16
11992 // CHECK15-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP9]], 1
11993 // CHECK15-NEXT:    store i32 [[ADD15]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16
11994 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP17:![0-9]+]]
11995 // CHECK15:       omp.inner.for.end16:
11996 // CHECK15-NEXT:    store i32 100, i32* [[I6]], align 4
11997 // CHECK15-NEXT:    ret i32 0
11998 // CHECK15:       terminate.lpad:
11999 // CHECK15-NEXT:    [[TMP10:%.*]] = landingpad { i8*, i32 }
12000 // CHECK15-NEXT:    catch i8* null
12001 // CHECK15-NEXT:    [[TMP11:%.*]] = extractvalue { i8*, i32 } [[TMP10]], 0
12002 // CHECK15-NEXT:    call void @__clang_call_terminate(i8* [[TMP11]]) #[[ATTR8]], !llvm.access.group !13
12003 // CHECK15-NEXT:    unreachable
12004 //
12005 //
12006 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv
12007 // CHECK15-SAME: () #[[ATTR5]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
12008 // CHECK15-NEXT:  entry:
12009 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12010 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
12011 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
12012 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12013 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
12014 // CHECK15-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
12015 // CHECK15-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
12016 // CHECK15-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
12017 // CHECK15-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
12018 // CHECK15-NEXT:    [[I6:%.*]] = alloca i32, align 4
12019 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
12020 // CHECK15-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
12021 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12022 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
12023 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12024 // CHECK15:       omp.inner.for.cond:
12025 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
12026 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19
12027 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
12028 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12029 // CHECK15:       omp.inner.for.body:
12030 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
12031 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
12032 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12033 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !19
12034 // CHECK15-NEXT:    invoke void @_Z3foov()
12035 // CHECK15-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !19
12036 // CHECK15:       invoke.cont:
12037 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
12038 // CHECK15:       omp.body.continue:
12039 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12040 // CHECK15:       omp.inner.for.inc:
12041 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
12042 // CHECK15-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
12043 // CHECK15-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
12044 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
12045 // CHECK15:       omp.inner.for.end:
12046 // CHECK15-NEXT:    store i32 100, i32* [[I]], align 4
12047 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB3]], align 4
12048 // CHECK15-NEXT:    store i32 99, i32* [[DOTOMP_UB4]], align 4
12049 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
12050 // CHECK15-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
12051 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
12052 // CHECK15:       omp.inner.for.cond7:
12053 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !22
12054 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !22
12055 // CHECK15-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
12056 // CHECK15-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]]
12057 // CHECK15:       omp.inner.for.body9:
12058 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !22
12059 // CHECK15-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
12060 // CHECK15-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
12061 // CHECK15-NEXT:    store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !22
12062 // CHECK15-NEXT:    invoke void @_Z3foov()
12063 // CHECK15-NEXT:    to label [[INVOKE_CONT12:%.*]] unwind label [[TERMINATE_LPAD]], !llvm.access.group !22
12064 // CHECK15:       invoke.cont12:
12065 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE13:%.*]]
12066 // CHECK15:       omp.body.continue13:
12067 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC14:%.*]]
12068 // CHECK15:       omp.inner.for.inc14:
12069 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !22
12070 // CHECK15-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP9]], 1
12071 // CHECK15-NEXT:    store i32 [[ADD15]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !22
12072 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP23:![0-9]+]]
12073 // CHECK15:       omp.inner.for.end16:
12074 // CHECK15-NEXT:    store i32 100, i32* [[I6]], align 4
12075 // CHECK15-NEXT:    ret i32 0
12076 // CHECK15:       terminate.lpad:
12077 // CHECK15-NEXT:    [[TMP10:%.*]] = landingpad { i8*, i32 }
12078 // CHECK15-NEXT:    catch i8* null
12079 // CHECK15-NEXT:    [[TMP11:%.*]] = extractvalue { i8*, i32 } [[TMP10]], 0
12080 // CHECK15-NEXT:    call void @__clang_call_terminate(i8* [[TMP11]]) #[[ATTR8]], !llvm.access.group !19
12081 // CHECK15-NEXT:    unreachable
12082 //
12083 //
12084 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SD1Ev
12085 // CHECK15-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6:[0-9]+]] comdat align 2 {
12086 // CHECK15-NEXT:  entry:
12087 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
12088 // CHECK15-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
12089 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
12090 // CHECK15-NEXT:    call void @_ZN1SD2Ev(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR7]]
12091 // CHECK15-NEXT:    ret void
12092 //
12093 //
12094 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SC2El
12095 // CHECK15-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
12096 // CHECK15-NEXT:  entry:
12097 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
12098 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
12099 // CHECK15-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
12100 // CHECK15-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
12101 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
12102 // CHECK15-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
12103 // CHECK15-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
12104 // CHECK15-NEXT:    store i64 [[TMP0]], i64* [[A2]], align 8
12105 // CHECK15-NEXT:    ret void
12106 //
12107 //
12108 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SD2Ev
12109 // CHECK15-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
12110 // CHECK15-NEXT:  entry:
12111 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
12112 // CHECK15-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
12113 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
12114 // CHECK15-NEXT:    ret void
12115 //
12116 //
12117 // CHECK16-LABEL: define {{[^@]+}}@main
12118 // CHECK16-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
12119 // CHECK16-NEXT:  entry:
12120 // CHECK16-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
12121 // CHECK16-NEXT:    [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
12122 // CHECK16-NEXT:    [[A:%.*]] = alloca i8, align 1
12123 // CHECK16-NEXT:    [[EXN_SLOT:%.*]] = alloca i8*, align 8
12124 // CHECK16-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
12125 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12126 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
12127 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
12128 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12129 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
12130 // CHECK16-NEXT:    [[_TMP3:%.*]] = alloca i32, align 4
12131 // CHECK16-NEXT:    [[DOTOMP_LB4:%.*]] = alloca i32, align 4
12132 // CHECK16-NEXT:    [[DOTOMP_UB5:%.*]] = alloca i32, align 4
12133 // CHECK16-NEXT:    [[DOTOMP_IV6:%.*]] = alloca i32, align 4
12134 // CHECK16-NEXT:    [[I7:%.*]] = alloca i32, align 4
12135 // CHECK16-NEXT:    store i32 0, i32* [[RETVAL]], align 4
12136 // CHECK16-NEXT:    call void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[S]], i64 0)
12137 // CHECK16-NEXT:    [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[S]])
12138 // CHECK16-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
12139 // CHECK16:       invoke.cont:
12140 // CHECK16-NEXT:    store i8 [[CALL]], i8* [[A]], align 1
12141 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
12142 // CHECK16-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
12143 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12144 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
12145 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12146 // CHECK16:       omp.inner.for.cond:
12147 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
12148 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
12149 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
12150 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12151 // CHECK16:       omp.inner.for.body:
12152 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
12153 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
12154 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12155 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6
12156 // CHECK16-NEXT:    invoke void @_Z3foov()
12157 // CHECK16-NEXT:    to label [[INVOKE_CONT1:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !6
12158 // CHECK16:       invoke.cont1:
12159 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
12160 // CHECK16:       omp.body.continue:
12161 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12162 // CHECK16:       omp.inner.for.inc:
12163 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
12164 // CHECK16-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP4]], 1
12165 // CHECK16-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
12166 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
12167 // CHECK16:       lpad:
12168 // CHECK16-NEXT:    [[TMP5:%.*]] = landingpad { i8*, i32 }
12169 // CHECK16-NEXT:    cleanup
12170 // CHECK16-NEXT:    [[TMP6:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 0
12171 // CHECK16-NEXT:    store i8* [[TMP6]], i8** [[EXN_SLOT]], align 8
12172 // CHECK16-NEXT:    [[TMP7:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 1
12173 // CHECK16-NEXT:    store i32 [[TMP7]], i32* [[EHSELECTOR_SLOT]], align 4
12174 // CHECK16-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR7:[0-9]+]]
12175 // CHECK16-NEXT:    br label [[EH_RESUME:%.*]]
12176 // CHECK16:       omp.inner.for.end:
12177 // CHECK16-NEXT:    store i32 100, i32* [[I]], align 4
12178 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB4]], align 4
12179 // CHECK16-NEXT:    store i32 99, i32* [[DOTOMP_UB5]], align 4
12180 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB4]], align 4
12181 // CHECK16-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV6]], align 4
12182 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND8:%.*]]
12183 // CHECK16:       omp.inner.for.cond8:
12184 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !10
12185 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB5]], align 4, !llvm.access.group !10
12186 // CHECK16-NEXT:    [[CMP9:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
12187 // CHECK16-NEXT:    br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END17:%.*]]
12188 // CHECK16:       omp.inner.for.body10:
12189 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !10
12190 // CHECK16-NEXT:    [[MUL11:%.*]] = mul nsw i32 [[TMP11]], 1
12191 // CHECK16-NEXT:    [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
12192 // CHECK16-NEXT:    store i32 [[ADD12]], i32* [[I7]], align 4, !llvm.access.group !10
12193 // CHECK16-NEXT:    invoke void @_Z3foov()
12194 // CHECK16-NEXT:    to label [[INVOKE_CONT13:%.*]] unwind label [[TERMINATE_LPAD]], !llvm.access.group !10
12195 // CHECK16:       invoke.cont13:
12196 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE14:%.*]]
12197 // CHECK16:       omp.body.continue14:
12198 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC15:%.*]]
12199 // CHECK16:       omp.inner.for.inc15:
12200 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !10
12201 // CHECK16-NEXT:    [[ADD16:%.*]] = add nsw i32 [[TMP12]], 1
12202 // CHECK16-NEXT:    store i32 [[ADD16]], i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !10
12203 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP11:![0-9]+]]
12204 // CHECK16:       omp.inner.for.end17:
12205 // CHECK16-NEXT:    store i32 100, i32* [[I7]], align 4
12206 // CHECK16-NEXT:    [[TMP13:%.*]] = load i8, i8* [[A]], align 1
12207 // CHECK16-NEXT:    [[CONV:%.*]] = sext i8 [[TMP13]] to i32
12208 // CHECK16-NEXT:    [[CALL19:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv()
12209 // CHECK16-NEXT:    to label [[INVOKE_CONT18:%.*]] unwind label [[LPAD]]
12210 // CHECK16:       invoke.cont18:
12211 // CHECK16-NEXT:    [[ADD20:%.*]] = add nsw i32 [[CONV]], [[CALL19]]
12212 // CHECK16-NEXT:    [[CALL22:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv()
12213 // CHECK16-NEXT:    to label [[INVOKE_CONT21:%.*]] unwind label [[LPAD]]
12214 // CHECK16:       invoke.cont21:
12215 // CHECK16-NEXT:    [[ADD23:%.*]] = add nsw i32 [[ADD20]], [[CALL22]]
12216 // CHECK16-NEXT:    store i32 [[ADD23]], i32* [[RETVAL]], align 4
12217 // CHECK16-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR7]]
12218 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4
12219 // CHECK16-NEXT:    ret i32 [[TMP14]]
12220 // CHECK16:       eh.resume:
12221 // CHECK16-NEXT:    [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8
12222 // CHECK16-NEXT:    [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
12223 // CHECK16-NEXT:    [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
12224 // CHECK16-NEXT:    [[LPAD_VAL24:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
12225 // CHECK16-NEXT:    resume { i8*, i32 } [[LPAD_VAL24]]
12226 // CHECK16:       terminate.lpad:
12227 // CHECK16-NEXT:    [[TMP15:%.*]] = landingpad { i8*, i32 }
12228 // CHECK16-NEXT:    catch i8* null
12229 // CHECK16-NEXT:    [[TMP16:%.*]] = extractvalue { i8*, i32 } [[TMP15]], 0
12230 // CHECK16-NEXT:    call void @__clang_call_terminate(i8* [[TMP16]]) #[[ATTR8:[0-9]+]], !llvm.access.group !6
12231 // CHECK16-NEXT:    unreachable
12232 //
12233 //
12234 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SC1El
12235 // CHECK16-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
12236 // CHECK16-NEXT:  entry:
12237 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
12238 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
12239 // CHECK16-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
12240 // CHECK16-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
12241 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
12242 // CHECK16-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
12243 // CHECK16-NEXT:    call void @_ZN1SC2El(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]], i64 [[TMP0]])
12244 // CHECK16-NEXT:    ret void
12245 //
12246 //
12247 // CHECK16-LABEL: define {{[^@]+}}@_ZN1ScvcEv
12248 // CHECK16-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 {
12249 // CHECK16-NEXT:  entry:
12250 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
12251 // CHECK16-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
12252 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
12253 // CHECK16-NEXT:    call void @_Z8mayThrowv()
12254 // CHECK16-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
12255 // CHECK16-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A]], align 8
12256 // CHECK16-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i8
12257 // CHECK16-NEXT:    ret i8 [[CONV]]
12258 //
12259 //
12260 // CHECK16-LABEL: define {{[^@]+}}@__clang_call_terminate
12261 // CHECK16-SAME: (i8* [[TMP0:%.*]]) #[[ATTR4:[0-9]+]] comdat {
12262 // CHECK16-NEXT:    [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR7]]
12263 // CHECK16-NEXT:    call void @_ZSt9terminatev() #[[ATTR8]]
12264 // CHECK16-NEXT:    unreachable
12265 //
12266 //
12267 // CHECK16-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv
12268 // CHECK16-SAME: () #[[ATTR5:[0-9]+]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
12269 // CHECK16-NEXT:  entry:
12270 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12271 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
12272 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
12273 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12274 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
12275 // CHECK16-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
12276 // CHECK16-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
12277 // CHECK16-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
12278 // CHECK16-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
12279 // CHECK16-NEXT:    [[I6:%.*]] = alloca i32, align 4
12280 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
12281 // CHECK16-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
12282 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12283 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
12284 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12285 // CHECK16:       omp.inner.for.cond:
12286 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
12287 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
12288 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
12289 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12290 // CHECK16:       omp.inner.for.body:
12291 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
12292 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
12293 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12294 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
12295 // CHECK16-NEXT:    invoke void @_Z3foov()
12296 // CHECK16-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !13
12297 // CHECK16:       invoke.cont:
12298 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
12299 // CHECK16:       omp.body.continue:
12300 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12301 // CHECK16:       omp.inner.for.inc:
12302 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
12303 // CHECK16-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
12304 // CHECK16-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
12305 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
12306 // CHECK16:       omp.inner.for.end:
12307 // CHECK16-NEXT:    store i32 100, i32* [[I]], align 4
12308 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB3]], align 4
12309 // CHECK16-NEXT:    store i32 99, i32* [[DOTOMP_UB4]], align 4
12310 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
12311 // CHECK16-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
12312 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
12313 // CHECK16:       omp.inner.for.cond7:
12314 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16
12315 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !16
12316 // CHECK16-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
12317 // CHECK16-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]]
12318 // CHECK16:       omp.inner.for.body9:
12319 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16
12320 // CHECK16-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
12321 // CHECK16-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
12322 // CHECK16-NEXT:    store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !16
12323 // CHECK16-NEXT:    invoke void @_Z3foov()
12324 // CHECK16-NEXT:    to label [[INVOKE_CONT12:%.*]] unwind label [[TERMINATE_LPAD]], !llvm.access.group !16
12325 // CHECK16:       invoke.cont12:
12326 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE13:%.*]]
12327 // CHECK16:       omp.body.continue13:
12328 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC14:%.*]]
12329 // CHECK16:       omp.inner.for.inc14:
12330 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16
12331 // CHECK16-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP9]], 1
12332 // CHECK16-NEXT:    store i32 [[ADD15]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16
12333 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP17:![0-9]+]]
12334 // CHECK16:       omp.inner.for.end16:
12335 // CHECK16-NEXT:    store i32 100, i32* [[I6]], align 4
12336 // CHECK16-NEXT:    ret i32 0
12337 // CHECK16:       terminate.lpad:
12338 // CHECK16-NEXT:    [[TMP10:%.*]] = landingpad { i8*, i32 }
12339 // CHECK16-NEXT:    catch i8* null
12340 // CHECK16-NEXT:    [[TMP11:%.*]] = extractvalue { i8*, i32 } [[TMP10]], 0
12341 // CHECK16-NEXT:    call void @__clang_call_terminate(i8* [[TMP11]]) #[[ATTR8]], !llvm.access.group !13
12342 // CHECK16-NEXT:    unreachable
12343 //
12344 //
12345 // CHECK16-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv
12346 // CHECK16-SAME: () #[[ATTR5]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
12347 // CHECK16-NEXT:  entry:
12348 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12349 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
12350 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
12351 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12352 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
12353 // CHECK16-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
12354 // CHECK16-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
12355 // CHECK16-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
12356 // CHECK16-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
12357 // CHECK16-NEXT:    [[I6:%.*]] = alloca i32, align 4
12358 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
12359 // CHECK16-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
12360 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12361 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
12362 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12363 // CHECK16:       omp.inner.for.cond:
12364 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
12365 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19
12366 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
12367 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12368 // CHECK16:       omp.inner.for.body:
12369 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
12370 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
12371 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12372 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !19
12373 // CHECK16-NEXT:    invoke void @_Z3foov()
12374 // CHECK16-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group !19
12375 // CHECK16:       invoke.cont:
12376 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
12377 // CHECK16:       omp.body.continue:
12378 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12379 // CHECK16:       omp.inner.for.inc:
12380 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
12381 // CHECK16-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
12382 // CHECK16-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
12383 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
12384 // CHECK16:       omp.inner.for.end:
12385 // CHECK16-NEXT:    store i32 100, i32* [[I]], align 4
12386 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB3]], align 4
12387 // CHECK16-NEXT:    store i32 99, i32* [[DOTOMP_UB4]], align 4
12388 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
12389 // CHECK16-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
12390 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
12391 // CHECK16:       omp.inner.for.cond7:
12392 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !22
12393 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !22
12394 // CHECK16-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
12395 // CHECK16-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]]
12396 // CHECK16:       omp.inner.for.body9:
12397 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !22
12398 // CHECK16-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
12399 // CHECK16-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
12400 // CHECK16-NEXT:    store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !22
12401 // CHECK16-NEXT:    invoke void @_Z3foov()
12402 // CHECK16-NEXT:    to label [[INVOKE_CONT12:%.*]] unwind label [[TERMINATE_LPAD]], !llvm.access.group !22
12403 // CHECK16:       invoke.cont12:
12404 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE13:%.*]]
12405 // CHECK16:       omp.body.continue13:
12406 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC14:%.*]]
12407 // CHECK16:       omp.inner.for.inc14:
12408 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !22
12409 // CHECK16-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP9]], 1
12410 // CHECK16-NEXT:    store i32 [[ADD15]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !22
12411 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP23:![0-9]+]]
12412 // CHECK16:       omp.inner.for.end16:
12413 // CHECK16-NEXT:    store i32 100, i32* [[I6]], align 4
12414 // CHECK16-NEXT:    ret i32 0
12415 // CHECK16:       terminate.lpad:
12416 // CHECK16-NEXT:    [[TMP10:%.*]] = landingpad { i8*, i32 }
12417 // CHECK16-NEXT:    catch i8* null
12418 // CHECK16-NEXT:    [[TMP11:%.*]] = extractvalue { i8*, i32 } [[TMP10]], 0
12419 // CHECK16-NEXT:    call void @__clang_call_terminate(i8* [[TMP11]]) #[[ATTR8]], !llvm.access.group !19
12420 // CHECK16-NEXT:    unreachable
12421 //
12422 //
12423 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SD1Ev
12424 // CHECK16-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6:[0-9]+]] comdat align 2 {
12425 // CHECK16-NEXT:  entry:
12426 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
12427 // CHECK16-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
12428 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
12429 // CHECK16-NEXT:    call void @_ZN1SD2Ev(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR7]]
12430 // CHECK16-NEXT:    ret void
12431 //
12432 //
12433 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SC2El
12434 // CHECK16-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
12435 // CHECK16-NEXT:  entry:
12436 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
12437 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
12438 // CHECK16-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
12439 // CHECK16-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
12440 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
12441 // CHECK16-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
12442 // CHECK16-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
12443 // CHECK16-NEXT:    store i64 [[TMP0]], i64* [[A2]], align 8
12444 // CHECK16-NEXT:    ret void
12445 //
12446 //
12447 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SD2Ev
12448 // CHECK16-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
12449 // CHECK16-NEXT:  entry:
12450 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
12451 // CHECK16-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
12452 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
12453 // CHECK16-NEXT:    ret void
12454 //