clang/test/OpenMP/teams_distribute_parallel_for_num_threads_codegen.cpp

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
   2 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-ibm-linux-gnu -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK1
   3 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-ibm-linux-gnu -fexceptions -fcxx-exceptions -emit-pch -o %t %s
   4 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-ibm-linux-gnu -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2
   5
   6 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-ibm-linux-gnu -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
   7 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-ibm-linux-gnu -fexceptions -fcxx-exceptions -emit-pch -o %t %s
   8 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-ibm-linux-gnu -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
   9
  10 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-ibm-linux-gnu -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK5
  11 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-ibm-linux-gnu -fexceptions -fcxx-exceptions -emit-pch -o %t %s
  12 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-ibm-linux-gnu -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6
  13
  14 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-ibm-linux-gnu -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  15 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-ibm-linux-gnu -fexceptions -fcxx-exceptions -emit-pch -o %t %s
  16 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-ibm-linux-gnu -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  17
  18 // expected-no-diagnostics
  19 #ifndef HEADER
  20 #define HEADER
  21
  22 typedef __INTPTR_TYPE__ intptr_t;
  23
  24
  25 void foo();
  26
  27 struct S {
  28   intptr_t a, b, c;
  29   S(intptr_t a) : a(a) {}
  30   operator char() { return a; }
  31   ~S() {}
  32 };
  33
  34 template <typename T, int C>
  35 int tmain() {
  36 #pragma omp target
  37 #pragma omp teams distribute parallel for num_threads(C)
  38   for (int i = 0; i < 100; i++)
  39     foo();
  40 #pragma omp target
  41 #pragma omp teams distribute parallel for num_threads(T(23))
  42   for (int i = 0; i < 100; i++)
  43     foo();
  44   return 0;
  45 }
  46
  47 int main() {
  48   S s(0);
  49   char a = s;
  50 #pragma omp target
  51 #pragma omp teams distribute parallel for num_threads(2)
  52   for (int i = 0; i < 100; i++) {
  53     foo();
  54   }
  55 #pragma omp target
  56
  57 #pragma omp teams distribute parallel for num_threads(a)
  58   for (int i = 0; i < 100; i++) {
  59     foo();
  60   }
  61   return a + tmain<char, 5>() + tmain<S, 1>();
  62 }
  63
  64 // tmain 5
  65
  66 // tmain 1
  67
  68
  69
  70
  71
  72
  73
  74
  75 #endif
  76 // CHECK1-LABEL: define {{[^@]+}}@main
  77 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
  78 // CHECK1-NEXT:  entry:
  79 // CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
  80 // CHECK1-NEXT:    [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
  81 // CHECK1-NEXT:    [[A:%.*]] = alloca i8, align 1
  82 // CHECK1-NEXT:    [[EXN_SLOT:%.*]] = alloca i8*, align 8
  83 // CHECK1-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
  84 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
  85 // CHECK1-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
  86 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
  87 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
  88 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
  89 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
  90 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
  91 // CHECK1-NEXT:    store i32 0, i32* [[RETVAL]], align 4
  92 // CHECK1-NEXT:    call void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[S]], i64 0)
  93 // CHECK1-NEXT:    [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[S]])
  94 // CHECK1-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
  95 // CHECK1:       invoke.cont:
  96 // CHECK1-NEXT:    store i8 [[CALL]], i8* [[A]], align 1
  97 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100)
  98 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l50.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 2)
  99 // CHECK1-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
 100 // CHECK1-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
 101 // CHECK1:       omp_offload.failed:
 102 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l50() #[[ATTR6:[0-9]+]]
 103 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
 104 // CHECK1:       lpad:
 105 // CHECK1-NEXT:    [[TMP2:%.*]] = landingpad { i8*, i32 }
 106 // CHECK1-NEXT:    cleanup
 107 // CHECK1-NEXT:    [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0
 108 // CHECK1-NEXT:    store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8
 109 // CHECK1-NEXT:    [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1
 110 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4
 111 // CHECK1-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
 112 // CHECK1-NEXT:    br label [[EH_RESUME:%.*]]
 113 // CHECK1:       omp_offload.cont:
 114 // CHECK1-NEXT:    [[TMP5:%.*]] = load i8, i8* [[A]], align 1
 115 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8*
 116 // CHECK1-NEXT:    store i8 [[TMP5]], i8* [[CONV]], align 1
 117 // CHECK1-NEXT:    [[TMP6:%.*]] = load i64, i64* [[A_CASTED]], align 8
 118 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 119 // CHECK1-NEXT:    [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
 120 // CHECK1-NEXT:    store i64 [[TMP6]], i64* [[TMP8]], align 8
 121 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 122 // CHECK1-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
 123 // CHECK1-NEXT:    store i64 [[TMP6]], i64* [[TMP10]], align 8
 124 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
 125 // CHECK1-NEXT:    store i8* null, i8** [[TMP11]], align 8
 126 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 127 // CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 128 // CHECK1-NEXT:    [[TMP14:%.*]] = load i8, i8* [[A]], align 1
 129 // CHECK1-NEXT:    store i8 [[TMP14]], i8* [[DOTCAPTURE_EXPR_]], align 1
 130 // CHECK1-NEXT:    [[TMP15:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
 131 // CHECK1-NEXT:    [[TMP16:%.*]] = zext i8 [[TMP15]] to i32
 132 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
 133 // CHECK1-NEXT:    [[TMP17:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l55.region_id, i32 1, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP16]])
 134 // CHECK1-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
 135 // CHECK1-NEXT:    br i1 [[TMP18]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
 136 // CHECK1:       omp_offload.failed2:
 137 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l55(i64 [[TMP6]]) #[[ATTR6]]
 138 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
 139 // CHECK1:       omp_offload.cont3:
 140 // CHECK1-NEXT:    [[TMP19:%.*]] = load i8, i8* [[A]], align 1
 141 // CHECK1-NEXT:    [[CONV4:%.*]] = sext i8 [[TMP19]] to i32
 142 // CHECK1-NEXT:    [[CALL6:%.*]] = invoke signext i32 @_Z5tmainIcLi5EEiv()
 143 // CHECK1-NEXT:    to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]]
 144 // CHECK1:       invoke.cont5:
 145 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[CONV4]], [[CALL6]]
 146 // CHECK1-NEXT:    [[CALL8:%.*]] = invoke signext i32 @_Z5tmainI1SLi1EEiv()
 147 // CHECK1-NEXT:    to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD]]
 148 // CHECK1:       invoke.cont7:
 149 // CHECK1-NEXT:    [[ADD9:%.*]] = add nsw i32 [[ADD]], [[CALL8]]
 150 // CHECK1-NEXT:    store i32 [[ADD9]], i32* [[RETVAL]], align 4
 151 // CHECK1-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
 152 // CHECK1-NEXT:    [[TMP20:%.*]] = load i32, i32* [[RETVAL]], align 4
 153 // CHECK1-NEXT:    ret i32 [[TMP20]]
 154 // CHECK1:       eh.resume:
 155 // CHECK1-NEXT:    [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8
 156 // CHECK1-NEXT:    [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
 157 // CHECK1-NEXT:    [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
 158 // CHECK1-NEXT:    [[LPAD_VAL10:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
 159 // CHECK1-NEXT:    resume { i8*, i32 } [[LPAD_VAL10]]
 160 //
 161 //
 162 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SC1El
 163 // CHECK1-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
 164 // CHECK1-NEXT:  entry:
 165 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
 166 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
 167 // CHECK1-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
 168 // CHECK1-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
 169 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
 170 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
 171 // CHECK1-NEXT:    call void @_ZN1SC2El(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]], i64 [[TMP0]])
 172 // CHECK1-NEXT:    ret void
 173 //
 174 //
 175 // CHECK1-LABEL: define {{[^@]+}}@_ZN1ScvcEv
 176 // CHECK1-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 {
 177 // CHECK1-NEXT:  entry:
 178 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
 179 // CHECK1-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
 180 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
 181 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
 182 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A]], align 8
 183 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i8
 184 // CHECK1-NEXT:    ret i8 [[CONV]]
 185 //
 186 //
 187 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l50
 188 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] {
 189 // CHECK1-NEXT:  entry:
 190 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
 191 // CHECK1-NEXT:    ret void
 192 //
 193 //
 194 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
 195 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
 196 // CHECK1-NEXT:  entry:
 197 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
 198 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
 199 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 200 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 201 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 202 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 203 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 204 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 205 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 206 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
 207 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
 208 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
 209 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
 210 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
 211 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
 212 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
 213 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
 214 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
 215 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
 216 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
 217 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 218 // CHECK1:       cond.true:
 219 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 220 // CHECK1:       cond.false:
 221 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
 222 // CHECK1-NEXT:    br label [[COND_END]]
 223 // CHECK1:       cond.end:
 224 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
 225 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
 226 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
 227 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
 228 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 229 // CHECK1:       omp.inner.for.cond:
 230 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
 231 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
 232 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
 233 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 234 // CHECK1:       omp.inner.for.body:
 235 // CHECK1-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2)
 236 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
 237 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
 238 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
 239 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
 240 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
 241 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 242 // CHECK1:       omp.inner.for.inc:
 243 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
 244 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
 245 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
 246 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
 247 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 248 // CHECK1:       omp.inner.for.end:
 249 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 250 // CHECK1:       omp.loop.exit:
 251 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
 252 // CHECK1-NEXT:    ret void
 253 //
 254 //
 255 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
 256 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
 257 // CHECK1-NEXT:  entry:
 258 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
 259 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
 260 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 261 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 262 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 263 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 264 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 265 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 266 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 267 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 268 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 269 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
 270 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
 271 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
 272 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
 273 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
 274 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
 275 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
 276 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
 277 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
 278 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
 279 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
 280 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
 281 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
 282 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
 283 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
 284 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
 285 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
 286 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
 287 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
 288 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 289 // CHECK1:       cond.true:
 290 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 291 // CHECK1:       cond.false:
 292 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
 293 // CHECK1-NEXT:    br label [[COND_END]]
 294 // CHECK1:       cond.end:
 295 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
 296 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
 297 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
 298 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
 299 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 300 // CHECK1:       omp.inner.for.cond:
 301 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
 302 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
 303 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
 304 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 305 // CHECK1:       omp.inner.for.body:
 306 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
 307 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
 308 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 309 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
 310 // CHECK1-NEXT:    invoke void @_Z3foov()
 311 // CHECK1-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
 312 // CHECK1:       invoke.cont:
 313 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 314 // CHECK1:       omp.body.continue:
 315 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 316 // CHECK1:       omp.inner.for.inc:
 317 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
 318 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
 319 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
 320 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 321 // CHECK1:       omp.inner.for.end:
 322 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 323 // CHECK1:       omp.loop.exit:
 324 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
 325 // CHECK1-NEXT:    ret void
 326 // CHECK1:       terminate.lpad:
 327 // CHECK1-NEXT:    [[TMP11:%.*]] = landingpad { i8*, i32 }
 328 // CHECK1-NEXT:    catch i8* null
 329 // CHECK1-NEXT:    [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
 330 // CHECK1-NEXT:    call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR9:[0-9]+]]
 331 // CHECK1-NEXT:    unreachable
 332 //
 333 //
 334 // CHECK1-LABEL: define {{[^@]+}}@__clang_call_terminate
 335 // CHECK1-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat {
 336 // CHECK1-NEXT:    [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]]
 337 // CHECK1-NEXT:    call void @_ZSt9terminatev() #[[ATTR9]]
 338 // CHECK1-NEXT:    unreachable
 339 //
 340 //
 341 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l55
 342 // CHECK1-SAME: (i64 [[A:%.*]]) #[[ATTR3]] {
 343 // CHECK1-NEXT:  entry:
 344 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
 345 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
 346 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
 347 // CHECK1-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
 348 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8*
 349 // CHECK1-NEXT:    [[TMP0:%.*]] = load i8, i8* [[CONV]], align 1
 350 // CHECK1-NEXT:    store i8 [[TMP0]], i8* [[DOTCAPTURE_EXPR_]], align 1
 351 // CHECK1-NEXT:    [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
 352 // CHECK1-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
 353 // CHECK1-NEXT:    store i8 [[TMP1]], i8* [[CONV1]], align 1
 354 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
 355 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP2]])
 356 // CHECK1-NEXT:    ret void
 357 //
 358 //
 359 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2
 360 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
 361 // CHECK1-NEXT:  entry:
 362 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
 363 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
 364 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
 365 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 366 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 367 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 368 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 369 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 370 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 371 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 372 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
 373 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
 374 // CHECK1-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
 375 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
 376 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
 377 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
 378 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
 379 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
 380 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
 381 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
 382 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
 383 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
 384 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
 385 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 386 // CHECK1:       cond.true:
 387 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 388 // CHECK1:       cond.false:
 389 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
 390 // CHECK1-NEXT:    br label [[COND_END]]
 391 // CHECK1:       cond.end:
 392 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
 393 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
 394 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
 395 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
 396 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 397 // CHECK1:       omp.inner.for.cond:
 398 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
 399 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
 400 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
 401 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 402 // CHECK1:       omp.inner.for.body:
 403 // CHECK1-NEXT:    [[TMP7:%.*]] = load i8, i8* [[CONV]], align 1
 404 // CHECK1-NEXT:    [[TMP8:%.*]] = sext i8 [[TMP7]] to i32
 405 // CHECK1-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP8]])
 406 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
 407 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
 408 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
 409 // CHECK1-NEXT:    [[TMP12:%.*]] = zext i32 [[TMP11]] to i64
 410 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP10]], i64 [[TMP12]])
 411 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 412 // CHECK1:       omp.inner.for.inc:
 413 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
 414 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
 415 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
 416 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
 417 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 418 // CHECK1:       omp.inner.for.end:
 419 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 420 // CHECK1:       omp.loop.exit:
 421 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
 422 // CHECK1-NEXT:    ret void
 423 //
 424 //
 425 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3
 426 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
 427 // CHECK1-NEXT:  entry:
 428 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
 429 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
 430 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 431 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 432 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 433 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 434 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 435 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 436 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 437 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 438 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 439 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
 440 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
 441 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
 442 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
 443 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
 444 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
 445 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
 446 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
 447 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
 448 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
 449 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
 450 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
 451 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
 452 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
 453 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
 454 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
 455 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
 456 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
 457 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
 458 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 459 // CHECK1:       cond.true:
 460 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 461 // CHECK1:       cond.false:
 462 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
 463 // CHECK1-NEXT:    br label [[COND_END]]
 464 // CHECK1:       cond.end:
 465 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
 466 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
 467 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
 468 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
 469 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 470 // CHECK1:       omp.inner.for.cond:
 471 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
 472 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
 473 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
 474 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 475 // CHECK1:       omp.inner.for.body:
 476 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
 477 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
 478 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 479 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
 480 // CHECK1-NEXT:    invoke void @_Z3foov()
 481 // CHECK1-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
 482 // CHECK1:       invoke.cont:
 483 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 484 // CHECK1:       omp.body.continue:
 485 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 486 // CHECK1:       omp.inner.for.inc:
 487 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
 488 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
 489 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
 490 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 491 // CHECK1:       omp.inner.for.end:
 492 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 493 // CHECK1:       omp.loop.exit:
 494 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
 495 // CHECK1-NEXT:    ret void
 496 // CHECK1:       terminate.lpad:
 497 // CHECK1-NEXT:    [[TMP11:%.*]] = landingpad { i8*, i32 }
 498 // CHECK1-NEXT:    catch i8* null
 499 // CHECK1-NEXT:    [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
 500 // CHECK1-NEXT:    call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR9]]
 501 // CHECK1-NEXT:    unreachable
 502 //
 503 //
 504 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv
 505 // CHECK1-SAME: () #[[ATTR2]] comdat {
 506 // CHECK1-NEXT:  entry:
 507 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 508 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
 509 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
 510 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l36.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 5)
 511 // CHECK1-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
 512 // CHECK1-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
 513 // CHECK1:       omp_offload.failed:
 514 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l36() #[[ATTR6]]
 515 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
 516 // CHECK1:       omp_offload.cont:
 517 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
 518 // CHECK1-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l40.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 23)
 519 // CHECK1-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
 520 // CHECK1-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
 521 // CHECK1:       omp_offload.failed2:
 522 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l40() #[[ATTR6]]
 523 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
 524 // CHECK1:       omp_offload.cont3:
 525 // CHECK1-NEXT:    ret i32 0
 526 //
 527 //
 528 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv
 529 // CHECK1-SAME: () #[[ATTR2]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
 530 // CHECK1-NEXT:  entry:
 531 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 532 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
 533 // CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8
 534 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
 535 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
 536 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l36.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
 537 // CHECK1-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
 538 // CHECK1-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
 539 // CHECK1:       omp_offload.failed:
 540 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l36() #[[ATTR6]]
 541 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
 542 // CHECK1:       omp_offload.cont:
 543 // CHECK1-NEXT:    invoke void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 23)
 544 // CHECK1-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
 545 // CHECK1:       invoke.cont:
 546 // CHECK1-NEXT:    [[CALL:%.*]] = call signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]])
 547 // CHECK1-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]]
 548 // CHECK1-NEXT:    store i8 [[CALL]], i8* [[DOTCAPTURE_EXPR_]], align 1
 549 // CHECK1-NEXT:    [[TMP2:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
 550 // CHECK1-NEXT:    [[TMP3:%.*]] = zext i8 [[TMP2]] to i32
 551 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
 552 // CHECK1-NEXT:    [[TMP4:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l40.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 [[TMP3]])
 553 // CHECK1-NEXT:    [[TMP5:%.*]] = icmp ne i32 [[TMP4]], 0
 554 // CHECK1-NEXT:    br i1 [[TMP5]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
 555 // CHECK1:       omp_offload.failed2:
 556 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l40() #[[ATTR6]]
 557 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
 558 // CHECK1:       omp_offload.cont3:
 559 // CHECK1-NEXT:    ret i32 0
 560 // CHECK1:       terminate.lpad:
 561 // CHECK1-NEXT:    [[TMP6:%.*]] = landingpad { i8*, i32 }
 562 // CHECK1-NEXT:    catch i8* null
 563 // CHECK1-NEXT:    [[TMP7:%.*]] = extractvalue { i8*, i32 } [[TMP6]], 0
 564 // CHECK1-NEXT:    call void @__clang_call_terminate(i8* [[TMP7]]) #[[ATTR9]]
 565 // CHECK1-NEXT:    unreachable
 566 //
 567 //
 568 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SD1Ev
 569 // CHECK1-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR7:[0-9]+]] comdat align 2 {
 570 // CHECK1-NEXT:  entry:
 571 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
 572 // CHECK1-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
 573 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
 574 // CHECK1-NEXT:    call void @_ZN1SD2Ev(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR6]]
 575 // CHECK1-NEXT:    ret void
 576 //
 577 //
 578 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SC2El
 579 // CHECK1-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR7]] comdat align 2 {
 580 // CHECK1-NEXT:  entry:
 581 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
 582 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
 583 // CHECK1-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
 584 // CHECK1-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
 585 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
 586 // CHECK1-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
 587 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
 588 // CHECK1-NEXT:    store i64 [[TMP0]], i64* [[A2]], align 8
 589 // CHECK1-NEXT:    ret void
 590 //
 591 //
 592 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SD2Ev
 593 // CHECK1-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] comdat align 2 {
 594 // CHECK1-NEXT:  entry:
 595 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
 596 // CHECK1-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
 597 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
 598 // CHECK1-NEXT:    ret void
 599 //
 600 //
 601 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l36
 602 // CHECK1-SAME: () #[[ATTR3]] {
 603 // CHECK1-NEXT:  entry:
 604 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
 605 // CHECK1-NEXT:    ret void
 606 //
 607 //
 608 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4
 609 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
 610 // CHECK1-NEXT:  entry:
 611 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
 612 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
 613 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 614 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 615 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 616 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 617 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 618 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 619 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 620 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
 621 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
 622 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
 623 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
 624 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
 625 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
 626 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
 627 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
 628 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
 629 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
 630 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
 631 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 632 // CHECK1:       cond.true:
 633 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 634 // CHECK1:       cond.false:
 635 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
 636 // CHECK1-NEXT:    br label [[COND_END]]
 637 // CHECK1:       cond.end:
 638 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
 639 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
 640 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
 641 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
 642 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 643 // CHECK1:       omp.inner.for.cond:
 644 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
 645 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
 646 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
 647 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 648 // CHECK1:       omp.inner.for.body:
 649 // CHECK1-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5)
 650 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
 651 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
 652 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
 653 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
 654 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
 655 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 656 // CHECK1:       omp.inner.for.inc:
 657 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
 658 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
 659 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
 660 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
 661 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 662 // CHECK1:       omp.inner.for.end:
 663 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 664 // CHECK1:       omp.loop.exit:
 665 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
 666 // CHECK1-NEXT:    ret void
 667 //
 668 //
 669 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5
 670 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
 671 // CHECK1-NEXT:  entry:
 672 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
 673 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
 674 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 675 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 676 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 677 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 678 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 679 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 680 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 681 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 682 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 683 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
 684 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
 685 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
 686 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
 687 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
 688 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
 689 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
 690 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
 691 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
 692 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
 693 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
 694 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
 695 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
 696 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
 697 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
 698 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
 699 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
 700 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
 701 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
 702 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 703 // CHECK1:       cond.true:
 704 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 705 // CHECK1:       cond.false:
 706 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
 707 // CHECK1-NEXT:    br label [[COND_END]]
 708 // CHECK1:       cond.end:
 709 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
 710 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
 711 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
 712 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
 713 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 714 // CHECK1:       omp.inner.for.cond:
 715 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
 716 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
 717 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
 718 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 719 // CHECK1:       omp.inner.for.body:
 720 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
 721 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
 722 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 723 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
 724 // CHECK1-NEXT:    invoke void @_Z3foov()
 725 // CHECK1-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
 726 // CHECK1:       invoke.cont:
 727 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 728 // CHECK1:       omp.body.continue:
 729 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 730 // CHECK1:       omp.inner.for.inc:
 731 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
 732 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
 733 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
 734 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 735 // CHECK1:       omp.inner.for.end:
 736 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 737 // CHECK1:       omp.loop.exit:
 738 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
 739 // CHECK1-NEXT:    ret void
 740 // CHECK1:       terminate.lpad:
 741 // CHECK1-NEXT:    [[TMP11:%.*]] = landingpad { i8*, i32 }
 742 // CHECK1-NEXT:    catch i8* null
 743 // CHECK1-NEXT:    [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
 744 // CHECK1-NEXT:    call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR9]]
 745 // CHECK1-NEXT:    unreachable
 746 //
 747 //
 748 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l40
 749 // CHECK1-SAME: () #[[ATTR3]] {
 750 // CHECK1-NEXT:  entry:
 751 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
 752 // CHECK1-NEXT:    ret void
 753 //
 754 //
 755 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6
 756 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
 757 // CHECK1-NEXT:  entry:
 758 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
 759 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
 760 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 761 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 762 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 763 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 764 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 765 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 766 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 767 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
 768 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
 769 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
 770 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
 771 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
 772 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
 773 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
 774 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
 775 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
 776 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
 777 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
 778 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 779 // CHECK1:       cond.true:
 780 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 781 // CHECK1:       cond.false:
 782 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
 783 // CHECK1-NEXT:    br label [[COND_END]]
 784 // CHECK1:       cond.end:
 785 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
 786 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
 787 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
 788 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
 789 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 790 // CHECK1:       omp.inner.for.cond:
 791 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
 792 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
 793 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
 794 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 795 // CHECK1:       omp.inner.for.body:
 796 // CHECK1-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23)
 797 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
 798 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
 799 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
 800 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
 801 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
 802 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 803 // CHECK1:       omp.inner.for.inc:
 804 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
 805 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
 806 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
 807 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
 808 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 809 // CHECK1:       omp.inner.for.end:
 810 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 811 // CHECK1:       omp.loop.exit:
 812 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
 813 // CHECK1-NEXT:    ret void
 814 //
 815 //
 816 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7
 817 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
 818 // CHECK1-NEXT:  entry:
 819 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
 820 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
 821 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 822 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 823 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 824 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 825 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 826 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 827 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 828 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 829 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 830 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
 831 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
 832 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
 833 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
 834 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
 835 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
 836 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
 837 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
 838 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
 839 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
 840 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
 841 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
 842 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
 843 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
 844 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
 845 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
 846 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
 847 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
 848 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
 849 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 850 // CHECK1:       cond.true:
 851 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 852 // CHECK1:       cond.false:
 853 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
 854 // CHECK1-NEXT:    br label [[COND_END]]
 855 // CHECK1:       cond.end:
 856 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
 857 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
 858 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
 859 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
 860 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 861 // CHECK1:       omp.inner.for.cond:
 862 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
 863 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
 864 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
 865 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 866 // CHECK1:       omp.inner.for.body:
 867 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
 868 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
 869 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 870 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
 871 // CHECK1-NEXT:    invoke void @_Z3foov()
 872 // CHECK1-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
 873 // CHECK1:       invoke.cont:
 874 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 875 // CHECK1:       omp.body.continue:
 876 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 877 // CHECK1:       omp.inner.for.inc:
 878 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
 879 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
 880 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
 881 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 882 // CHECK1:       omp.inner.for.end:
 883 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 884 // CHECK1:       omp.loop.exit:
 885 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
 886 // CHECK1-NEXT:    ret void
 887 // CHECK1:       terminate.lpad:
 888 // CHECK1-NEXT:    [[TMP11:%.*]] = landingpad { i8*, i32 }
 889 // CHECK1-NEXT:    catch i8* null
 890 // CHECK1-NEXT:    [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
 891 // CHECK1-NEXT:    call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR9]]
 892 // CHECK1-NEXT:    unreachable
 893 //
 894 //
 895 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l36
 896 // CHECK1-SAME: () #[[ATTR3]] {
 897 // CHECK1-NEXT:  entry:
 898 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*))
 899 // CHECK1-NEXT:    ret void
 900 //
 901 //
 902 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..8
 903 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
 904 // CHECK1-NEXT:  entry:
 905 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
 906 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
 907 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 908 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 909 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 910 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 911 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 912 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 913 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 914 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
 915 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
 916 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
 917 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
 918 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
 919 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
 920 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
 921 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
 922 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
 923 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
 924 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
 925 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 926 // CHECK1:       cond.true:
 927 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 928 // CHECK1:       cond.false:
 929 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
 930 // CHECK1-NEXT:    br label [[COND_END]]
 931 // CHECK1:       cond.end:
 932 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
 933 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
 934 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
 935 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
 936 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 937 // CHECK1:       omp.inner.for.cond:
 938 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
 939 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
 940 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
 941 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 942 // CHECK1:       omp.inner.for.body:
 943 // CHECK1-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1)
 944 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
 945 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
 946 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
 947 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
 948 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
 949 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 950 // CHECK1:       omp.inner.for.inc:
 951 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
 952 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
 953 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
 954 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
 955 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 956 // CHECK1:       omp.inner.for.end:
 957 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 958 // CHECK1:       omp.loop.exit:
 959 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
 960 // CHECK1-NEXT:    ret void
 961 //
 962 //
 963 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..9
 964 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
 965 // CHECK1-NEXT:  entry:
 966 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
 967 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
 968 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 969 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 970 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 971 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 972 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 973 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 974 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 975 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 976 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 977 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
 978 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
 979 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
 980 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
 981 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
 982 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
 983 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
 984 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
 985 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
 986 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
 987 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
 988 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
 989 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
 990 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
 991 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
 992 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
 993 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
 994 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
 995 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
 996 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 997 // CHECK1:       cond.true:
 998 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 999 // CHECK1:       cond.false:
1000 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1001 // CHECK1-NEXT:    br label [[COND_END]]
1002 // CHECK1:       cond.end:
1003 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1004 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1005 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1006 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1007 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1008 // CHECK1:       omp.inner.for.cond:
1009 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1010 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1011 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1012 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1013 // CHECK1:       omp.inner.for.body:
1014 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1015 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1016 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1017 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1018 // CHECK1-NEXT:    invoke void @_Z3foov()
1019 // CHECK1-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
1020 // CHECK1:       invoke.cont:
1021 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1022 // CHECK1:       omp.body.continue:
1023 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1024 // CHECK1:       omp.inner.for.inc:
1025 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1026 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1027 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1028 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
1029 // CHECK1:       omp.inner.for.end:
1030 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1031 // CHECK1:       omp.loop.exit:
1032 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1033 // CHECK1-NEXT:    ret void
1034 // CHECK1:       terminate.lpad:
1035 // CHECK1-NEXT:    [[TMP11:%.*]] = landingpad { i8*, i32 }
1036 // CHECK1-NEXT:    catch i8* null
1037 // CHECK1-NEXT:    [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
1038 // CHECK1-NEXT:    call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR9]]
1039 // CHECK1-NEXT:    unreachable
1040 //
1041 //
1042 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l40
1043 // CHECK1-SAME: () #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
1044 // CHECK1-NEXT:  entry:
1045 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
1046 // CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8
1047 // CHECK1-NEXT:    [[EXN_SLOT:%.*]] = alloca i8*, align 8
1048 // CHECK1-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
1049 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
1050 // CHECK1-NEXT:    invoke void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 23)
1051 // CHECK1-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
1052 // CHECK1:       invoke.cont:
1053 // CHECK1-NEXT:    [[CALL:%.*]] = call signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]])
1054 // CHECK1-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]]
1055 // CHECK1-NEXT:    store i8 [[CALL]], i8* [[DOTCAPTURE_EXPR_]], align 1
1056 // CHECK1-NEXT:    [[TMP0:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
1057 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
1058 // CHECK1-NEXT:    store i8 [[TMP0]], i8* [[CONV]], align 1
1059 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
1060 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i64 [[TMP1]])
1061 // CHECK1-NEXT:    ret void
1062 // CHECK1:       lpad:
1063 // CHECK1-NEXT:    [[TMP2:%.*]] = landingpad { i8*, i32 }
1064 // CHECK1-NEXT:    catch i8* null
1065 // CHECK1-NEXT:    [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0
1066 // CHECK1-NEXT:    store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8
1067 // CHECK1-NEXT:    [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1
1068 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4
1069 // CHECK1-NEXT:    br label [[TERMINATE_HANDLER:%.*]]
1070 // CHECK1:       terminate.handler:
1071 // CHECK1-NEXT:    [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8
1072 // CHECK1-NEXT:    call void @__clang_call_terminate(i8* [[EXN]]) #[[ATTR9]]
1073 // CHECK1-NEXT:    unreachable
1074 //
1075 //
1076 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10
1077 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
1078 // CHECK1-NEXT:  entry:
1079 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1080 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1081 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
1082 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1083 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1084 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1085 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1086 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1087 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1088 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1089 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1090 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1091 // CHECK1-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
1092 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
1093 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1094 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1095 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1096 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1097 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1098 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1099 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1100 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1101 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1102 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1103 // CHECK1:       cond.true:
1104 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1105 // CHECK1:       cond.false:
1106 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1107 // CHECK1-NEXT:    br label [[COND_END]]
1108 // CHECK1:       cond.end:
1109 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1110 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1111 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1112 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1113 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1114 // CHECK1:       omp.inner.for.cond:
1115 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1116 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1117 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1118 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1119 // CHECK1:       omp.inner.for.body:
1120 // CHECK1-NEXT:    [[TMP7:%.*]] = load i8, i8* [[CONV]], align 1
1121 // CHECK1-NEXT:    [[TMP8:%.*]] = sext i8 [[TMP7]] to i32
1122 // CHECK1-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP8]])
1123 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1124 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1125 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1126 // CHECK1-NEXT:    [[TMP12:%.*]] = zext i32 [[TMP11]] to i64
1127 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP10]], i64 [[TMP12]])
1128 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1129 // CHECK1:       omp.inner.for.inc:
1130 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1131 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1132 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
1133 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1134 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
1135 // CHECK1:       omp.inner.for.end:
1136 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1137 // CHECK1:       omp.loop.exit:
1138 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1139 // CHECK1-NEXT:    ret void
1140 //
1141 //
1142 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11
1143 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
1144 // CHECK1-NEXT:  entry:
1145 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1146 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1147 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1148 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1149 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1150 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1151 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1152 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1153 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1154 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1155 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1156 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1157 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1158 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1159 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1160 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1161 // CHECK1-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
1162 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1163 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1164 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1165 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1166 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1167 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1168 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1169 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1170 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1171 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1172 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1173 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1174 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1175 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1176 // CHECK1:       cond.true:
1177 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1178 // CHECK1:       cond.false:
1179 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1180 // CHECK1-NEXT:    br label [[COND_END]]
1181 // CHECK1:       cond.end:
1182 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1183 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1184 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1185 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1186 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1187 // CHECK1:       omp.inner.for.cond:
1188 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1189 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1190 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1191 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1192 // CHECK1:       omp.inner.for.body:
1193 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1194 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1195 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1196 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1197 // CHECK1-NEXT:    invoke void @_Z3foov()
1198 // CHECK1-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
1199 // CHECK1:       invoke.cont:
1200 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1201 // CHECK1:       omp.body.continue:
1202 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1203 // CHECK1:       omp.inner.for.inc:
1204 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1205 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1206 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1207 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
1208 // CHECK1:       omp.inner.for.end:
1209 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1210 // CHECK1:       omp.loop.exit:
1211 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1212 // CHECK1-NEXT:    ret void
1213 // CHECK1:       terminate.lpad:
1214 // CHECK1-NEXT:    [[TMP11:%.*]] = landingpad { i8*, i32 }
1215 // CHECK1-NEXT:    catch i8* null
1216 // CHECK1-NEXT:    [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
1217 // CHECK1-NEXT:    call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR9]]
1218 // CHECK1-NEXT:    unreachable
1219 //
1220 //
1221 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1222 // CHECK1-SAME: () #[[ATTR8:[0-9]+]] section ".text.startup" {
1223 // CHECK1-NEXT:  entry:
1224 // CHECK1-NEXT:    call void @__tgt_register_requires(i64 1)
1225 // CHECK1-NEXT:    ret void
1226 //
1227 //
1228 // CHECK2-LABEL: define {{[^@]+}}@main
1229 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
1230 // CHECK2-NEXT:  entry:
1231 // CHECK2-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
1232 // CHECK2-NEXT:    [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
1233 // CHECK2-NEXT:    [[A:%.*]] = alloca i8, align 1
1234 // CHECK2-NEXT:    [[EXN_SLOT:%.*]] = alloca i8*, align 8
1235 // CHECK2-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
1236 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1237 // CHECK2-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
1238 // CHECK2-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
1239 // CHECK2-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
1240 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
1241 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
1242 // CHECK2-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1243 // CHECK2-NEXT:    store i32 0, i32* [[RETVAL]], align 4
1244 // CHECK2-NEXT:    call void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[S]], i64 0)
1245 // CHECK2-NEXT:    [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[S]])
1246 // CHECK2-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
1247 // CHECK2:       invoke.cont:
1248 // CHECK2-NEXT:    store i8 [[CALL]], i8* [[A]], align 1
1249 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100)
1250 // CHECK2-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l50.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 2)
1251 // CHECK2-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
1252 // CHECK2-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1253 // CHECK2:       omp_offload.failed:
1254 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l50() #[[ATTR6:[0-9]+]]
1255 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1256 // CHECK2:       lpad:
1257 // CHECK2-NEXT:    [[TMP2:%.*]] = landingpad { i8*, i32 }
1258 // CHECK2-NEXT:    cleanup
1259 // CHECK2-NEXT:    [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0
1260 // CHECK2-NEXT:    store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8
1261 // CHECK2-NEXT:    [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1
1262 // CHECK2-NEXT:    store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4
1263 // CHECK2-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
1264 // CHECK2-NEXT:    br label [[EH_RESUME:%.*]]
1265 // CHECK2:       omp_offload.cont:
1266 // CHECK2-NEXT:    [[TMP5:%.*]] = load i8, i8* [[A]], align 1
1267 // CHECK2-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8*
1268 // CHECK2-NEXT:    store i8 [[TMP5]], i8* [[CONV]], align 1
1269 // CHECK2-NEXT:    [[TMP6:%.*]] = load i64, i64* [[A_CASTED]], align 8
1270 // CHECK2-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1271 // CHECK2-NEXT:    [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
1272 // CHECK2-NEXT:    store i64 [[TMP6]], i64* [[TMP8]], align 8
1273 // CHECK2-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1274 // CHECK2-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
1275 // CHECK2-NEXT:    store i64 [[TMP6]], i64* [[TMP10]], align 8
1276 // CHECK2-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1277 // CHECK2-NEXT:    store i8* null, i8** [[TMP11]], align 8
1278 // CHECK2-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1279 // CHECK2-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1280 // CHECK2-NEXT:    [[TMP14:%.*]] = load i8, i8* [[A]], align 1
1281 // CHECK2-NEXT:    store i8 [[TMP14]], i8* [[DOTCAPTURE_EXPR_]], align 1
1282 // CHECK2-NEXT:    [[TMP15:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
1283 // CHECK2-NEXT:    [[TMP16:%.*]] = zext i8 [[TMP15]] to i32
1284 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
1285 // CHECK2-NEXT:    [[TMP17:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l55.region_id, i32 1, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP16]])
1286 // CHECK2-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
1287 // CHECK2-NEXT:    br i1 [[TMP18]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
1288 // CHECK2:       omp_offload.failed2:
1289 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l55(i64 [[TMP6]]) #[[ATTR6]]
1290 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
1291 // CHECK2:       omp_offload.cont3:
1292 // CHECK2-NEXT:    [[TMP19:%.*]] = load i8, i8* [[A]], align 1
1293 // CHECK2-NEXT:    [[CONV4:%.*]] = sext i8 [[TMP19]] to i32
1294 // CHECK2-NEXT:    [[CALL6:%.*]] = invoke signext i32 @_Z5tmainIcLi5EEiv()
1295 // CHECK2-NEXT:    to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]]
1296 // CHECK2:       invoke.cont5:
1297 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[CONV4]], [[CALL6]]
1298 // CHECK2-NEXT:    [[CALL8:%.*]] = invoke signext i32 @_Z5tmainI1SLi1EEiv()
1299 // CHECK2-NEXT:    to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD]]
1300 // CHECK2:       invoke.cont7:
1301 // CHECK2-NEXT:    [[ADD9:%.*]] = add nsw i32 [[ADD]], [[CALL8]]
1302 // CHECK2-NEXT:    store i32 [[ADD9]], i32* [[RETVAL]], align 4
1303 // CHECK2-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
1304 // CHECK2-NEXT:    [[TMP20:%.*]] = load i32, i32* [[RETVAL]], align 4
1305 // CHECK2-NEXT:    ret i32 [[TMP20]]
1306 // CHECK2:       eh.resume:
1307 // CHECK2-NEXT:    [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8
1308 // CHECK2-NEXT:    [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
1309 // CHECK2-NEXT:    [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
1310 // CHECK2-NEXT:    [[LPAD_VAL10:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
1311 // CHECK2-NEXT:    resume { i8*, i32 } [[LPAD_VAL10]]
1312 //
1313 //
1314 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SC1El
1315 // CHECK2-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
1316 // CHECK2-NEXT:  entry:
1317 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1318 // CHECK2-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
1319 // CHECK2-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1320 // CHECK2-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
1321 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1322 // CHECK2-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
1323 // CHECK2-NEXT:    call void @_ZN1SC2El(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]], i64 [[TMP0]])
1324 // CHECK2-NEXT:    ret void
1325 //
1326 //
1327 // CHECK2-LABEL: define {{[^@]+}}@_ZN1ScvcEv
1328 // CHECK2-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 {
1329 // CHECK2-NEXT:  entry:
1330 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1331 // CHECK2-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1332 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1333 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1334 // CHECK2-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A]], align 8
1335 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i8
1336 // CHECK2-NEXT:    ret i8 [[CONV]]
1337 //
1338 //
1339 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l50
1340 // CHECK2-SAME: () #[[ATTR3:[0-9]+]] {
1341 // CHECK2-NEXT:  entry:
1342 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
1343 // CHECK2-NEXT:    ret void
1344 //
1345 //
1346 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined.
1347 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
1348 // CHECK2-NEXT:  entry:
1349 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1350 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1351 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1352 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1353 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1354 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1355 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1356 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1357 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1358 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1359 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1360 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1361 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1362 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1363 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1364 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1365 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1366 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1367 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1368 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1369 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1370 // CHECK2:       cond.true:
1371 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1372 // CHECK2:       cond.false:
1373 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1374 // CHECK2-NEXT:    br label [[COND_END]]
1375 // CHECK2:       cond.end:
1376 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1377 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1378 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1379 // CHECK2-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1380 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1381 // CHECK2:       omp.inner.for.cond:
1382 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1383 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1384 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1385 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1386 // CHECK2:       omp.inner.for.body:
1387 // CHECK2-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2)
1388 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1389 // CHECK2-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1390 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1391 // CHECK2-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1392 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
1393 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1394 // CHECK2:       omp.inner.for.inc:
1395 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1396 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1397 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1398 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1399 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1400 // CHECK2:       omp.inner.for.end:
1401 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1402 // CHECK2:       omp.loop.exit:
1403 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1404 // CHECK2-NEXT:    ret void
1405 //
1406 //
1407 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1
1408 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
1409 // CHECK2-NEXT:  entry:
1410 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1411 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1412 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1413 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1414 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1415 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1416 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1417 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1418 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1419 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1420 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1421 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1422 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1423 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1424 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1425 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1426 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
1427 // CHECK2-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1428 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1429 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1430 // CHECK2-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1431 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1432 // CHECK2-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1433 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1434 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1435 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1436 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1437 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1438 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1439 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1440 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1441 // CHECK2:       cond.true:
1442 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1443 // CHECK2:       cond.false:
1444 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1445 // CHECK2-NEXT:    br label [[COND_END]]
1446 // CHECK2:       cond.end:
1447 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1448 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1449 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1450 // CHECK2-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1451 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1452 // CHECK2:       omp.inner.for.cond:
1453 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1454 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1455 // CHECK2-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1456 // CHECK2-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1457 // CHECK2:       omp.inner.for.body:
1458 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1459 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1460 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1461 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1462 // CHECK2-NEXT:    invoke void @_Z3foov()
1463 // CHECK2-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
1464 // CHECK2:       invoke.cont:
1465 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1466 // CHECK2:       omp.body.continue:
1467 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1468 // CHECK2:       omp.inner.for.inc:
1469 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1470 // CHECK2-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1471 // CHECK2-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1472 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1473 // CHECK2:       omp.inner.for.end:
1474 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1475 // CHECK2:       omp.loop.exit:
1476 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1477 // CHECK2-NEXT:    ret void
1478 // CHECK2:       terminate.lpad:
1479 // CHECK2-NEXT:    [[TMP11:%.*]] = landingpad { i8*, i32 }
1480 // CHECK2-NEXT:    catch i8* null
1481 // CHECK2-NEXT:    [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
1482 // CHECK2-NEXT:    call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR9:[0-9]+]]
1483 // CHECK2-NEXT:    unreachable
1484 //
1485 //
1486 // CHECK2-LABEL: define {{[^@]+}}@__clang_call_terminate
1487 // CHECK2-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat {
1488 // CHECK2-NEXT:    [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]]
1489 // CHECK2-NEXT:    call void @_ZSt9terminatev() #[[ATTR9]]
1490 // CHECK2-NEXT:    unreachable
1491 //
1492 //
1493 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l55
1494 // CHECK2-SAME: (i64 [[A:%.*]]) #[[ATTR3]] {
1495 // CHECK2-NEXT:  entry:
1496 // CHECK2-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
1497 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
1498 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
1499 // CHECK2-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
1500 // CHECK2-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8*
1501 // CHECK2-NEXT:    [[TMP0:%.*]] = load i8, i8* [[CONV]], align 1
1502 // CHECK2-NEXT:    store i8 [[TMP0]], i8* [[DOTCAPTURE_EXPR_]], align 1
1503 // CHECK2-NEXT:    [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
1504 // CHECK2-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
1505 // CHECK2-NEXT:    store i8 [[TMP1]], i8* [[CONV1]], align 1
1506 // CHECK2-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
1507 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP2]])
1508 // CHECK2-NEXT:    ret void
1509 //
1510 //
1511 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..2
1512 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
1513 // CHECK2-NEXT:  entry:
1514 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1515 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1516 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
1517 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1518 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1519 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1520 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1521 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1522 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1523 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1524 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1525 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1526 // CHECK2-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
1527 // CHECK2-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
1528 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1529 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1530 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1531 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1532 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1533 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1534 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1535 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1536 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1537 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1538 // CHECK2:       cond.true:
1539 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1540 // CHECK2:       cond.false:
1541 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1542 // CHECK2-NEXT:    br label [[COND_END]]
1543 // CHECK2:       cond.end:
1544 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1545 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1546 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1547 // CHECK2-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1548 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1549 // CHECK2:       omp.inner.for.cond:
1550 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1551 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1552 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1553 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1554 // CHECK2:       omp.inner.for.body:
1555 // CHECK2-NEXT:    [[TMP7:%.*]] = load i8, i8* [[CONV]], align 1
1556 // CHECK2-NEXT:    [[TMP8:%.*]] = sext i8 [[TMP7]] to i32
1557 // CHECK2-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP8]])
1558 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1559 // CHECK2-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1560 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1561 // CHECK2-NEXT:    [[TMP12:%.*]] = zext i32 [[TMP11]] to i64
1562 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP10]], i64 [[TMP12]])
1563 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1564 // CHECK2:       omp.inner.for.inc:
1565 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1566 // CHECK2-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1567 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
1568 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1569 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1570 // CHECK2:       omp.inner.for.end:
1571 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1572 // CHECK2:       omp.loop.exit:
1573 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1574 // CHECK2-NEXT:    ret void
1575 //
1576 //
1577 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..3
1578 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
1579 // CHECK2-NEXT:  entry:
1580 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1581 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1582 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1583 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1584 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1585 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1586 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1587 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1588 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1589 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1590 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1591 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1592 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1593 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1594 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1595 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1596 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
1597 // CHECK2-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1598 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1599 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1600 // CHECK2-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1601 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1602 // CHECK2-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1603 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1604 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1605 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1606 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1607 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1608 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1609 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1610 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1611 // CHECK2:       cond.true:
1612 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1613 // CHECK2:       cond.false:
1614 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1615 // CHECK2-NEXT:    br label [[COND_END]]
1616 // CHECK2:       cond.end:
1617 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1618 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1619 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1620 // CHECK2-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1621 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1622 // CHECK2:       omp.inner.for.cond:
1623 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1624 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1625 // CHECK2-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1626 // CHECK2-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1627 // CHECK2:       omp.inner.for.body:
1628 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1629 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1630 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1631 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1632 // CHECK2-NEXT:    invoke void @_Z3foov()
1633 // CHECK2-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
1634 // CHECK2:       invoke.cont:
1635 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1636 // CHECK2:       omp.body.continue:
1637 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1638 // CHECK2:       omp.inner.for.inc:
1639 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1640 // CHECK2-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1641 // CHECK2-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1642 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1643 // CHECK2:       omp.inner.for.end:
1644 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1645 // CHECK2:       omp.loop.exit:
1646 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1647 // CHECK2-NEXT:    ret void
1648 // CHECK2:       terminate.lpad:
1649 // CHECK2-NEXT:    [[TMP11:%.*]] = landingpad { i8*, i32 }
1650 // CHECK2-NEXT:    catch i8* null
1651 // CHECK2-NEXT:    [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
1652 // CHECK2-NEXT:    call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR9]]
1653 // CHECK2-NEXT:    unreachable
1654 //
1655 //
1656 // CHECK2-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv
1657 // CHECK2-SAME: () #[[ATTR2]] comdat {
1658 // CHECK2-NEXT:  entry:
1659 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1660 // CHECK2-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1661 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
1662 // CHECK2-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l36.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 5)
1663 // CHECK2-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
1664 // CHECK2-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1665 // CHECK2:       omp_offload.failed:
1666 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l36() #[[ATTR6]]
1667 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1668 // CHECK2:       omp_offload.cont:
1669 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
1670 // CHECK2-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l40.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 23)
1671 // CHECK2-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
1672 // CHECK2-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
1673 // CHECK2:       omp_offload.failed2:
1674 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l40() #[[ATTR6]]
1675 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
1676 // CHECK2:       omp_offload.cont3:
1677 // CHECK2-NEXT:    ret i32 0
1678 //
1679 //
1680 // CHECK2-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv
1681 // CHECK2-SAME: () #[[ATTR2]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
1682 // CHECK2-NEXT:  entry:
1683 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1684 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
1685 // CHECK2-NEXT:    [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8
1686 // CHECK2-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1687 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
1688 // CHECK2-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l36.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
1689 // CHECK2-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
1690 // CHECK2-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1691 // CHECK2:       omp_offload.failed:
1692 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l36() #[[ATTR6]]
1693 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1694 // CHECK2:       omp_offload.cont:
1695 // CHECK2-NEXT:    invoke void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 23)
1696 // CHECK2-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
1697 // CHECK2:       invoke.cont:
1698 // CHECK2-NEXT:    [[CALL:%.*]] = call signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]])
1699 // CHECK2-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]]
1700 // CHECK2-NEXT:    store i8 [[CALL]], i8* [[DOTCAPTURE_EXPR_]], align 1
1701 // CHECK2-NEXT:    [[TMP2:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
1702 // CHECK2-NEXT:    [[TMP3:%.*]] = zext i8 [[TMP2]] to i32
1703 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
1704 // CHECK2-NEXT:    [[TMP4:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l40.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 [[TMP3]])
1705 // CHECK2-NEXT:    [[TMP5:%.*]] = icmp ne i32 [[TMP4]], 0
1706 // CHECK2-NEXT:    br i1 [[TMP5]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
1707 // CHECK2:       omp_offload.failed2:
1708 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l40() #[[ATTR6]]
1709 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
1710 // CHECK2:       omp_offload.cont3:
1711 // CHECK2-NEXT:    ret i32 0
1712 // CHECK2:       terminate.lpad:
1713 // CHECK2-NEXT:    [[TMP6:%.*]] = landingpad { i8*, i32 }
1714 // CHECK2-NEXT:    catch i8* null
1715 // CHECK2-NEXT:    [[TMP7:%.*]] = extractvalue { i8*, i32 } [[TMP6]], 0
1716 // CHECK2-NEXT:    call void @__clang_call_terminate(i8* [[TMP7]]) #[[ATTR9]]
1717 // CHECK2-NEXT:    unreachable
1718 //
1719 //
1720 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SD1Ev
1721 // CHECK2-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR7:[0-9]+]] comdat align 2 {
1722 // CHECK2-NEXT:  entry:
1723 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1724 // CHECK2-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1725 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1726 // CHECK2-NEXT:    call void @_ZN1SD2Ev(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR6]]
1727 // CHECK2-NEXT:    ret void
1728 //
1729 //
1730 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SC2El
1731 // CHECK2-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR7]] comdat align 2 {
1732 // CHECK2-NEXT:  entry:
1733 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1734 // CHECK2-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
1735 // CHECK2-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1736 // CHECK2-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
1737 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1738 // CHECK2-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1739 // CHECK2-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
1740 // CHECK2-NEXT:    store i64 [[TMP0]], i64* [[A2]], align 8
1741 // CHECK2-NEXT:    ret void
1742 //
1743 //
1744 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SD2Ev
1745 // CHECK2-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] comdat align 2 {
1746 // CHECK2-NEXT:  entry:
1747 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1748 // CHECK2-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1749 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1750 // CHECK2-NEXT:    ret void
1751 //
1752 //
1753 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l36
1754 // CHECK2-SAME: () #[[ATTR3]] {
1755 // CHECK2-NEXT:  entry:
1756 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
1757 // CHECK2-NEXT:    ret void
1758 //
1759 //
1760 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..4
1761 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
1762 // CHECK2-NEXT:  entry:
1763 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1764 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1765 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1766 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1767 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1768 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1769 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1770 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1771 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1772 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1773 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1774 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1775 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1776 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1777 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1778 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1779 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1780 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1781 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1782 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1783 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1784 // CHECK2:       cond.true:
1785 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1786 // CHECK2:       cond.false:
1787 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1788 // CHECK2-NEXT:    br label [[COND_END]]
1789 // CHECK2:       cond.end:
1790 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1791 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1792 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1793 // CHECK2-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1794 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1795 // CHECK2:       omp.inner.for.cond:
1796 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1797 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1798 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1799 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1800 // CHECK2:       omp.inner.for.body:
1801 // CHECK2-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5)
1802 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1803 // CHECK2-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1804 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1805 // CHECK2-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1806 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
1807 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1808 // CHECK2:       omp.inner.for.inc:
1809 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1810 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1811 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1812 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1813 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1814 // CHECK2:       omp.inner.for.end:
1815 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1816 // CHECK2:       omp.loop.exit:
1817 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1818 // CHECK2-NEXT:    ret void
1819 //
1820 //
1821 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..5
1822 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
1823 // CHECK2-NEXT:  entry:
1824 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1825 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1826 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1827 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1828 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1829 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1830 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1831 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1832 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1833 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1834 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1835 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1836 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1837 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1838 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1839 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1840 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
1841 // CHECK2-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1842 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1843 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1844 // CHECK2-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1845 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1846 // CHECK2-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1847 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1848 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1849 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1850 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1851 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1852 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1853 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1854 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1855 // CHECK2:       cond.true:
1856 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1857 // CHECK2:       cond.false:
1858 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1859 // CHECK2-NEXT:    br label [[COND_END]]
1860 // CHECK2:       cond.end:
1861 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1862 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1863 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1864 // CHECK2-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1865 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1866 // CHECK2:       omp.inner.for.cond:
1867 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1868 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1869 // CHECK2-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1870 // CHECK2-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1871 // CHECK2:       omp.inner.for.body:
1872 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1873 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1874 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1875 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1876 // CHECK2-NEXT:    invoke void @_Z3foov()
1877 // CHECK2-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
1878 // CHECK2:       invoke.cont:
1879 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1880 // CHECK2:       omp.body.continue:
1881 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1882 // CHECK2:       omp.inner.for.inc:
1883 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1884 // CHECK2-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1885 // CHECK2-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1886 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1887 // CHECK2:       omp.inner.for.end:
1888 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1889 // CHECK2:       omp.loop.exit:
1890 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1891 // CHECK2-NEXT:    ret void
1892 // CHECK2:       terminate.lpad:
1893 // CHECK2-NEXT:    [[TMP11:%.*]] = landingpad { i8*, i32 }
1894 // CHECK2-NEXT:    catch i8* null
1895 // CHECK2-NEXT:    [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
1896 // CHECK2-NEXT:    call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR9]]
1897 // CHECK2-NEXT:    unreachable
1898 //
1899 //
1900 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l40
1901 // CHECK2-SAME: () #[[ATTR3]] {
1902 // CHECK2-NEXT:  entry:
1903 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
1904 // CHECK2-NEXT:    ret void
1905 //
1906 //
1907 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..6
1908 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
1909 // CHECK2-NEXT:  entry:
1910 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1911 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1912 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1913 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1914 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1915 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1916 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1917 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1918 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1919 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1920 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1921 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1922 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1923 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1924 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1925 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1926 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1927 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1928 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1929 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1930 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1931 // CHECK2:       cond.true:
1932 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1933 // CHECK2:       cond.false:
1934 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1935 // CHECK2-NEXT:    br label [[COND_END]]
1936 // CHECK2:       cond.end:
1937 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1938 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1939 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1940 // CHECK2-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1941 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1942 // CHECK2:       omp.inner.for.cond:
1943 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1944 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1945 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1946 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1947 // CHECK2:       omp.inner.for.body:
1948 // CHECK2-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23)
1949 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1950 // CHECK2-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1951 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1952 // CHECK2-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1953 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
1954 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1955 // CHECK2:       omp.inner.for.inc:
1956 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1957 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1958 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1959 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1960 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1961 // CHECK2:       omp.inner.for.end:
1962 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1963 // CHECK2:       omp.loop.exit:
1964 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1965 // CHECK2-NEXT:    ret void
1966 //
1967 //
1968 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..7
1969 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
1970 // CHECK2-NEXT:  entry:
1971 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1972 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1973 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1974 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1975 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1976 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1977 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1978 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1979 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1980 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1981 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1982 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1983 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1984 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1985 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1986 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1987 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
1988 // CHECK2-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1989 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1990 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1991 // CHECK2-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1992 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1993 // CHECK2-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1994 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1995 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1996 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1997 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1998 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1999 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2000 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2001 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2002 // CHECK2:       cond.true:
2003 // CHECK2-NEXT:    br label [[COND_END:%.*]]
2004 // CHECK2:       cond.false:
2005 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2006 // CHECK2-NEXT:    br label [[COND_END]]
2007 // CHECK2:       cond.end:
2008 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2009 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2010 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2011 // CHECK2-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2012 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2013 // CHECK2:       omp.inner.for.cond:
2014 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2015 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2016 // CHECK2-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2017 // CHECK2-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2018 // CHECK2:       omp.inner.for.body:
2019 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2020 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2021 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2022 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
2023 // CHECK2-NEXT:    invoke void @_Z3foov()
2024 // CHECK2-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
2025 // CHECK2:       invoke.cont:
2026 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2027 // CHECK2:       omp.body.continue:
2028 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2029 // CHECK2:       omp.inner.for.inc:
2030 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2031 // CHECK2-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2032 // CHECK2-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
2033 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
2034 // CHECK2:       omp.inner.for.end:
2035 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2036 // CHECK2:       omp.loop.exit:
2037 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2038 // CHECK2-NEXT:    ret void
2039 // CHECK2:       terminate.lpad:
2040 // CHECK2-NEXT:    [[TMP11:%.*]] = landingpad { i8*, i32 }
2041 // CHECK2-NEXT:    catch i8* null
2042 // CHECK2-NEXT:    [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
2043 // CHECK2-NEXT:    call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR9]]
2044 // CHECK2-NEXT:    unreachable
2045 //
2046 //
2047 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l36
2048 // CHECK2-SAME: () #[[ATTR3]] {
2049 // CHECK2-NEXT:  entry:
2050 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*))
2051 // CHECK2-NEXT:    ret void
2052 //
2053 //
2054 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..8
2055 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
2056 // CHECK2-NEXT:  entry:
2057 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2058 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2059 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2060 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2061 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2062 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2063 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2064 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2065 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
2066 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2067 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2068 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2069 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2070 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2071 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2072 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2073 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2074 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2075 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2076 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2077 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2078 // CHECK2:       cond.true:
2079 // CHECK2-NEXT:    br label [[COND_END:%.*]]
2080 // CHECK2:       cond.false:
2081 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2082 // CHECK2-NEXT:    br label [[COND_END]]
2083 // CHECK2:       cond.end:
2084 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2085 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2086 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2087 // CHECK2-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2088 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2089 // CHECK2:       omp.inner.for.cond:
2090 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2091 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2092 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2093 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2094 // CHECK2:       omp.inner.for.body:
2095 // CHECK2-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1)
2096 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2097 // CHECK2-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2098 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2099 // CHECK2-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2100 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
2101 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2102 // CHECK2:       omp.inner.for.inc:
2103 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2104 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2105 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
2106 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2107 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
2108 // CHECK2:       omp.inner.for.end:
2109 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2110 // CHECK2:       omp.loop.exit:
2111 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2112 // CHECK2-NEXT:    ret void
2113 //
2114 //
2115 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..9
2116 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
2117 // CHECK2-NEXT:  entry:
2118 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2119 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2120 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2121 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2122 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2123 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2124 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2125 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2126 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2127 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2128 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
2129 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2130 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2131 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2132 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2133 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2134 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
2135 // CHECK2-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2136 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2137 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2138 // CHECK2-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2139 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2140 // CHECK2-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2141 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2142 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2143 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2144 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2145 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2146 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2147 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2148 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2149 // CHECK2:       cond.true:
2150 // CHECK2-NEXT:    br label [[COND_END:%.*]]
2151 // CHECK2:       cond.false:
2152 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2153 // CHECK2-NEXT:    br label [[COND_END]]
2154 // CHECK2:       cond.end:
2155 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2156 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2157 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2158 // CHECK2-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2159 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2160 // CHECK2:       omp.inner.for.cond:
2161 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2162 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2163 // CHECK2-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2164 // CHECK2-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2165 // CHECK2:       omp.inner.for.body:
2166 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2167 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2168 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2169 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
2170 // CHECK2-NEXT:    invoke void @_Z3foov()
2171 // CHECK2-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
2172 // CHECK2:       invoke.cont:
2173 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2174 // CHECK2:       omp.body.continue:
2175 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2176 // CHECK2:       omp.inner.for.inc:
2177 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2178 // CHECK2-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2179 // CHECK2-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
2180 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
2181 // CHECK2:       omp.inner.for.end:
2182 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2183 // CHECK2:       omp.loop.exit:
2184 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2185 // CHECK2-NEXT:    ret void
2186 // CHECK2:       terminate.lpad:
2187 // CHECK2-NEXT:    [[TMP11:%.*]] = landingpad { i8*, i32 }
2188 // CHECK2-NEXT:    catch i8* null
2189 // CHECK2-NEXT:    [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
2190 // CHECK2-NEXT:    call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR9]]
2191 // CHECK2-NEXT:    unreachable
2192 //
2193 //
2194 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l40
2195 // CHECK2-SAME: () #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
2196 // CHECK2-NEXT:  entry:
2197 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
2198 // CHECK2-NEXT:    [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8
2199 // CHECK2-NEXT:    [[EXN_SLOT:%.*]] = alloca i8*, align 8
2200 // CHECK2-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
2201 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
2202 // CHECK2-NEXT:    invoke void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 23)
2203 // CHECK2-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
2204 // CHECK2:       invoke.cont:
2205 // CHECK2-NEXT:    [[CALL:%.*]] = call signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]])
2206 // CHECK2-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]]
2207 // CHECK2-NEXT:    store i8 [[CALL]], i8* [[DOTCAPTURE_EXPR_]], align 1
2208 // CHECK2-NEXT:    [[TMP0:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
2209 // CHECK2-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
2210 // CHECK2-NEXT:    store i8 [[TMP0]], i8* [[CONV]], align 1
2211 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
2212 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i64 [[TMP1]])
2213 // CHECK2-NEXT:    ret void
2214 // CHECK2:       lpad:
2215 // CHECK2-NEXT:    [[TMP2:%.*]] = landingpad { i8*, i32 }
2216 // CHECK2-NEXT:    catch i8* null
2217 // CHECK2-NEXT:    [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0
2218 // CHECK2-NEXT:    store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8
2219 // CHECK2-NEXT:    [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1
2220 // CHECK2-NEXT:    store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4
2221 // CHECK2-NEXT:    br label [[TERMINATE_HANDLER:%.*]]
2222 // CHECK2:       terminate.handler:
2223 // CHECK2-NEXT:    [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8
2224 // CHECK2-NEXT:    call void @__clang_call_terminate(i8* [[EXN]]) #[[ATTR9]]
2225 // CHECK2-NEXT:    unreachable
2226 //
2227 //
2228 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..10
2229 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
2230 // CHECK2-NEXT:  entry:
2231 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2232 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2233 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2234 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2235 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2236 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2237 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2238 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2239 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2240 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
2241 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2242 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2243 // CHECK2-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2244 // CHECK2-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
2245 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2246 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2247 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2248 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2249 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2250 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2251 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2252 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2253 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2254 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2255 // CHECK2:       cond.true:
2256 // CHECK2-NEXT:    br label [[COND_END:%.*]]
2257 // CHECK2:       cond.false:
2258 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2259 // CHECK2-NEXT:    br label [[COND_END]]
2260 // CHECK2:       cond.end:
2261 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2262 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2263 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2264 // CHECK2-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2265 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2266 // CHECK2:       omp.inner.for.cond:
2267 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2268 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2269 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2270 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2271 // CHECK2:       omp.inner.for.body:
2272 // CHECK2-NEXT:    [[TMP7:%.*]] = load i8, i8* [[CONV]], align 1
2273 // CHECK2-NEXT:    [[TMP8:%.*]] = sext i8 [[TMP7]] to i32
2274 // CHECK2-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP8]])
2275 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2276 // CHECK2-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2277 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2278 // CHECK2-NEXT:    [[TMP12:%.*]] = zext i32 [[TMP11]] to i64
2279 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP10]], i64 [[TMP12]])
2280 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2281 // CHECK2:       omp.inner.for.inc:
2282 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2283 // CHECK2-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2284 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
2285 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2286 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
2287 // CHECK2:       omp.inner.for.end:
2288 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2289 // CHECK2:       omp.loop.exit:
2290 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2291 // CHECK2-NEXT:    ret void
2292 //
2293 //
2294 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..11
2295 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
2296 // CHECK2-NEXT:  entry:
2297 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2298 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2299 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2300 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2301 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2302 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2303 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2304 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2305 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2306 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2307 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
2308 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2309 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2310 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2311 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2312 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2313 // CHECK2-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
2314 // CHECK2-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2315 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2316 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2317 // CHECK2-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2318 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2319 // CHECK2-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2320 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2321 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2322 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2323 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2324 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2325 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2326 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2327 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2328 // CHECK2:       cond.true:
2329 // CHECK2-NEXT:    br label [[COND_END:%.*]]
2330 // CHECK2:       cond.false:
2331 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2332 // CHECK2-NEXT:    br label [[COND_END]]
2333 // CHECK2:       cond.end:
2334 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2335 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2336 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2337 // CHECK2-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2338 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2339 // CHECK2:       omp.inner.for.cond:
2340 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2341 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2342 // CHECK2-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2343 // CHECK2-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2344 // CHECK2:       omp.inner.for.body:
2345 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2346 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2347 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2348 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
2349 // CHECK2-NEXT:    invoke void @_Z3foov()
2350 // CHECK2-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
2351 // CHECK2:       invoke.cont:
2352 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2353 // CHECK2:       omp.body.continue:
2354 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2355 // CHECK2:       omp.inner.for.inc:
2356 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2357 // CHECK2-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2358 // CHECK2-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
2359 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
2360 // CHECK2:       omp.inner.for.end:
2361 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2362 // CHECK2:       omp.loop.exit:
2363 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2364 // CHECK2-NEXT:    ret void
2365 // CHECK2:       terminate.lpad:
2366 // CHECK2-NEXT:    [[TMP11:%.*]] = landingpad { i8*, i32 }
2367 // CHECK2-NEXT:    catch i8* null
2368 // CHECK2-NEXT:    [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
2369 // CHECK2-NEXT:    call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR9]]
2370 // CHECK2-NEXT:    unreachable
2371 //
2372 //
2373 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2374 // CHECK2-SAME: () #[[ATTR8:[0-9]+]] section ".text.startup" {
2375 // CHECK2-NEXT:  entry:
2376 // CHECK2-NEXT:    call void @__tgt_register_requires(i64 1)
2377 // CHECK2-NEXT:    ret void
2378 //
2379 //
2380 // CHECK5-LABEL: define {{[^@]+}}@main
2381 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
2382 // CHECK5-NEXT:  entry:
2383 // CHECK5-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
2384 // CHECK5-NEXT:    [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
2385 // CHECK5-NEXT:    [[A:%.*]] = alloca i8, align 1
2386 // CHECK5-NEXT:    [[EXN_SLOT:%.*]] = alloca i8*, align 8
2387 // CHECK5-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
2388 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2389 // CHECK5-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
2390 // CHECK5-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
2391 // CHECK5-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
2392 // CHECK5-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
2393 // CHECK5-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
2394 // CHECK5-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
2395 // CHECK5-NEXT:    store i32 0, i32* [[RETVAL]], align 4
2396 // CHECK5-NEXT:    call void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[S]], i64 0)
2397 // CHECK5-NEXT:    [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[S]])
2398 // CHECK5-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
2399 // CHECK5:       invoke.cont:
2400 // CHECK5-NEXT:    store i8 [[CALL]], i8* [[A]], align 1
2401 // CHECK5-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100)
2402 // CHECK5-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l50.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 2)
2403 // CHECK5-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
2404 // CHECK5-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2405 // CHECK5:       omp_offload.failed:
2406 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l50() #[[ATTR6:[0-9]+]]
2407 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT]]
2408 // CHECK5:       lpad:
2409 // CHECK5-NEXT:    [[TMP2:%.*]] = landingpad { i8*, i32 }
2410 // CHECK5-NEXT:    cleanup
2411 // CHECK5-NEXT:    [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0
2412 // CHECK5-NEXT:    store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8
2413 // CHECK5-NEXT:    [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1
2414 // CHECK5-NEXT:    store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4
2415 // CHECK5-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
2416 // CHECK5-NEXT:    br label [[EH_RESUME:%.*]]
2417 // CHECK5:       omp_offload.cont:
2418 // CHECK5-NEXT:    [[TMP5:%.*]] = load i8, i8* [[A]], align 1
2419 // CHECK5-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8*
2420 // CHECK5-NEXT:    store i8 [[TMP5]], i8* [[CONV]], align 1
2421 // CHECK5-NEXT:    [[TMP6:%.*]] = load i64, i64* [[A_CASTED]], align 8
2422 // CHECK5-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2423 // CHECK5-NEXT:    [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
2424 // CHECK5-NEXT:    store i64 [[TMP6]], i64* [[TMP8]], align 8
2425 // CHECK5-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2426 // CHECK5-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
2427 // CHECK5-NEXT:    store i64 [[TMP6]], i64* [[TMP10]], align 8
2428 // CHECK5-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2429 // CHECK5-NEXT:    store i8* null, i8** [[TMP11]], align 8
2430 // CHECK5-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2431 // CHECK5-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2432 // CHECK5-NEXT:    [[TMP14:%.*]] = load i8, i8* [[A]], align 1
2433 // CHECK5-NEXT:    store i8 [[TMP14]], i8* [[DOTCAPTURE_EXPR_]], align 1
2434 // CHECK5-NEXT:    [[TMP15:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
2435 // CHECK5-NEXT:    [[TMP16:%.*]] = zext i8 [[TMP15]] to i32
2436 // CHECK5-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
2437 // CHECK5-NEXT:    [[TMP17:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l55.region_id, i32 1, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP16]])
2438 // CHECK5-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
2439 // CHECK5-NEXT:    br i1 [[TMP18]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
2440 // CHECK5:       omp_offload.failed2:
2441 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l55(i64 [[TMP6]]) #[[ATTR6]]
2442 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
2443 // CHECK5:       omp_offload.cont3:
2444 // CHECK5-NEXT:    [[TMP19:%.*]] = load i8, i8* [[A]], align 1
2445 // CHECK5-NEXT:    [[CONV4:%.*]] = sext i8 [[TMP19]] to i32
2446 // CHECK5-NEXT:    [[CALL6:%.*]] = invoke signext i32 @_Z5tmainIcLi5EEiv()
2447 // CHECK5-NEXT:    to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]]
2448 // CHECK5:       invoke.cont5:
2449 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[CONV4]], [[CALL6]]
2450 // CHECK5-NEXT:    [[CALL8:%.*]] = invoke signext i32 @_Z5tmainI1SLi1EEiv()
2451 // CHECK5-NEXT:    to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD]]
2452 // CHECK5:       invoke.cont7:
2453 // CHECK5-NEXT:    [[ADD9:%.*]] = add nsw i32 [[ADD]], [[CALL8]]
2454 // CHECK5-NEXT:    store i32 [[ADD9]], i32* [[RETVAL]], align 4
2455 // CHECK5-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
2456 // CHECK5-NEXT:    [[TMP20:%.*]] = load i32, i32* [[RETVAL]], align 4
2457 // CHECK5-NEXT:    ret i32 [[TMP20]]
2458 // CHECK5:       eh.resume:
2459 // CHECK5-NEXT:    [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8
2460 // CHECK5-NEXT:    [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
2461 // CHECK5-NEXT:    [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
2462 // CHECK5-NEXT:    [[LPAD_VAL10:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
2463 // CHECK5-NEXT:    resume { i8*, i32 } [[LPAD_VAL10]]
2464 //
2465 //
2466 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SC1El
2467 // CHECK5-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
2468 // CHECK5-NEXT:  entry:
2469 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2470 // CHECK5-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2471 // CHECK5-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2472 // CHECK5-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
2473 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2474 // CHECK5-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
2475 // CHECK5-NEXT:    call void @_ZN1SC2El(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]], i64 [[TMP0]])
2476 // CHECK5-NEXT:    ret void
2477 //
2478 //
2479 // CHECK5-LABEL: define {{[^@]+}}@_ZN1ScvcEv
2480 // CHECK5-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 {
2481 // CHECK5-NEXT:  entry:
2482 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2483 // CHECK5-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2484 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2485 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
2486 // CHECK5-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A]], align 8
2487 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i8
2488 // CHECK5-NEXT:    ret i8 [[CONV]]
2489 //
2490 //
2491 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l50
2492 // CHECK5-SAME: () #[[ATTR3:[0-9]+]] {
2493 // CHECK5-NEXT:  entry:
2494 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
2495 // CHECK5-NEXT:    ret void
2496 //
2497 //
2498 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined.
2499 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
2500 // CHECK5-NEXT:  entry:
2501 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2502 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2503 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2504 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2505 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2506 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2507 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2508 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2509 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
2510 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2511 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2512 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2513 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2514 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2515 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2516 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2517 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2518 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2519 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2520 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2521 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2522 // CHECK5:       cond.true:
2523 // CHECK5-NEXT:    br label [[COND_END:%.*]]
2524 // CHECK5:       cond.false:
2525 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2526 // CHECK5-NEXT:    br label [[COND_END]]
2527 // CHECK5:       cond.end:
2528 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2529 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2530 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2531 // CHECK5-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2532 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2533 // CHECK5:       omp.inner.for.cond:
2534 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2535 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2536 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2537 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2538 // CHECK5:       omp.inner.for.body:
2539 // CHECK5-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2)
2540 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2541 // CHECK5-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2542 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2543 // CHECK5-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2544 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
2545 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2546 // CHECK5:       omp.inner.for.inc:
2547 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2548 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2549 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
2550 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2551 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
2552 // CHECK5:       omp.inner.for.end:
2553 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2554 // CHECK5:       omp.loop.exit:
2555 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2556 // CHECK5-NEXT:    ret void
2557 //
2558 //
2559 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..1
2560 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
2561 // CHECK5-NEXT:  entry:
2562 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2563 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2564 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2565 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2566 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2567 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2568 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2569 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2570 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2571 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2572 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
2573 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2574 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2575 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2576 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2577 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2578 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
2579 // CHECK5-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2580 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2581 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2582 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2583 // CHECK5-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2584 // CHECK5-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2585 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2586 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2587 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2588 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2589 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2590 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2591 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2592 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2593 // CHECK5:       cond.true:
2594 // CHECK5-NEXT:    br label [[COND_END:%.*]]
2595 // CHECK5:       cond.false:
2596 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2597 // CHECK5-NEXT:    br label [[COND_END]]
2598 // CHECK5:       cond.end:
2599 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2600 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2601 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2602 // CHECK5-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2603 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2604 // CHECK5:       omp.inner.for.cond:
2605 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2606 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2607 // CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2608 // CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2609 // CHECK5:       omp.inner.for.body:
2610 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2611 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2612 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2613 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
2614 // CHECK5-NEXT:    invoke void @_Z3foov()
2615 // CHECK5-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
2616 // CHECK5:       invoke.cont:
2617 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2618 // CHECK5:       omp.body.continue:
2619 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2620 // CHECK5:       omp.inner.for.inc:
2621 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2622 // CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2623 // CHECK5-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
2624 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
2625 // CHECK5:       omp.inner.for.end:
2626 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2627 // CHECK5:       omp.loop.exit:
2628 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2629 // CHECK5-NEXT:    ret void
2630 // CHECK5:       terminate.lpad:
2631 // CHECK5-NEXT:    [[TMP11:%.*]] = landingpad { i8*, i32 }
2632 // CHECK5-NEXT:    catch i8* null
2633 // CHECK5-NEXT:    [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
2634 // CHECK5-NEXT:    call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR9:[0-9]+]]
2635 // CHECK5-NEXT:    unreachable
2636 //
2637 //
2638 // CHECK5-LABEL: define {{[^@]+}}@__clang_call_terminate
2639 // CHECK5-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat {
2640 // CHECK5-NEXT:    [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]]
2641 // CHECK5-NEXT:    call void @_ZSt9terminatev() #[[ATTR9]]
2642 // CHECK5-NEXT:    unreachable
2643 //
2644 //
2645 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l55
2646 // CHECK5-SAME: (i64 [[A:%.*]]) #[[ATTR3]] {
2647 // CHECK5-NEXT:  entry:
2648 // CHECK5-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2649 // CHECK5-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
2650 // CHECK5-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
2651 // CHECK5-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
2652 // CHECK5-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8*
2653 // CHECK5-NEXT:    [[TMP0:%.*]] = load i8, i8* [[CONV]], align 1
2654 // CHECK5-NEXT:    store i8 [[TMP0]], i8* [[DOTCAPTURE_EXPR_]], align 1
2655 // CHECK5-NEXT:    [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
2656 // CHECK5-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
2657 // CHECK5-NEXT:    store i8 [[TMP1]], i8* [[CONV1]], align 1
2658 // CHECK5-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
2659 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP2]])
2660 // CHECK5-NEXT:    ret void
2661 //
2662 //
2663 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..2
2664 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
2665 // CHECK5-NEXT:  entry:
2666 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2667 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2668 // CHECK5-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2669 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2670 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2671 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2672 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2673 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2674 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2675 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
2676 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2677 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2678 // CHECK5-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2679 // CHECK5-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
2680 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2681 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2682 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2683 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2684 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2685 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2686 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2687 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2688 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2689 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2690 // CHECK5:       cond.true:
2691 // CHECK5-NEXT:    br label [[COND_END:%.*]]
2692 // CHECK5:       cond.false:
2693 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2694 // CHECK5-NEXT:    br label [[COND_END]]
2695 // CHECK5:       cond.end:
2696 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2697 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2698 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2699 // CHECK5-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2700 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2701 // CHECK5:       omp.inner.for.cond:
2702 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2703 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2704 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2705 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2706 // CHECK5:       omp.inner.for.body:
2707 // CHECK5-NEXT:    [[TMP7:%.*]] = load i8, i8* [[CONV]], align 1
2708 // CHECK5-NEXT:    [[TMP8:%.*]] = sext i8 [[TMP7]] to i32
2709 // CHECK5-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP8]])
2710 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2711 // CHECK5-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2712 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2713 // CHECK5-NEXT:    [[TMP12:%.*]] = zext i32 [[TMP11]] to i64
2714 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP10]], i64 [[TMP12]])
2715 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2716 // CHECK5:       omp.inner.for.inc:
2717 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2718 // CHECK5-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2719 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
2720 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2721 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
2722 // CHECK5:       omp.inner.for.end:
2723 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2724 // CHECK5:       omp.loop.exit:
2725 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2726 // CHECK5-NEXT:    ret void
2727 //
2728 //
2729 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..3
2730 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
2731 // CHECK5-NEXT:  entry:
2732 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2733 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2734 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2735 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2736 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2737 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2738 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2739 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2740 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2741 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2742 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
2743 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2744 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2745 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2746 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2747 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2748 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
2749 // CHECK5-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2750 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2751 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2752 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2753 // CHECK5-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2754 // CHECK5-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2755 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2756 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2757 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2758 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2759 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2760 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2761 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2762 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2763 // CHECK5:       cond.true:
2764 // CHECK5-NEXT:    br label [[COND_END:%.*]]
2765 // CHECK5:       cond.false:
2766 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2767 // CHECK5-NEXT:    br label [[COND_END]]
2768 // CHECK5:       cond.end:
2769 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2770 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2771 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2772 // CHECK5-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2773 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2774 // CHECK5:       omp.inner.for.cond:
2775 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2776 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2777 // CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2778 // CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2779 // CHECK5:       omp.inner.for.body:
2780 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2781 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2782 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2783 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
2784 // CHECK5-NEXT:    invoke void @_Z3foov()
2785 // CHECK5-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
2786 // CHECK5:       invoke.cont:
2787 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2788 // CHECK5:       omp.body.continue:
2789 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2790 // CHECK5:       omp.inner.for.inc:
2791 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2792 // CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2793 // CHECK5-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
2794 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
2795 // CHECK5:       omp.inner.for.end:
2796 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2797 // CHECK5:       omp.loop.exit:
2798 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2799 // CHECK5-NEXT:    ret void
2800 // CHECK5:       terminate.lpad:
2801 // CHECK5-NEXT:    [[TMP11:%.*]] = landingpad { i8*, i32 }
2802 // CHECK5-NEXT:    catch i8* null
2803 // CHECK5-NEXT:    [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
2804 // CHECK5-NEXT:    call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR9]]
2805 // CHECK5-NEXT:    unreachable
2806 //
2807 //
2808 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv
2809 // CHECK5-SAME: () #[[ATTR2]] comdat {
2810 // CHECK5-NEXT:  entry:
2811 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2812 // CHECK5-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
2813 // CHECK5-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
2814 // CHECK5-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l36.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 5)
2815 // CHECK5-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
2816 // CHECK5-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2817 // CHECK5:       omp_offload.failed:
2818 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l36() #[[ATTR6]]
2819 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT]]
2820 // CHECK5:       omp_offload.cont:
2821 // CHECK5-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
2822 // CHECK5-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l40.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 23)
2823 // CHECK5-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
2824 // CHECK5-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
2825 // CHECK5:       omp_offload.failed2:
2826 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l40() #[[ATTR6]]
2827 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
2828 // CHECK5:       omp_offload.cont3:
2829 // CHECK5-NEXT:    ret i32 0
2830 //
2831 //
2832 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv
2833 // CHECK5-SAME: () #[[ATTR2]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
2834 // CHECK5-NEXT:  entry:
2835 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2836 // CHECK5-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
2837 // CHECK5-NEXT:    [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8
2838 // CHECK5-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
2839 // CHECK5-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
2840 // CHECK5-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l36.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
2841 // CHECK5-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
2842 // CHECK5-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2843 // CHECK5:       omp_offload.failed:
2844 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l36() #[[ATTR6]]
2845 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT]]
2846 // CHECK5:       omp_offload.cont:
2847 // CHECK5-NEXT:    invoke void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 23)
2848 // CHECK5-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
2849 // CHECK5:       invoke.cont:
2850 // CHECK5-NEXT:    [[CALL:%.*]] = call signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]])
2851 // CHECK5-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]]
2852 // CHECK5-NEXT:    store i8 [[CALL]], i8* [[DOTCAPTURE_EXPR_]], align 1
2853 // CHECK5-NEXT:    [[TMP2:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
2854 // CHECK5-NEXT:    [[TMP3:%.*]] = zext i8 [[TMP2]] to i32
2855 // CHECK5-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
2856 // CHECK5-NEXT:    [[TMP4:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l40.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 [[TMP3]])
2857 // CHECK5-NEXT:    [[TMP5:%.*]] = icmp ne i32 [[TMP4]], 0
2858 // CHECK5-NEXT:    br i1 [[TMP5]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
2859 // CHECK5:       omp_offload.failed2:
2860 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l40() #[[ATTR6]]
2861 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
2862 // CHECK5:       omp_offload.cont3:
2863 // CHECK5-NEXT:    ret i32 0
2864 // CHECK5:       terminate.lpad:
2865 // CHECK5-NEXT:    [[TMP6:%.*]] = landingpad { i8*, i32 }
2866 // CHECK5-NEXT:    catch i8* null
2867 // CHECK5-NEXT:    [[TMP7:%.*]] = extractvalue { i8*, i32 } [[TMP6]], 0
2868 // CHECK5-NEXT:    call void @__clang_call_terminate(i8* [[TMP7]]) #[[ATTR9]]
2869 // CHECK5-NEXT:    unreachable
2870 //
2871 //
2872 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SD1Ev
2873 // CHECK5-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR7:[0-9]+]] comdat align 2 {
2874 // CHECK5-NEXT:  entry:
2875 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2876 // CHECK5-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2877 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2878 // CHECK5-NEXT:    call void @_ZN1SD2Ev(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR6]]
2879 // CHECK5-NEXT:    ret void
2880 //
2881 //
2882 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SC2El
2883 // CHECK5-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR7]] comdat align 2 {
2884 // CHECK5-NEXT:  entry:
2885 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2886 // CHECK5-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2887 // CHECK5-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2888 // CHECK5-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
2889 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2890 // CHECK5-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
2891 // CHECK5-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
2892 // CHECK5-NEXT:    store i64 [[TMP0]], i64* [[A2]], align 8
2893 // CHECK5-NEXT:    ret void
2894 //
2895 //
2896 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l36
2897 // CHECK5-SAME: () #[[ATTR3]] {
2898 // CHECK5-NEXT:  entry:
2899 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
2900 // CHECK5-NEXT:    ret void
2901 //
2902 //
2903 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..4
2904 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
2905 // CHECK5-NEXT:  entry:
2906 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2907 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2908 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2909 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2910 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2911 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2912 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2913 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2914 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
2915 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2916 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2917 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2918 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2919 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2920 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2921 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2922 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2923 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2924 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2925 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2926 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2927 // CHECK5:       cond.true:
2928 // CHECK5-NEXT:    br label [[COND_END:%.*]]
2929 // CHECK5:       cond.false:
2930 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2931 // CHECK5-NEXT:    br label [[COND_END]]
2932 // CHECK5:       cond.end:
2933 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2934 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2935 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2936 // CHECK5-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2937 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2938 // CHECK5:       omp.inner.for.cond:
2939 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2940 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2941 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2942 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2943 // CHECK5:       omp.inner.for.body:
2944 // CHECK5-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5)
2945 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2946 // CHECK5-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2947 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2948 // CHECK5-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2949 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
2950 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2951 // CHECK5:       omp.inner.for.inc:
2952 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2953 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2954 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
2955 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2956 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
2957 // CHECK5:       omp.inner.for.end:
2958 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2959 // CHECK5:       omp.loop.exit:
2960 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2961 // CHECK5-NEXT:    ret void
2962 //
2963 //
2964 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..5
2965 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
2966 // CHECK5-NEXT:  entry:
2967 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2968 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2969 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2970 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2971 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2972 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2973 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2974 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2975 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2976 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2977 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
2978 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2979 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2980 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2981 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2982 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2983 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
2984 // CHECK5-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2985 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2986 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2987 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2988 // CHECK5-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2989 // CHECK5-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2990 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2991 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2992 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2993 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2994 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2995 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2996 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2997 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2998 // CHECK5:       cond.true:
2999 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3000 // CHECK5:       cond.false:
3001 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3002 // CHECK5-NEXT:    br label [[COND_END]]
3003 // CHECK5:       cond.end:
3004 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3005 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3006 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3007 // CHECK5-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3008 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3009 // CHECK5:       omp.inner.for.cond:
3010 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3011 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3012 // CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3013 // CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3014 // CHECK5:       omp.inner.for.body:
3015 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3016 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3017 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3018 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
3019 // CHECK5-NEXT:    invoke void @_Z3foov()
3020 // CHECK5-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
3021 // CHECK5:       invoke.cont:
3022 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3023 // CHECK5:       omp.body.continue:
3024 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3025 // CHECK5:       omp.inner.for.inc:
3026 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3027 // CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3028 // CHECK5-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
3029 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
3030 // CHECK5:       omp.inner.for.end:
3031 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3032 // CHECK5:       omp.loop.exit:
3033 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3034 // CHECK5-NEXT:    ret void
3035 // CHECK5:       terminate.lpad:
3036 // CHECK5-NEXT:    [[TMP11:%.*]] = landingpad { i8*, i32 }
3037 // CHECK5-NEXT:    catch i8* null
3038 // CHECK5-NEXT:    [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
3039 // CHECK5-NEXT:    call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR9]]
3040 // CHECK5-NEXT:    unreachable
3041 //
3042 //
3043 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l40
3044 // CHECK5-SAME: () #[[ATTR3]] {
3045 // CHECK5-NEXT:  entry:
3046 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
3047 // CHECK5-NEXT:    ret void
3048 //
3049 //
3050 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..6
3051 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
3052 // CHECK5-NEXT:  entry:
3053 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3054 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3055 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3056 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3057 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3058 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3059 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3060 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3061 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3062 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3063 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3064 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3065 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3066 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3067 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3068 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3069 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3070 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3071 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3072 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3073 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3074 // CHECK5:       cond.true:
3075 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3076 // CHECK5:       cond.false:
3077 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3078 // CHECK5-NEXT:    br label [[COND_END]]
3079 // CHECK5:       cond.end:
3080 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3081 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3082 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3083 // CHECK5-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3084 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3085 // CHECK5:       omp.inner.for.cond:
3086 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3087 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3088 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3089 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3090 // CHECK5:       omp.inner.for.body:
3091 // CHECK5-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23)
3092 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3093 // CHECK5-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3094 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3095 // CHECK5-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3096 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
3097 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3098 // CHECK5:       omp.inner.for.inc:
3099 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3100 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3101 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
3102 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3103 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
3104 // CHECK5:       omp.inner.for.end:
3105 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3106 // CHECK5:       omp.loop.exit:
3107 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3108 // CHECK5-NEXT:    ret void
3109 //
3110 //
3111 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..7
3112 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
3113 // CHECK5-NEXT:  entry:
3114 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3115 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3116 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3117 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3118 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3119 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3120 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3121 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3122 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3123 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3124 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3125 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3126 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3127 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3128 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3129 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3130 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
3131 // CHECK5-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3132 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3133 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3134 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3135 // CHECK5-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3136 // CHECK5-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3137 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3138 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3139 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3140 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3141 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3142 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3143 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3144 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3145 // CHECK5:       cond.true:
3146 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3147 // CHECK5:       cond.false:
3148 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3149 // CHECK5-NEXT:    br label [[COND_END]]
3150 // CHECK5:       cond.end:
3151 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3152 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3153 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3154 // CHECK5-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3155 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3156 // CHECK5:       omp.inner.for.cond:
3157 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3158 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3159 // CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3160 // CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3161 // CHECK5:       omp.inner.for.body:
3162 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3163 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3164 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3165 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
3166 // CHECK5-NEXT:    invoke void @_Z3foov()
3167 // CHECK5-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
3168 // CHECK5:       invoke.cont:
3169 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3170 // CHECK5:       omp.body.continue:
3171 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3172 // CHECK5:       omp.inner.for.inc:
3173 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3174 // CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3175 // CHECK5-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
3176 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
3177 // CHECK5:       omp.inner.for.end:
3178 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3179 // CHECK5:       omp.loop.exit:
3180 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3181 // CHECK5-NEXT:    ret void
3182 // CHECK5:       terminate.lpad:
3183 // CHECK5-NEXT:    [[TMP11:%.*]] = landingpad { i8*, i32 }
3184 // CHECK5-NEXT:    catch i8* null
3185 // CHECK5-NEXT:    [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
3186 // CHECK5-NEXT:    call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR9]]
3187 // CHECK5-NEXT:    unreachable
3188 //
3189 //
3190 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l36
3191 // CHECK5-SAME: () #[[ATTR3]] {
3192 // CHECK5-NEXT:  entry:
3193 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*))
3194 // CHECK5-NEXT:    ret void
3195 //
3196 //
3197 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..8
3198 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
3199 // CHECK5-NEXT:  entry:
3200 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3201 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3202 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3203 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3204 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3205 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3206 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3207 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3208 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3209 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3210 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3211 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3212 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3213 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3214 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3215 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3216 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3217 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3218 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3219 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3220 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3221 // CHECK5:       cond.true:
3222 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3223 // CHECK5:       cond.false:
3224 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3225 // CHECK5-NEXT:    br label [[COND_END]]
3226 // CHECK5:       cond.end:
3227 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3228 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3229 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3230 // CHECK5-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3231 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3232 // CHECK5:       omp.inner.for.cond:
3233 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3234 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3235 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3236 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3237 // CHECK5:       omp.inner.for.body:
3238 // CHECK5-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1)
3239 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3240 // CHECK5-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3241 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3242 // CHECK5-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3243 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
3244 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3245 // CHECK5:       omp.inner.for.inc:
3246 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3247 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3248 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
3249 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3250 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
3251 // CHECK5:       omp.inner.for.end:
3252 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3253 // CHECK5:       omp.loop.exit:
3254 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3255 // CHECK5-NEXT:    ret void
3256 //
3257 //
3258 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..9
3259 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
3260 // CHECK5-NEXT:  entry:
3261 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3262 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3263 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3264 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3265 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3266 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3267 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3268 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3269 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3270 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3271 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3272 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3273 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3274 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3275 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3276 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3277 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
3278 // CHECK5-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3279 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3280 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3281 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3282 // CHECK5-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3283 // CHECK5-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3284 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3285 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3286 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3287 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3288 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3289 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3290 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3291 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3292 // CHECK5:       cond.true:
3293 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3294 // CHECK5:       cond.false:
3295 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3296 // CHECK5-NEXT:    br label [[COND_END]]
3297 // CHECK5:       cond.end:
3298 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3299 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3300 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3301 // CHECK5-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3302 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3303 // CHECK5:       omp.inner.for.cond:
3304 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3305 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3306 // CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3307 // CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3308 // CHECK5:       omp.inner.for.body:
3309 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3310 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3311 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3312 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
3313 // CHECK5-NEXT:    invoke void @_Z3foov()
3314 // CHECK5-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
3315 // CHECK5:       invoke.cont:
3316 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3317 // CHECK5:       omp.body.continue:
3318 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3319 // CHECK5:       omp.inner.for.inc:
3320 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3321 // CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3322 // CHECK5-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
3323 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
3324 // CHECK5:       omp.inner.for.end:
3325 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3326 // CHECK5:       omp.loop.exit:
3327 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3328 // CHECK5-NEXT:    ret void
3329 // CHECK5:       terminate.lpad:
3330 // CHECK5-NEXT:    [[TMP11:%.*]] = landingpad { i8*, i32 }
3331 // CHECK5-NEXT:    catch i8* null
3332 // CHECK5-NEXT:    [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
3333 // CHECK5-NEXT:    call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR9]]
3334 // CHECK5-NEXT:    unreachable
3335 //
3336 //
3337 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l40
3338 // CHECK5-SAME: () #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
3339 // CHECK5-NEXT:  entry:
3340 // CHECK5-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
3341 // CHECK5-NEXT:    [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8
3342 // CHECK5-NEXT:    [[EXN_SLOT:%.*]] = alloca i8*, align 8
3343 // CHECK5-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
3344 // CHECK5-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
3345 // CHECK5-NEXT:    invoke void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 23)
3346 // CHECK5-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
3347 // CHECK5:       invoke.cont:
3348 // CHECK5-NEXT:    [[CALL:%.*]] = call signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]])
3349 // CHECK5-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]]
3350 // CHECK5-NEXT:    store i8 [[CALL]], i8* [[DOTCAPTURE_EXPR_]], align 1
3351 // CHECK5-NEXT:    [[TMP0:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
3352 // CHECK5-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
3353 // CHECK5-NEXT:    store i8 [[TMP0]], i8* [[CONV]], align 1
3354 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
3355 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i64 [[TMP1]])
3356 // CHECK5-NEXT:    ret void
3357 // CHECK5:       lpad:
3358 // CHECK5-NEXT:    [[TMP2:%.*]] = landingpad { i8*, i32 }
3359 // CHECK5-NEXT:    catch i8* null
3360 // CHECK5-NEXT:    [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0
3361 // CHECK5-NEXT:    store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8
3362 // CHECK5-NEXT:    [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1
3363 // CHECK5-NEXT:    store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4
3364 // CHECK5-NEXT:    br label [[TERMINATE_HANDLER:%.*]]
3365 // CHECK5:       terminate.handler:
3366 // CHECK5-NEXT:    [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8
3367 // CHECK5-NEXT:    call void @__clang_call_terminate(i8* [[EXN]]) #[[ATTR9]]
3368 // CHECK5-NEXT:    unreachable
3369 //
3370 //
3371 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..10
3372 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
3373 // CHECK5-NEXT:  entry:
3374 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3375 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3376 // CHECK5-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
3377 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3378 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3379 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3380 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3381 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3382 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3383 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3384 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3385 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3386 // CHECK5-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
3387 // CHECK5-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
3388 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3389 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3390 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3391 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3392 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3393 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3394 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3395 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3396 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3397 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3398 // CHECK5:       cond.true:
3399 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3400 // CHECK5:       cond.false:
3401 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3402 // CHECK5-NEXT:    br label [[COND_END]]
3403 // CHECK5:       cond.end:
3404 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3405 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3406 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3407 // CHECK5-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3408 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3409 // CHECK5:       omp.inner.for.cond:
3410 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3411 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3412 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3413 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3414 // CHECK5:       omp.inner.for.body:
3415 // CHECK5-NEXT:    [[TMP7:%.*]] = load i8, i8* [[CONV]], align 1
3416 // CHECK5-NEXT:    [[TMP8:%.*]] = sext i8 [[TMP7]] to i32
3417 // CHECK5-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP8]])
3418 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3419 // CHECK5-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3420 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3421 // CHECK5-NEXT:    [[TMP12:%.*]] = zext i32 [[TMP11]] to i64
3422 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP10]], i64 [[TMP12]])
3423 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3424 // CHECK5:       omp.inner.for.inc:
3425 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3426 // CHECK5-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3427 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
3428 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3429 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
3430 // CHECK5:       omp.inner.for.end:
3431 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3432 // CHECK5:       omp.loop.exit:
3433 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3434 // CHECK5-NEXT:    ret void
3435 //
3436 //
3437 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..11
3438 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
3439 // CHECK5-NEXT:  entry:
3440 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3441 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3442 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3443 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3444 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3445 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3446 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3447 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3448 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3449 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3450 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3451 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3452 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3453 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3454 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3455 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3456 // CHECK5-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
3457 // CHECK5-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3458 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3459 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3460 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3461 // CHECK5-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3462 // CHECK5-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3463 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3464 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3465 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3466 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3467 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3468 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3469 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3470 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3471 // CHECK5:       cond.true:
3472 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3473 // CHECK5:       cond.false:
3474 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3475 // CHECK5-NEXT:    br label [[COND_END]]
3476 // CHECK5:       cond.end:
3477 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3478 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3479 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3480 // CHECK5-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3481 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3482 // CHECK5:       omp.inner.for.cond:
3483 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3484 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3485 // CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3486 // CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3487 // CHECK5:       omp.inner.for.body:
3488 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3489 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3490 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3491 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
3492 // CHECK5-NEXT:    invoke void @_Z3foov()
3493 // CHECK5-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
3494 // CHECK5:       invoke.cont:
3495 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3496 // CHECK5:       omp.body.continue:
3497 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3498 // CHECK5:       omp.inner.for.inc:
3499 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3500 // CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3501 // CHECK5-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
3502 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
3503 // CHECK5:       omp.inner.for.end:
3504 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3505 // CHECK5:       omp.loop.exit:
3506 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3507 // CHECK5-NEXT:    ret void
3508 // CHECK5:       terminate.lpad:
3509 // CHECK5-NEXT:    [[TMP11:%.*]] = landingpad { i8*, i32 }
3510 // CHECK5-NEXT:    catch i8* null
3511 // CHECK5-NEXT:    [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
3512 // CHECK5-NEXT:    call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR9]]
3513 // CHECK5-NEXT:    unreachable
3514 //
3515 //
3516 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SD2Ev
3517 // CHECK5-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] comdat align 2 {
3518 // CHECK5-NEXT:  entry:
3519 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3520 // CHECK5-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3521 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3522 // CHECK5-NEXT:    ret void
3523 //
3524 //
3525 // CHECK5-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3526 // CHECK5-SAME: () #[[ATTR8:[0-9]+]] section ".text.startup" {
3527 // CHECK5-NEXT:  entry:
3528 // CHECK5-NEXT:    call void @__tgt_register_requires(i64 1)
3529 // CHECK5-NEXT:    ret void
3530 //
3531 //
3532 // CHECK6-LABEL: define {{[^@]+}}@main
3533 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
3534 // CHECK6-NEXT:  entry:
3535 // CHECK6-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
3536 // CHECK6-NEXT:    [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
3537 // CHECK6-NEXT:    [[A:%.*]] = alloca i8, align 1
3538 // CHECK6-NEXT:    [[EXN_SLOT:%.*]] = alloca i8*, align 8
3539 // CHECK6-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
3540 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3541 // CHECK6-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
3542 // CHECK6-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
3543 // CHECK6-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
3544 // CHECK6-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
3545 // CHECK6-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
3546 // CHECK6-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
3547 // CHECK6-NEXT:    store i32 0, i32* [[RETVAL]], align 4
3548 // CHECK6-NEXT:    call void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[S]], i64 0)
3549 // CHECK6-NEXT:    [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[S]])
3550 // CHECK6-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
3551 // CHECK6:       invoke.cont:
3552 // CHECK6-NEXT:    store i8 [[CALL]], i8* [[A]], align 1
3553 // CHECK6-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100)
3554 // CHECK6-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l50.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 2)
3555 // CHECK6-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
3556 // CHECK6-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3557 // CHECK6:       omp_offload.failed:
3558 // CHECK6-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l50() #[[ATTR6:[0-9]+]]
3559 // CHECK6-NEXT:    br label [[OMP_OFFLOAD_CONT]]
3560 // CHECK6:       lpad:
3561 // CHECK6-NEXT:    [[TMP2:%.*]] = landingpad { i8*, i32 }
3562 // CHECK6-NEXT:    cleanup
3563 // CHECK6-NEXT:    [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0
3564 // CHECK6-NEXT:    store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8
3565 // CHECK6-NEXT:    [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1
3566 // CHECK6-NEXT:    store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4
3567 // CHECK6-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
3568 // CHECK6-NEXT:    br label [[EH_RESUME:%.*]]
3569 // CHECK6:       omp_offload.cont:
3570 // CHECK6-NEXT:    [[TMP5:%.*]] = load i8, i8* [[A]], align 1
3571 // CHECK6-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8*
3572 // CHECK6-NEXT:    store i8 [[TMP5]], i8* [[CONV]], align 1
3573 // CHECK6-NEXT:    [[TMP6:%.*]] = load i64, i64* [[A_CASTED]], align 8
3574 // CHECK6-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3575 // CHECK6-NEXT:    [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
3576 // CHECK6-NEXT:    store i64 [[TMP6]], i64* [[TMP8]], align 8
3577 // CHECK6-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3578 // CHECK6-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
3579 // CHECK6-NEXT:    store i64 [[TMP6]], i64* [[TMP10]], align 8
3580 // CHECK6-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
3581 // CHECK6-NEXT:    store i8* null, i8** [[TMP11]], align 8
3582 // CHECK6-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3583 // CHECK6-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3584 // CHECK6-NEXT:    [[TMP14:%.*]] = load i8, i8* [[A]], align 1
3585 // CHECK6-NEXT:    store i8 [[TMP14]], i8* [[DOTCAPTURE_EXPR_]], align 1
3586 // CHECK6-NEXT:    [[TMP15:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
3587 // CHECK6-NEXT:    [[TMP16:%.*]] = zext i8 [[TMP15]] to i32
3588 // CHECK6-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
3589 // CHECK6-NEXT:    [[TMP17:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l55.region_id, i32 1, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP16]])
3590 // CHECK6-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
3591 // CHECK6-NEXT:    br i1 [[TMP18]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
3592 // CHECK6:       omp_offload.failed2:
3593 // CHECK6-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l55(i64 [[TMP6]]) #[[ATTR6]]
3594 // CHECK6-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
3595 // CHECK6:       omp_offload.cont3:
3596 // CHECK6-NEXT:    [[TMP19:%.*]] = load i8, i8* [[A]], align 1
3597 // CHECK6-NEXT:    [[CONV4:%.*]] = sext i8 [[TMP19]] to i32
3598 // CHECK6-NEXT:    [[CALL6:%.*]] = invoke signext i32 @_Z5tmainIcLi5EEiv()
3599 // CHECK6-NEXT:    to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]]
3600 // CHECK6:       invoke.cont5:
3601 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[CONV4]], [[CALL6]]
3602 // CHECK6-NEXT:    [[CALL8:%.*]] = invoke signext i32 @_Z5tmainI1SLi1EEiv()
3603 // CHECK6-NEXT:    to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD]]
3604 // CHECK6:       invoke.cont7:
3605 // CHECK6-NEXT:    [[ADD9:%.*]] = add nsw i32 [[ADD]], [[CALL8]]
3606 // CHECK6-NEXT:    store i32 [[ADD9]], i32* [[RETVAL]], align 4
3607 // CHECK6-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
3608 // CHECK6-NEXT:    [[TMP20:%.*]] = load i32, i32* [[RETVAL]], align 4
3609 // CHECK6-NEXT:    ret i32 [[TMP20]]
3610 // CHECK6:       eh.resume:
3611 // CHECK6-NEXT:    [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8
3612 // CHECK6-NEXT:    [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
3613 // CHECK6-NEXT:    [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
3614 // CHECK6-NEXT:    [[LPAD_VAL10:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
3615 // CHECK6-NEXT:    resume { i8*, i32 } [[LPAD_VAL10]]
3616 //
3617 //
3618 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SC1El
3619 // CHECK6-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
3620 // CHECK6-NEXT:  entry:
3621 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3622 // CHECK6-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
3623 // CHECK6-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3624 // CHECK6-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
3625 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3626 // CHECK6-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
3627 // CHECK6-NEXT:    call void @_ZN1SC2El(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]], i64 [[TMP0]])
3628 // CHECK6-NEXT:    ret void
3629 //
3630 //
3631 // CHECK6-LABEL: define {{[^@]+}}@_ZN1ScvcEv
3632 // CHECK6-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 {
3633 // CHECK6-NEXT:  entry:
3634 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3635 // CHECK6-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3636 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3637 // CHECK6-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
3638 // CHECK6-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A]], align 8
3639 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i8
3640 // CHECK6-NEXT:    ret i8 [[CONV]]
3641 //
3642 //
3643 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l50
3644 // CHECK6-SAME: () #[[ATTR3:[0-9]+]] {
3645 // CHECK6-NEXT:  entry:
3646 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
3647 // CHECK6-NEXT:    ret void
3648 //
3649 //
3650 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined.
3651 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
3652 // CHECK6-NEXT:  entry:
3653 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3654 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3655 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3656 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3657 // CHECK6-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3658 // CHECK6-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3659 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3660 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3661 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
3662 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3663 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3664 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3665 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3666 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3667 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3668 // CHECK6-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3669 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3670 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3671 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3672 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3673 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3674 // CHECK6:       cond.true:
3675 // CHECK6-NEXT:    br label [[COND_END:%.*]]
3676 // CHECK6:       cond.false:
3677 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3678 // CHECK6-NEXT:    br label [[COND_END]]
3679 // CHECK6:       cond.end:
3680 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3681 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3682 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3683 // CHECK6-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3684 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3685 // CHECK6:       omp.inner.for.cond:
3686 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3687 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3688 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3689 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3690 // CHECK6:       omp.inner.for.body:
3691 // CHECK6-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2)
3692 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3693 // CHECK6-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3694 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3695 // CHECK6-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3696 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
3697 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3698 // CHECK6:       omp.inner.for.inc:
3699 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3700 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3701 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
3702 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3703 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
3704 // CHECK6:       omp.inner.for.end:
3705 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3706 // CHECK6:       omp.loop.exit:
3707 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3708 // CHECK6-NEXT:    ret void
3709 //
3710 //
3711 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..1
3712 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
3713 // CHECK6-NEXT:  entry:
3714 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3715 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3716 // CHECK6-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3717 // CHECK6-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3718 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3719 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3720 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3721 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3722 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3723 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3724 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
3725 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3726 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3727 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3728 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3729 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3730 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
3731 // CHECK6-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3732 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3733 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3734 // CHECK6-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3735 // CHECK6-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3736 // CHECK6-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3737 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3738 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3739 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3740 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3741 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3742 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3743 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3744 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3745 // CHECK6:       cond.true:
3746 // CHECK6-NEXT:    br label [[COND_END:%.*]]
3747 // CHECK6:       cond.false:
3748 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3749 // CHECK6-NEXT:    br label [[COND_END]]
3750 // CHECK6:       cond.end:
3751 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3752 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3753 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3754 // CHECK6-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3755 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3756 // CHECK6:       omp.inner.for.cond:
3757 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3758 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3759 // CHECK6-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3760 // CHECK6-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3761 // CHECK6:       omp.inner.for.body:
3762 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3763 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3764 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3765 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
3766 // CHECK6-NEXT:    invoke void @_Z3foov()
3767 // CHECK6-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
3768 // CHECK6:       invoke.cont:
3769 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3770 // CHECK6:       omp.body.continue:
3771 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3772 // CHECK6:       omp.inner.for.inc:
3773 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3774 // CHECK6-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3775 // CHECK6-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
3776 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
3777 // CHECK6:       omp.inner.for.end:
3778 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3779 // CHECK6:       omp.loop.exit:
3780 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3781 // CHECK6-NEXT:    ret void
3782 // CHECK6:       terminate.lpad:
3783 // CHECK6-NEXT:    [[TMP11:%.*]] = landingpad { i8*, i32 }
3784 // CHECK6-NEXT:    catch i8* null
3785 // CHECK6-NEXT:    [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
3786 // CHECK6-NEXT:    call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR9:[0-9]+]]
3787 // CHECK6-NEXT:    unreachable
3788 //
3789 //
3790 // CHECK6-LABEL: define {{[^@]+}}@__clang_call_terminate
3791 // CHECK6-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat {
3792 // CHECK6-NEXT:    [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]]
3793 // CHECK6-NEXT:    call void @_ZSt9terminatev() #[[ATTR9]]
3794 // CHECK6-NEXT:    unreachable
3795 //
3796 //
3797 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l55
3798 // CHECK6-SAME: (i64 [[A:%.*]]) #[[ATTR3]] {
3799 // CHECK6-NEXT:  entry:
3800 // CHECK6-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
3801 // CHECK6-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
3802 // CHECK6-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
3803 // CHECK6-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
3804 // CHECK6-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8*
3805 // CHECK6-NEXT:    [[TMP0:%.*]] = load i8, i8* [[CONV]], align 1
3806 // CHECK6-NEXT:    store i8 [[TMP0]], i8* [[DOTCAPTURE_EXPR_]], align 1
3807 // CHECK6-NEXT:    [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
3808 // CHECK6-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
3809 // CHECK6-NEXT:    store i8 [[TMP1]], i8* [[CONV1]], align 1
3810 // CHECK6-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
3811 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP2]])
3812 // CHECK6-NEXT:    ret void
3813 //
3814 //
3815 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..2
3816 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
3817 // CHECK6-NEXT:  entry:
3818 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3819 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3820 // CHECK6-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
3821 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3822 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3823 // CHECK6-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3824 // CHECK6-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3825 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3826 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3827 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
3828 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3829 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3830 // CHECK6-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
3831 // CHECK6-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
3832 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3833 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3834 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3835 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3836 // CHECK6-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3837 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3838 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3839 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3840 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3841 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3842 // CHECK6:       cond.true:
3843 // CHECK6-NEXT:    br label [[COND_END:%.*]]
3844 // CHECK6:       cond.false:
3845 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3846 // CHECK6-NEXT:    br label [[COND_END]]
3847 // CHECK6:       cond.end:
3848 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3849 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3850 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3851 // CHECK6-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3852 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3853 // CHECK6:       omp.inner.for.cond:
3854 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3855 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3856 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3857 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3858 // CHECK6:       omp.inner.for.body:
3859 // CHECK6-NEXT:    [[TMP7:%.*]] = load i8, i8* [[CONV]], align 1
3860 // CHECK6-NEXT:    [[TMP8:%.*]] = sext i8 [[TMP7]] to i32
3861 // CHECK6-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP8]])
3862 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3863 // CHECK6-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3864 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3865 // CHECK6-NEXT:    [[TMP12:%.*]] = zext i32 [[TMP11]] to i64
3866 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP10]], i64 [[TMP12]])
3867 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3868 // CHECK6:       omp.inner.for.inc:
3869 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3870 // CHECK6-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3871 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
3872 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3873 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
3874 // CHECK6:       omp.inner.for.end:
3875 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3876 // CHECK6:       omp.loop.exit:
3877 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3878 // CHECK6-NEXT:    ret void
3879 //
3880 //
3881 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..3
3882 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
3883 // CHECK6-NEXT:  entry:
3884 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3885 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3886 // CHECK6-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3887 // CHECK6-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3888 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3889 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3890 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3891 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3892 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3893 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3894 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
3895 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3896 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3897 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3898 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3899 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3900 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
3901 // CHECK6-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3902 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3903 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3904 // CHECK6-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3905 // CHECK6-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3906 // CHECK6-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3907 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3908 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3909 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3910 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3911 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3912 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3913 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3914 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3915 // CHECK6:       cond.true:
3916 // CHECK6-NEXT:    br label [[COND_END:%.*]]
3917 // CHECK6:       cond.false:
3918 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3919 // CHECK6-NEXT:    br label [[COND_END]]
3920 // CHECK6:       cond.end:
3921 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3922 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3923 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3924 // CHECK6-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3925 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3926 // CHECK6:       omp.inner.for.cond:
3927 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3928 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3929 // CHECK6-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3930 // CHECK6-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3931 // CHECK6:       omp.inner.for.body:
3932 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3933 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3934 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3935 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
3936 // CHECK6-NEXT:    invoke void @_Z3foov()
3937 // CHECK6-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
3938 // CHECK6:       invoke.cont:
3939 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3940 // CHECK6:       omp.body.continue:
3941 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3942 // CHECK6:       omp.inner.for.inc:
3943 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3944 // CHECK6-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3945 // CHECK6-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
3946 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
3947 // CHECK6:       omp.inner.for.end:
3948 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3949 // CHECK6:       omp.loop.exit:
3950 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3951 // CHECK6-NEXT:    ret void
3952 // CHECK6:       terminate.lpad:
3953 // CHECK6-NEXT:    [[TMP11:%.*]] = landingpad { i8*, i32 }
3954 // CHECK6-NEXT:    catch i8* null
3955 // CHECK6-NEXT:    [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
3956 // CHECK6-NEXT:    call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR9]]
3957 // CHECK6-NEXT:    unreachable
3958 //
3959 //
3960 // CHECK6-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv
3961 // CHECK6-SAME: () #[[ATTR2]] comdat {
3962 // CHECK6-NEXT:  entry:
3963 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3964 // CHECK6-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
3965 // CHECK6-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
3966 // CHECK6-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l36.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 5)
3967 // CHECK6-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
3968 // CHECK6-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3969 // CHECK6:       omp_offload.failed:
3970 // CHECK6-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l36() #[[ATTR6]]
3971 // CHECK6-NEXT:    br label [[OMP_OFFLOAD_CONT]]
3972 // CHECK6:       omp_offload.cont:
3973 // CHECK6-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
3974 // CHECK6-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l40.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 23)
3975 // CHECK6-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
3976 // CHECK6-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
3977 // CHECK6:       omp_offload.failed2:
3978 // CHECK6-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l40() #[[ATTR6]]
3979 // CHECK6-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
3980 // CHECK6:       omp_offload.cont3:
3981 // CHECK6-NEXT:    ret i32 0
3982 //
3983 //
3984 // CHECK6-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv
3985 // CHECK6-SAME: () #[[ATTR2]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
3986 // CHECK6-NEXT:  entry:
3987 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3988 // CHECK6-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
3989 // CHECK6-NEXT:    [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8
3990 // CHECK6-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
3991 // CHECK6-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
3992 // CHECK6-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l36.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
3993 // CHECK6-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
3994 // CHECK6-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3995 // CHECK6:       omp_offload.failed:
3996 // CHECK6-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l36() #[[ATTR6]]
3997 // CHECK6-NEXT:    br label [[OMP_OFFLOAD_CONT]]
3998 // CHECK6:       omp_offload.cont:
3999 // CHECK6-NEXT:    invoke void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 23)
4000 // CHECK6-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
4001 // CHECK6:       invoke.cont:
4002 // CHECK6-NEXT:    [[CALL:%.*]] = call signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]])
4003 // CHECK6-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]]
4004 // CHECK6-NEXT:    store i8 [[CALL]], i8* [[DOTCAPTURE_EXPR_]], align 1
4005 // CHECK6-NEXT:    [[TMP2:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
4006 // CHECK6-NEXT:    [[TMP3:%.*]] = zext i8 [[TMP2]] to i32
4007 // CHECK6-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
4008 // CHECK6-NEXT:    [[TMP4:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l40.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 [[TMP3]])
4009 // CHECK6-NEXT:    [[TMP5:%.*]] = icmp ne i32 [[TMP4]], 0
4010 // CHECK6-NEXT:    br i1 [[TMP5]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
4011 // CHECK6:       omp_offload.failed2:
4012 // CHECK6-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l40() #[[ATTR6]]
4013 // CHECK6-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
4014 // CHECK6:       omp_offload.cont3:
4015 // CHECK6-NEXT:    ret i32 0
4016 // CHECK6:       terminate.lpad:
4017 // CHECK6-NEXT:    [[TMP6:%.*]] = landingpad { i8*, i32 }
4018 // CHECK6-NEXT:    catch i8* null
4019 // CHECK6-NEXT:    [[TMP7:%.*]] = extractvalue { i8*, i32 } [[TMP6]], 0
4020 // CHECK6-NEXT:    call void @__clang_call_terminate(i8* [[TMP7]]) #[[ATTR9]]
4021 // CHECK6-NEXT:    unreachable
4022 //
4023 //
4024 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SD1Ev
4025 // CHECK6-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR7:[0-9]+]] comdat align 2 {
4026 // CHECK6-NEXT:  entry:
4027 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4028 // CHECK6-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4029 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4030 // CHECK6-NEXT:    call void @_ZN1SD2Ev(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR6]]
4031 // CHECK6-NEXT:    ret void
4032 //
4033 //
4034 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SC2El
4035 // CHECK6-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR7]] comdat align 2 {
4036 // CHECK6-NEXT:  entry:
4037 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4038 // CHECK6-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
4039 // CHECK6-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4040 // CHECK6-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
4041 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4042 // CHECK6-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
4043 // CHECK6-NEXT:    [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
4044 // CHECK6-NEXT:    store i64 [[TMP0]], i64* [[A2]], align 8
4045 // CHECK6-NEXT:    ret void
4046 //
4047 //
4048 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l36
4049 // CHECK6-SAME: () #[[ATTR3]] {
4050 // CHECK6-NEXT:  entry:
4051 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
4052 // CHECK6-NEXT:    ret void
4053 //
4054 //
4055 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..4
4056 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
4057 // CHECK6-NEXT:  entry:
4058 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4059 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4060 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4061 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4062 // CHECK6-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4063 // CHECK6-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4064 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4065 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4066 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
4067 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4068 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4069 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4070 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4071 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4072 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4073 // CHECK6-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4074 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4075 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4076 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4077 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4078 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4079 // CHECK6:       cond.true:
4080 // CHECK6-NEXT:    br label [[COND_END:%.*]]
4081 // CHECK6:       cond.false:
4082 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4083 // CHECK6-NEXT:    br label [[COND_END]]
4084 // CHECK6:       cond.end:
4085 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4086 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4087 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4088 // CHECK6-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4089 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4090 // CHECK6:       omp.inner.for.cond:
4091 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4092 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4093 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4094 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4095 // CHECK6:       omp.inner.for.body:
4096 // CHECK6-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5)
4097 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4098 // CHECK6-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4099 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4100 // CHECK6-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4101 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
4102 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4103 // CHECK6:       omp.inner.for.inc:
4104 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4105 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4106 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
4107 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4108 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
4109 // CHECK6:       omp.inner.for.end:
4110 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4111 // CHECK6:       omp.loop.exit:
4112 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4113 // CHECK6-NEXT:    ret void
4114 //
4115 //
4116 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..5
4117 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
4118 // CHECK6-NEXT:  entry:
4119 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4120 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4121 // CHECK6-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4122 // CHECK6-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4123 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4124 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4125 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4126 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4127 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4128 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4129 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
4130 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4131 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4132 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4133 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4134 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4135 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
4136 // CHECK6-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4137 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4138 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4139 // CHECK6-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4140 // CHECK6-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4141 // CHECK6-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4142 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4143 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4144 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4145 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4146 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4147 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4148 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4149 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4150 // CHECK6:       cond.true:
4151 // CHECK6-NEXT:    br label [[COND_END:%.*]]
4152 // CHECK6:       cond.false:
4153 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4154 // CHECK6-NEXT:    br label [[COND_END]]
4155 // CHECK6:       cond.end:
4156 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4157 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4158 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4159 // CHECK6-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4160 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4161 // CHECK6:       omp.inner.for.cond:
4162 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4163 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4164 // CHECK6-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4165 // CHECK6-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4166 // CHECK6:       omp.inner.for.body:
4167 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4168 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4169 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4170 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
4171 // CHECK6-NEXT:    invoke void @_Z3foov()
4172 // CHECK6-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
4173 // CHECK6:       invoke.cont:
4174 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4175 // CHECK6:       omp.body.continue:
4176 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4177 // CHECK6:       omp.inner.for.inc:
4178 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4179 // CHECK6-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4180 // CHECK6-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
4181 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
4182 // CHECK6:       omp.inner.for.end:
4183 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4184 // CHECK6:       omp.loop.exit:
4185 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4186 // CHECK6-NEXT:    ret void
4187 // CHECK6:       terminate.lpad:
4188 // CHECK6-NEXT:    [[TMP11:%.*]] = landingpad { i8*, i32 }
4189 // CHECK6-NEXT:    catch i8* null
4190 // CHECK6-NEXT:    [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
4191 // CHECK6-NEXT:    call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR9]]
4192 // CHECK6-NEXT:    unreachable
4193 //
4194 //
4195 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l40
4196 // CHECK6-SAME: () #[[ATTR3]] {
4197 // CHECK6-NEXT:  entry:
4198 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
4199 // CHECK6-NEXT:    ret void
4200 //
4201 //
4202 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..6
4203 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
4204 // CHECK6-NEXT:  entry:
4205 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4206 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4207 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4208 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4209 // CHECK6-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4210 // CHECK6-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4211 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4212 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4213 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
4214 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4215 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4216 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4217 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4218 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4219 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4220 // CHECK6-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4221 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4222 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4223 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4224 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4225 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4226 // CHECK6:       cond.true:
4227 // CHECK6-NEXT:    br label [[COND_END:%.*]]
4228 // CHECK6:       cond.false:
4229 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4230 // CHECK6-NEXT:    br label [[COND_END]]
4231 // CHECK6:       cond.end:
4232 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4233 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4234 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4235 // CHECK6-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4236 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4237 // CHECK6:       omp.inner.for.cond:
4238 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4239 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4240 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4241 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4242 // CHECK6:       omp.inner.for.body:
4243 // CHECK6-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23)
4244 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4245 // CHECK6-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4246 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4247 // CHECK6-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4248 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
4249 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4250 // CHECK6:       omp.inner.for.inc:
4251 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4252 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4253 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
4254 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4255 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
4256 // CHECK6:       omp.inner.for.end:
4257 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4258 // CHECK6:       omp.loop.exit:
4259 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4260 // CHECK6-NEXT:    ret void
4261 //
4262 //
4263 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..7
4264 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
4265 // CHECK6-NEXT:  entry:
4266 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4267 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4268 // CHECK6-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4269 // CHECK6-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4270 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4271 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4272 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4273 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4274 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4275 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4276 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
4277 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4278 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4279 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4280 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4281 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4282 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
4283 // CHECK6-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4284 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4285 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4286 // CHECK6-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4287 // CHECK6-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4288 // CHECK6-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4289 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4290 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4291 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4292 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4293 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4294 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4295 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4296 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4297 // CHECK6:       cond.true:
4298 // CHECK6-NEXT:    br label [[COND_END:%.*]]
4299 // CHECK6:       cond.false:
4300 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4301 // CHECK6-NEXT:    br label [[COND_END]]
4302 // CHECK6:       cond.end:
4303 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4304 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4305 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4306 // CHECK6-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4307 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4308 // CHECK6:       omp.inner.for.cond:
4309 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4310 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4311 // CHECK6-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4312 // CHECK6-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4313 // CHECK6:       omp.inner.for.body:
4314 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4315 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4316 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4317 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
4318 // CHECK6-NEXT:    invoke void @_Z3foov()
4319 // CHECK6-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
4320 // CHECK6:       invoke.cont:
4321 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4322 // CHECK6:       omp.body.continue:
4323 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4324 // CHECK6:       omp.inner.for.inc:
4325 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4326 // CHECK6-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4327 // CHECK6-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
4328 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
4329 // CHECK6:       omp.inner.for.end:
4330 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4331 // CHECK6:       omp.loop.exit:
4332 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4333 // CHECK6-NEXT:    ret void
4334 // CHECK6:       terminate.lpad:
4335 // CHECK6-NEXT:    [[TMP11:%.*]] = landingpad { i8*, i32 }
4336 // CHECK6-NEXT:    catch i8* null
4337 // CHECK6-NEXT:    [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
4338 // CHECK6-NEXT:    call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR9]]
4339 // CHECK6-NEXT:    unreachable
4340 //
4341 //
4342 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l36
4343 // CHECK6-SAME: () #[[ATTR3]] {
4344 // CHECK6-NEXT:  entry:
4345 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*))
4346 // CHECK6-NEXT:    ret void
4347 //
4348 //
4349 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..8
4350 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
4351 // CHECK6-NEXT:  entry:
4352 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4353 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4354 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4355 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4356 // CHECK6-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4357 // CHECK6-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4358 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4359 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4360 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
4361 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4362 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4363 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4364 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4365 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4366 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4367 // CHECK6-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4368 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4369 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4370 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4371 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4372 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4373 // CHECK6:       cond.true:
4374 // CHECK6-NEXT:    br label [[COND_END:%.*]]
4375 // CHECK6:       cond.false:
4376 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4377 // CHECK6-NEXT:    br label [[COND_END]]
4378 // CHECK6:       cond.end:
4379 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4380 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4381 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4382 // CHECK6-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4383 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4384 // CHECK6:       omp.inner.for.cond:
4385 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4386 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4387 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4388 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4389 // CHECK6:       omp.inner.for.body:
4390 // CHECK6-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1)
4391 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4392 // CHECK6-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4393 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4394 // CHECK6-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4395 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
4396 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4397 // CHECK6:       omp.inner.for.inc:
4398 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4399 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4400 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
4401 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4402 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
4403 // CHECK6:       omp.inner.for.end:
4404 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4405 // CHECK6:       omp.loop.exit:
4406 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4407 // CHECK6-NEXT:    ret void
4408 //
4409 //
4410 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..9
4411 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
4412 // CHECK6-NEXT:  entry:
4413 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4414 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4415 // CHECK6-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4416 // CHECK6-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4417 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4418 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4419 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4420 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4421 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4422 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4423 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
4424 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4425 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4426 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4427 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4428 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4429 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
4430 // CHECK6-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4431 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4432 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4433 // CHECK6-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4434 // CHECK6-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4435 // CHECK6-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4436 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4437 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4438 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4439 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4440 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4441 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4442 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4443 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4444 // CHECK6:       cond.true:
4445 // CHECK6-NEXT:    br label [[COND_END:%.*]]
4446 // CHECK6:       cond.false:
4447 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4448 // CHECK6-NEXT:    br label [[COND_END]]
4449 // CHECK6:       cond.end:
4450 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4451 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4452 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4453 // CHECK6-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4454 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4455 // CHECK6:       omp.inner.for.cond:
4456 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4457 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4458 // CHECK6-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4459 // CHECK6-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4460 // CHECK6:       omp.inner.for.body:
4461 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4462 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4463 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4464 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
4465 // CHECK6-NEXT:    invoke void @_Z3foov()
4466 // CHECK6-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
4467 // CHECK6:       invoke.cont:
4468 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4469 // CHECK6:       omp.body.continue:
4470 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4471 // CHECK6:       omp.inner.for.inc:
4472 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4473 // CHECK6-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4474 // CHECK6-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
4475 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
4476 // CHECK6:       omp.inner.for.end:
4477 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4478 // CHECK6:       omp.loop.exit:
4479 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4480 // CHECK6-NEXT:    ret void
4481 // CHECK6:       terminate.lpad:
4482 // CHECK6-NEXT:    [[TMP11:%.*]] = landingpad { i8*, i32 }
4483 // CHECK6-NEXT:    catch i8* null
4484 // CHECK6-NEXT:    [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
4485 // CHECK6-NEXT:    call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR9]]
4486 // CHECK6-NEXT:    unreachable
4487 //
4488 //
4489 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l40
4490 // CHECK6-SAME: () #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
4491 // CHECK6-NEXT:  entry:
4492 // CHECK6-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
4493 // CHECK6-NEXT:    [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8
4494 // CHECK6-NEXT:    [[EXN_SLOT:%.*]] = alloca i8*, align 8
4495 // CHECK6-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
4496 // CHECK6-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
4497 // CHECK6-NEXT:    invoke void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 23)
4498 // CHECK6-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
4499 // CHECK6:       invoke.cont:
4500 // CHECK6-NEXT:    [[CALL:%.*]] = call signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]])
4501 // CHECK6-NEXT:    call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]]
4502 // CHECK6-NEXT:    store i8 [[CALL]], i8* [[DOTCAPTURE_EXPR_]], align 1
4503 // CHECK6-NEXT:    [[TMP0:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
4504 // CHECK6-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
4505 // CHECK6-NEXT:    store i8 [[TMP0]], i8* [[CONV]], align 1
4506 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
4507 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i64 [[TMP1]])
4508 // CHECK6-NEXT:    ret void
4509 // CHECK6:       lpad:
4510 // CHECK6-NEXT:    [[TMP2:%.*]] = landingpad { i8*, i32 }
4511 // CHECK6-NEXT:    catch i8* null
4512 // CHECK6-NEXT:    [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0
4513 // CHECK6-NEXT:    store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8
4514 // CHECK6-NEXT:    [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1
4515 // CHECK6-NEXT:    store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4
4516 // CHECK6-NEXT:    br label [[TERMINATE_HANDLER:%.*]]
4517 // CHECK6:       terminate.handler:
4518 // CHECK6-NEXT:    [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8
4519 // CHECK6-NEXT:    call void @__clang_call_terminate(i8* [[EXN]]) #[[ATTR9]]
4520 // CHECK6-NEXT:    unreachable
4521 //
4522 //
4523 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..10
4524 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
4525 // CHECK6-NEXT:  entry:
4526 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4527 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4528 // CHECK6-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
4529 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4530 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4531 // CHECK6-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4532 // CHECK6-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4533 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4534 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4535 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
4536 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4537 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4538 // CHECK6-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
4539 // CHECK6-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
4540 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4541 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4542 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4543 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4544 // CHECK6-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4545 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4546 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4547 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4548 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4549 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4550 // CHECK6:       cond.true:
4551 // CHECK6-NEXT:    br label [[COND_END:%.*]]
4552 // CHECK6:       cond.false:
4553 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4554 // CHECK6-NEXT:    br label [[COND_END]]
4555 // CHECK6:       cond.end:
4556 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4557 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4558 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4559 // CHECK6-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4560 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4561 // CHECK6:       omp.inner.for.cond:
4562 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4563 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4564 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4565 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4566 // CHECK6:       omp.inner.for.body:
4567 // CHECK6-NEXT:    [[TMP7:%.*]] = load i8, i8* [[CONV]], align 1
4568 // CHECK6-NEXT:    [[TMP8:%.*]] = sext i8 [[TMP7]] to i32
4569 // CHECK6-NEXT:    call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP8]])
4570 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4571 // CHECK6-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4572 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4573 // CHECK6-NEXT:    [[TMP12:%.*]] = zext i32 [[TMP11]] to i64
4574 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP10]], i64 [[TMP12]])
4575 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4576 // CHECK6:       omp.inner.for.inc:
4577 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4578 // CHECK6-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4579 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
4580 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4581 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
4582 // CHECK6:       omp.inner.for.end:
4583 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4584 // CHECK6:       omp.loop.exit:
4585 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4586 // CHECK6-NEXT:    ret void
4587 //
4588 //
4589 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..11
4590 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
4591 // CHECK6-NEXT:  entry:
4592 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4593 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4594 // CHECK6-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4595 // CHECK6-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4596 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4597 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4598 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4599 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4600 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4601 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4602 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
4603 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4604 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4605 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4606 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4607 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4608 // CHECK6-NEXT:    store i32 99, i32* [[DOTOMP_UB]], align 4
4609 // CHECK6-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4610 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4611 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4612 // CHECK6-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4613 // CHECK6-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4614 // CHECK6-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4615 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4616 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4617 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4618 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4619 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4620 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4621 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4622 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4623 // CHECK6:       cond.true:
4624 // CHECK6-NEXT:    br label [[COND_END:%.*]]
4625 // CHECK6:       cond.false:
4626 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4627 // CHECK6-NEXT:    br label [[COND_END]]
4628 // CHECK6:       cond.end:
4629 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4630 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4631 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4632 // CHECK6-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4633 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4634 // CHECK6:       omp.inner.for.cond:
4635 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4636 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4637 // CHECK6-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4638 // CHECK6-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4639 // CHECK6:       omp.inner.for.body:
4640 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4641 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4642 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4643 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
4644 // CHECK6-NEXT:    invoke void @_Z3foov()
4645 // CHECK6-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
4646 // CHECK6:       invoke.cont:
4647 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4648 // CHECK6:       omp.body.continue:
4649 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4650 // CHECK6:       omp.inner.for.inc:
4651 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4652 // CHECK6-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4653 // CHECK6-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
4654 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
4655 // CHECK6:       omp.inner.for.end:
4656 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4657 // CHECK6:       omp.loop.exit:
4658 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4659 // CHECK6-NEXT:    ret void
4660 // CHECK6:       terminate.lpad:
4661 // CHECK6-NEXT:    [[TMP11:%.*]] = landingpad { i8*, i32 }
4662 // CHECK6-NEXT:    catch i8* null
4663 // CHECK6-NEXT:    [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
4664 // CHECK6-NEXT:    call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR9]]
4665 // CHECK6-NEXT:    unreachable
4666 //
4667 //
4668 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SD2Ev
4669 // CHECK6-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] comdat align 2 {
4670 // CHECK6-NEXT:  entry:
4671 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4672 // CHECK6-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4673 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4674 // CHECK6-NEXT:    ret void
4675 //
4676 //
4677 // CHECK6-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
4678 // CHECK6-SAME: () #[[ATTR8:[0-9]+]] section ".text.startup" {
4679 // CHECK6-NEXT:  entry:
4680 // CHECK6-NEXT:    call void @__tgt_register_requires(i64 1)
4681 // CHECK6-NEXT:    ret void
4682 //