1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=avr -mcpu=atmega328p | FileCheck %s
4 define signext i32 @testmsws(float %x) {
5 ; CHECK-LABEL: testmsws:
6 ; CHECK: ; %bb.0: ; %entry
7 ; CHECK-NEXT: call llroundf
8 ; CHECK-NEXT: movw r22, r18
9 ; CHECK-NEXT: movw r24, r20
12 %0 = tail call i64 @llvm.llround.i64.f32(float %x)
13 %conv = trunc i64 %0 to i32
17 define i64 @testmsxs(float %x) {
18 ; CHECK-LABEL: testmsxs:
19 ; CHECK: ; %bb.0: ; %entry
20 ; CHECK-NEXT: call llroundf
23 %0 = tail call i64 @llvm.llround.i64.f32(float %x)
27 define signext i32 @testmswd(double %x) {
28 ; CHECK-LABEL: testmswd:
29 ; CHECK: ; %bb.0: ; %entry
30 ; CHECK-NEXT: call llround
31 ; CHECK-NEXT: movw r22, r18
32 ; CHECK-NEXT: movw r24, r20
35 %0 = tail call i64 @llvm.llround.i64.f64(double %x)
36 %conv = trunc i64 %0 to i32
40 define i64 @testmsxd(double %x) {
41 ; CHECK-LABEL: testmsxd:
42 ; CHECK: ; %bb.0: ; %entry
43 ; CHECK-NEXT: call llround
46 %0 = tail call i64 @llvm.llround.i64.f64(double %x)
50 declare i64 @llvm.llround.i64.f32(float) nounwind readnone
51 declare i64 @llvm.llround.i64.f64(double) nounwind readnone