1 ; RUN: llc -march=avr -print-after=finalize-isel -cgp-freq-ratio-to-skip-merge=10 < %s 2>&1 | FileCheck %s
3 ; Because `switch` seems to trigger Machine Basic Blocks to be ordered
4 ; in a different order than they were constructed, this exposes an
5 ; error in the `expand-isel-pseudos` pass. Specifically, it thought we
6 ; could always fallthrough to a newly-constructed MBB. However,
7 ; there's no guarantee that either of the constructed MBBs need to
8 ; occur immediately after the currently-focused one!
10 ; This issue manifests in a CFG that looks something like this:
13 ; successors: %bb.5(?%) %bb.6(?%)
14 ; Predecessors according to CFG: %bb.0 %bb.1
15 ; %0 = PHI %3, <%bb.0>, %5, <%bb.1>
18 ; CPRdRr %2, %0, implicit-def %SREG
19 ; BREQk <%bb.6>, implicit %SREG
21 ; The code assumes it the fallthrough block after this is %bb.5, but
22 ; it's actually %bb.3! To be proper, there should be an unconditional
23 ; jump tying this block to %bb.5.
25 define i8 @select_must_add_unconditional_jump(i8 %arg0, i8 %arg1) unnamed_addr {
27 switch i8 %arg0, label %dead [
39 %predicate = phi i8 [ 50, %zero ], [ 100, %one ]
40 %is_eq = icmp eq i8 %arg1, %predicate
41 %result = select i1 %is_eq, i8 1, i8 2
48 ; This check may be a bit brittle, but the important thing is that the
49 ; basic block containing `select` needs to contain explicit jumps to
54 ; CHECK: BREQk [[BRANCHED:%bb.[0-9]+]]
55 ; CHECK: RJMPk [[DIRECT:%bb.[0-9]+]]
56 ; CHECK-SAME-DAG: {{.*}}[[BRANCHED]]
57 ; CHECK-SAME-DAG: {{.*}}[[DIRECT]]