1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -mtriple=riscv64 -mattr=+m -run-pass=regbankselect \
3 # RUN: -disable-gisel-legality-check -simplify-mir -verify-machineinstrs %s \
4 # RUN: -o - | FileCheck -check-prefix=RV64I %s
9 tracksRegLiveness: true
14 ; RV64I-LABEL: name: add_i64
15 ; RV64I: liveins: $x10, $x11
17 ; RV64I-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
18 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:gprb(s64) = COPY $x11
19 ; RV64I-NEXT: [[ADD:%[0-9]+]]:gprb(s64) = G_ADD [[COPY]], [[COPY1]]
20 ; RV64I-NEXT: $x10 = COPY [[ADD]](s64)
21 ; RV64I-NEXT: PseudoRET implicit $x10
24 %2:_(s64) = G_ADD %0, %1
26 PseudoRET implicit $x10
32 tracksRegLiveness: true
37 ; RV64I-LABEL: name: sub_i64
38 ; RV64I: liveins: $x10, $x11
40 ; RV64I-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
41 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:gprb(s64) = COPY $x11
42 ; RV64I-NEXT: [[SUB:%[0-9]+]]:gprb(s64) = G_SUB [[COPY]], [[COPY1]]
43 ; RV64I-NEXT: $x10 = COPY [[SUB]](s64)
44 ; RV64I-NEXT: PseudoRET implicit $x10
47 %2:_(s64) = G_SUB %0, %1
49 PseudoRET implicit $x10
55 tracksRegLiveness: true
60 ; RV64I-LABEL: name: shl_i64
61 ; RV64I: liveins: $x10, $x11
63 ; RV64I-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
64 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:gprb(s64) = COPY $x11
65 ; RV64I-NEXT: [[SHL:%[0-9]+]]:gprb(s64) = G_SHL [[COPY]], [[COPY1]](s64)
66 ; RV64I-NEXT: $x10 = COPY [[SHL]](s64)
67 ; RV64I-NEXT: PseudoRET implicit $x10
70 %2:_(s64) = G_SHL %0, %1
72 PseudoRET implicit $x10
78 tracksRegLiveness: true
83 ; RV64I-LABEL: name: ashr_i64
84 ; RV64I: liveins: $x10, $x11
86 ; RV64I-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
87 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:gprb(s64) = COPY $x11
88 ; RV64I-NEXT: [[ASHR:%[0-9]+]]:gprb(s64) = G_ASHR [[COPY]], [[COPY1]](s64)
89 ; RV64I-NEXT: $x10 = COPY [[ASHR]](s64)
90 ; RV64I-NEXT: PseudoRET implicit $x10
93 %2:_(s64) = G_ASHR %0, %1
95 PseudoRET implicit $x10
101 tracksRegLiveness: true
106 ; RV64I-LABEL: name: lshr_i64
107 ; RV64I: liveins: $x10, $x11
109 ; RV64I-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
110 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:gprb(s64) = COPY $x11
111 ; RV64I-NEXT: [[LSHR:%[0-9]+]]:gprb(s64) = G_LSHR [[COPY]], [[COPY1]](s64)
112 ; RV64I-NEXT: $x10 = COPY [[LSHR]](s64)
113 ; RV64I-NEXT: PseudoRET implicit $x10
114 %0:_(s64) = COPY $x10
115 %1:_(s64) = COPY $x11
116 %2:_(s64) = G_LSHR %0, %1
118 PseudoRET implicit $x10
124 tracksRegLiveness: true
129 ; RV64I-LABEL: name: and_i64
130 ; RV64I: liveins: $x10, $x11
132 ; RV64I-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
133 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:gprb(s64) = COPY $x11
134 ; RV64I-NEXT: [[AND:%[0-9]+]]:gprb(s64) = G_AND [[COPY]], [[COPY1]]
135 ; RV64I-NEXT: $x10 = COPY [[AND]](s64)
136 ; RV64I-NEXT: PseudoRET implicit $x10
137 %0:_(s64) = COPY $x10
138 %1:_(s64) = COPY $x11
139 %2:_(s64) = G_AND %0, %1
141 PseudoRET implicit $x10
147 tracksRegLiveness: true
152 ; RV64I-LABEL: name: or_i64
153 ; RV64I: liveins: $x10, $x11
155 ; RV64I-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
156 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:gprb(s64) = COPY $x11
157 ; RV64I-NEXT: [[OR:%[0-9]+]]:gprb(s64) = G_OR [[COPY]], [[COPY1]]
158 ; RV64I-NEXT: $x10 = COPY [[OR]](s64)
159 ; RV64I-NEXT: PseudoRET implicit $x10
160 %0:_(s64) = COPY $x10
161 %1:_(s64) = COPY $x11
162 %2:_(s64) = G_OR %0, %1
164 PseudoRET implicit $x10
170 tracksRegLiveness: true
175 ; RV64I-LABEL: name: xor_i64
176 ; RV64I: liveins: $x10, $x11
178 ; RV64I-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
179 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:gprb(s64) = COPY $x11
180 ; RV64I-NEXT: [[XOR:%[0-9]+]]:gprb(s64) = G_XOR [[COPY]], [[COPY1]]
181 ; RV64I-NEXT: $x10 = COPY [[XOR]](s64)
182 ; RV64I-NEXT: PseudoRET implicit $x10
183 %0:_(s64) = COPY $x10
184 %1:_(s64) = COPY $x11
185 %2:_(s64) = G_XOR %0, %1
187 PseudoRET implicit $x10
193 tracksRegLiveness: true
198 ; RV64I-LABEL: name: mul_i64
199 ; RV64I: liveins: $x10, $x11
201 ; RV64I-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
202 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:gprb(s64) = COPY $x11
203 ; RV64I-NEXT: [[MUL:%[0-9]+]]:gprb(s64) = G_MUL [[COPY]], [[COPY1]]
204 ; RV64I-NEXT: $x10 = COPY [[MUL]](s64)
205 ; RV64I-NEXT: PseudoRET implicit $x10
206 %0:_(s64) = COPY $x10
207 %1:_(s64) = COPY $x11
208 %2:_(s64) = G_MUL %0, %1
210 PseudoRET implicit $x10
216 tracksRegLiveness: true
221 ; RV64I-LABEL: name: sdiv_i64
222 ; RV64I: liveins: $x10, $x11
224 ; RV64I-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
225 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:gprb(s64) = COPY $x11
226 ; RV64I-NEXT: [[SDIV:%[0-9]+]]:gprb(s64) = G_SDIV [[COPY]], [[COPY1]]
227 ; RV64I-NEXT: $x10 = COPY [[SDIV]](s64)
228 ; RV64I-NEXT: PseudoRET implicit $x10
229 %0:_(s64) = COPY $x10
230 %1:_(s64) = COPY $x11
231 %2:_(s64) = G_SDIV %0, %1
233 PseudoRET implicit $x10
239 tracksRegLiveness: true
244 ; RV64I-LABEL: name: srem_i64
245 ; RV64I: liveins: $x10, $x11
247 ; RV64I-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
248 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:gprb(s64) = COPY $x11
249 ; RV64I-NEXT: [[SREM:%[0-9]+]]:gprb(s64) = G_SREM [[COPY]], [[COPY1]]
250 ; RV64I-NEXT: $x10 = COPY [[SREM]](s64)
251 ; RV64I-NEXT: PseudoRET implicit $x10
252 %0:_(s64) = COPY $x10
253 %1:_(s64) = COPY $x11
254 %2:_(s64) = G_SREM %0, %1
256 PseudoRET implicit $x10
262 tracksRegLiveness: true
267 ; RV64I-LABEL: name: smulh_i64
268 ; RV64I: liveins: $x10, $x11
270 ; RV64I-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
271 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:gprb(s64) = COPY $x11
272 ; RV64I-NEXT: [[SMULH:%[0-9]+]]:gprb(s64) = G_SMULH [[COPY]], [[COPY1]]
273 ; RV64I-NEXT: $x10 = COPY [[SMULH]](s64)
274 ; RV64I-NEXT: PseudoRET implicit $x10
275 %0:_(s64) = COPY $x10
276 %1:_(s64) = COPY $x11
277 %2:_(s64) = G_SMULH %0, %1
279 PseudoRET implicit $x10
285 tracksRegLiveness: true
290 ; RV64I-LABEL: name: udiv_i64
291 ; RV64I: liveins: $x10, $x11
293 ; RV64I-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
294 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:gprb(s64) = COPY $x11
295 ; RV64I-NEXT: [[UDIV:%[0-9]+]]:gprb(s64) = G_UDIV [[COPY]], [[COPY1]]
296 ; RV64I-NEXT: $x10 = COPY [[UDIV]](s64)
297 ; RV64I-NEXT: PseudoRET implicit $x10
298 %0:_(s64) = COPY $x10
299 %1:_(s64) = COPY $x11
300 %2:_(s64) = G_UDIV %0, %1
302 PseudoRET implicit $x10
308 tracksRegLiveness: true
313 ; RV64I-LABEL: name: urem_i64
314 ; RV64I: liveins: $x10, $x11
316 ; RV64I-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
317 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:gprb(s64) = COPY $x11
318 ; RV64I-NEXT: [[UREM:%[0-9]+]]:gprb(s64) = G_UREM [[COPY]], [[COPY1]]
319 ; RV64I-NEXT: $x10 = COPY [[UREM]](s64)
320 ; RV64I-NEXT: PseudoRET implicit $x10
321 %0:_(s64) = COPY $x10
322 %1:_(s64) = COPY $x11
323 %2:_(s64) = G_UREM %0, %1
325 PseudoRET implicit $x10
331 tracksRegLiveness: true
336 ; RV64I-LABEL: name: umulh_i64
337 ; RV64I: liveins: $x10, $x11
339 ; RV64I-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
340 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:gprb(s64) = COPY $x11
341 ; RV64I-NEXT: [[UMULH:%[0-9]+]]:gprb(s64) = G_UMULH [[COPY]], [[COPY1]]
342 ; RV64I-NEXT: $x10 = COPY [[UMULH]](s64)
343 ; RV64I-NEXT: PseudoRET implicit $x10
344 %0:_(s64) = COPY $x10
345 %1:_(s64) = COPY $x11
346 %2:_(s64) = G_UMULH %0, %1
348 PseudoRET implicit $x10
354 tracksRegLiveness: true
359 ; RV64I-LABEL: name: icmp_i64
360 ; RV64I: liveins: $x10, $x11
362 ; RV64I-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
363 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:gprb(s64) = COPY $x11
364 ; RV64I-NEXT: [[ICMP:%[0-9]+]]:gprb(s64) = G_ICMP intpred(eq), [[COPY]](s64), [[COPY1]]
365 ; RV64I-NEXT: $x10 = COPY [[ICMP]](s64)
366 ; RV64I-NEXT: PseudoRET implicit $x10
367 %0:_(s64) = COPY $x10
368 %1:_(s64) = COPY $x11
369 %2:_(s64) = G_ICMP intpred(eq), %0(s64), %1
371 PseudoRET implicit $x10
377 tracksRegLiveness: true
382 ; RV64I-LABEL: name: icmp_ptr
383 ; RV64I: liveins: $x10, $x11
385 ; RV64I-NEXT: [[COPY:%[0-9]+]]:gprb(p0) = COPY $x10
386 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:gprb(p0) = COPY $x11
387 ; RV64I-NEXT: [[ICMP:%[0-9]+]]:gprb(s64) = G_ICMP intpred(eq), [[COPY]](p0), [[COPY1]]
388 ; RV64I-NEXT: $x10 = COPY [[ICMP]](s64)
389 ; RV64I-NEXT: PseudoRET implicit $x10
392 %2:_(s64) = G_ICMP intpred(eq), %0(p0), %1
394 PseudoRET implicit $x10
400 tracksRegLiveness: true
405 ; RV64I-LABEL: name: sext_inreg_i64
406 ; RV64I: liveins: $x10
408 ; RV64I-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
409 ; RV64I-NEXT: [[SEXT_INREG:%[0-9]+]]:gprb(s64) = G_SEXT_INREG [[COPY]], 32
410 ; RV64I-NEXT: $x10 = COPY [[SEXT_INREG]](s64)
411 ; RV64I-NEXT: PseudoRET implicit $x10
412 %0:_(s64) = COPY $x10
413 %1:_(s64) = G_SEXT_INREG %0, 32
415 PseudoRET implicit $x10
421 tracksRegLiveness: true
426 ; RV64I-LABEL: name: gep
427 ; RV64I: liveins: $x10, $x11
429 ; RV64I-NEXT: [[COPY:%[0-9]+]]:gprb(p0) = COPY $x10
430 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:gprb(s64) = COPY $x11
431 ; RV64I-NEXT: [[PTR_ADD:%[0-9]+]]:gprb(p0) = G_PTR_ADD [[COPY]], [[COPY1]](s64)
432 ; RV64I-NEXT: $x10 = COPY [[PTR_ADD]](p0)
433 ; RV64I-NEXT: PseudoRET implicit $x10
435 %1:_(s64) = COPY $x11
436 %2:_(p0) = G_PTR_ADD %0, %1(s64)
438 PseudoRET implicit $x10
444 tracksRegLiveness: true
449 ; RV64I-LABEL: name: ptrtoint
450 ; RV64I: liveins: $x10
452 ; RV64I-NEXT: [[COPY:%[0-9]+]]:gprb(p0) = COPY $x10
453 ; RV64I-NEXT: [[PTRTOINT:%[0-9]+]]:gprb(s64) = G_PTRTOINT [[COPY]](p0)
454 ; RV64I-NEXT: $x10 = COPY [[PTRTOINT]](s64)
455 ; RV64I-NEXT: PseudoRET implicit $x10
457 %1:_(s64) = G_PTRTOINT %0(p0)
459 PseudoRET implicit $x10
465 tracksRegLiveness: true
470 ; RV64I-LABEL: name: inttoprt
471 ; RV64I: liveins: $x10
473 ; RV64I-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
474 ; RV64I-NEXT: [[INTTOPTR:%[0-9]+]]:gprb(p0) = G_INTTOPTR [[COPY]](s64)
475 ; RV64I-NEXT: $x10 = COPY [[INTTOPTR]](p0)
476 ; RV64I-NEXT: PseudoRET implicit $x10
477 %0:_(s64) = COPY $x10
478 %1:_(p0) = G_INTTOPTR %0(s64)
480 PseudoRET implicit $x10