1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
3 ; RUN: | FileCheck %s -check-prefixes=RV32_NOZBB,RV32I
4 ; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
5 ; RUN: | FileCheck %s -check-prefixes=RV64NOZBB,RV64I
6 ; RUN: llc -mtriple=riscv32 -mattr=+m -verify-machineinstrs < %s \
7 ; RUN: | FileCheck %s -check-prefixes=RV32_NOZBB,RV32M
8 ; RUN: llc -mtriple=riscv64 -mattr=+m -verify-machineinstrs < %s \
9 ; RUN: | FileCheck %s -check-prefixes=RV64NOZBB,RV64M
10 ; RUN: llc -mtriple=riscv32 -mattr=+zbb -verify-machineinstrs < %s \
11 ; RUN: | FileCheck %s -check-prefix=RV32ZBB
12 ; RUN: llc -mtriple=riscv64 -mattr=+zbb -verify-machineinstrs < %s \
13 ; RUN: | FileCheck %s -check-prefix=RV64ZBB
14 ; RUN: llc -mtriple=riscv32 -mattr=+xtheadbb -verify-machineinstrs < %s \
15 ; RUN: | FileCheck %s -check-prefix=RV32XTHEADBB
16 ; RUN: llc -mtriple=riscv64 -mattr=+xtheadbb -verify-machineinstrs < %s \
17 ; RUN: | FileCheck %s -check-prefix=RV64XTHEADBB
19 declare i8 @llvm.cttz.i8(i8, i1)
20 declare i16 @llvm.cttz.i16(i16, i1)
21 declare i32 @llvm.cttz.i32(i32, i1)
22 declare i64 @llvm.cttz.i64(i64, i1)
23 declare i8 @llvm.ctlz.i8(i8, i1)
24 declare i16 @llvm.ctlz.i16(i16, i1)
25 declare i32 @llvm.ctlz.i32(i32, i1)
26 declare i64 @llvm.ctlz.i64(i64, i1)
27 declare i8 @llvm.ctpop.i8(i8)
28 declare i16 @llvm.ctpop.i16(i16)
29 declare i32 @llvm.ctpop.i32(i32)
30 declare i64 @llvm.ctpop.i64(i64)
32 define i8 @test_cttz_i8(i8 %a) nounwind {
33 ; RV32_NOZBB-LABEL: test_cttz_i8:
34 ; RV32_NOZBB: # %bb.0:
35 ; RV32_NOZBB-NEXT: andi a1, a0, 255
36 ; RV32_NOZBB-NEXT: beqz a1, .LBB0_2
37 ; RV32_NOZBB-NEXT: # %bb.1: # %cond.false
38 ; RV32_NOZBB-NEXT: addi a1, a0, -1
39 ; RV32_NOZBB-NEXT: not a0, a0
40 ; RV32_NOZBB-NEXT: and a0, a0, a1
41 ; RV32_NOZBB-NEXT: srli a1, a0, 1
42 ; RV32_NOZBB-NEXT: andi a1, a1, 85
43 ; RV32_NOZBB-NEXT: sub a0, a0, a1
44 ; RV32_NOZBB-NEXT: andi a1, a0, 51
45 ; RV32_NOZBB-NEXT: srli a0, a0, 2
46 ; RV32_NOZBB-NEXT: andi a0, a0, 51
47 ; RV32_NOZBB-NEXT: add a0, a1, a0
48 ; RV32_NOZBB-NEXT: srli a1, a0, 4
49 ; RV32_NOZBB-NEXT: add a0, a0, a1
50 ; RV32_NOZBB-NEXT: andi a0, a0, 15
51 ; RV32_NOZBB-NEXT: ret
52 ; RV32_NOZBB-NEXT: .LBB0_2:
53 ; RV32_NOZBB-NEXT: li a0, 8
54 ; RV32_NOZBB-NEXT: ret
56 ; RV64NOZBB-LABEL: test_cttz_i8:
58 ; RV64NOZBB-NEXT: andi a1, a0, 255
59 ; RV64NOZBB-NEXT: beqz a1, .LBB0_2
60 ; RV64NOZBB-NEXT: # %bb.1: # %cond.false
61 ; RV64NOZBB-NEXT: addi a1, a0, -1
62 ; RV64NOZBB-NEXT: not a0, a0
63 ; RV64NOZBB-NEXT: and a0, a0, a1
64 ; RV64NOZBB-NEXT: srli a1, a0, 1
65 ; RV64NOZBB-NEXT: andi a1, a1, 85
66 ; RV64NOZBB-NEXT: subw a0, a0, a1
67 ; RV64NOZBB-NEXT: andi a1, a0, 51
68 ; RV64NOZBB-NEXT: srli a0, a0, 2
69 ; RV64NOZBB-NEXT: andi a0, a0, 51
70 ; RV64NOZBB-NEXT: add a0, a1, a0
71 ; RV64NOZBB-NEXT: srli a1, a0, 4
72 ; RV64NOZBB-NEXT: add a0, a0, a1
73 ; RV64NOZBB-NEXT: andi a0, a0, 15
75 ; RV64NOZBB-NEXT: .LBB0_2:
76 ; RV64NOZBB-NEXT: li a0, 8
79 ; RV32ZBB-LABEL: test_cttz_i8:
81 ; RV32ZBB-NEXT: ori a0, a0, 256
82 ; RV32ZBB-NEXT: ctz a0, a0
85 ; RV64ZBB-LABEL: test_cttz_i8:
87 ; RV64ZBB-NEXT: ori a0, a0, 256
88 ; RV64ZBB-NEXT: ctz a0, a0
91 ; RV32XTHEADBB-LABEL: test_cttz_i8:
92 ; RV32XTHEADBB: # %bb.0:
93 ; RV32XTHEADBB-NEXT: andi a1, a0, 255
94 ; RV32XTHEADBB-NEXT: beqz a1, .LBB0_2
95 ; RV32XTHEADBB-NEXT: # %bb.1: # %cond.false
96 ; RV32XTHEADBB-NEXT: addi a1, a0, -1
97 ; RV32XTHEADBB-NEXT: not a0, a0
98 ; RV32XTHEADBB-NEXT: and a0, a0, a1
99 ; RV32XTHEADBB-NEXT: th.ff1 a0, a0
100 ; RV32XTHEADBB-NEXT: li a1, 32
101 ; RV32XTHEADBB-NEXT: sub a0, a1, a0
102 ; RV32XTHEADBB-NEXT: ret
103 ; RV32XTHEADBB-NEXT: .LBB0_2:
104 ; RV32XTHEADBB-NEXT: li a0, 8
105 ; RV32XTHEADBB-NEXT: ret
107 ; RV64XTHEADBB-LABEL: test_cttz_i8:
108 ; RV64XTHEADBB: # %bb.0:
109 ; RV64XTHEADBB-NEXT: andi a1, a0, 255
110 ; RV64XTHEADBB-NEXT: beqz a1, .LBB0_2
111 ; RV64XTHEADBB-NEXT: # %bb.1: # %cond.false
112 ; RV64XTHEADBB-NEXT: addi a1, a0, -1
113 ; RV64XTHEADBB-NEXT: not a0, a0
114 ; RV64XTHEADBB-NEXT: and a0, a0, a1
115 ; RV64XTHEADBB-NEXT: th.ff1 a0, a0
116 ; RV64XTHEADBB-NEXT: li a1, 64
117 ; RV64XTHEADBB-NEXT: sub a0, a1, a0
118 ; RV64XTHEADBB-NEXT: ret
119 ; RV64XTHEADBB-NEXT: .LBB0_2:
120 ; RV64XTHEADBB-NEXT: li a0, 8
121 ; RV64XTHEADBB-NEXT: ret
122 %tmp = call i8 @llvm.cttz.i8(i8 %a, i1 false)
126 define i16 @test_cttz_i16(i16 %a) nounwind {
127 ; RV32_NOZBB-LABEL: test_cttz_i16:
128 ; RV32_NOZBB: # %bb.0:
129 ; RV32_NOZBB-NEXT: slli a1, a0, 16
130 ; RV32_NOZBB-NEXT: beqz a1, .LBB1_2
131 ; RV32_NOZBB-NEXT: # %bb.1: # %cond.false
132 ; RV32_NOZBB-NEXT: addi a1, a0, -1
133 ; RV32_NOZBB-NEXT: not a0, a0
134 ; RV32_NOZBB-NEXT: and a0, a0, a1
135 ; RV32_NOZBB-NEXT: srli a1, a0, 1
136 ; RV32_NOZBB-NEXT: lui a2, 5
137 ; RV32_NOZBB-NEXT: addi a2, a2, 1365
138 ; RV32_NOZBB-NEXT: and a1, a1, a2
139 ; RV32_NOZBB-NEXT: sub a0, a0, a1
140 ; RV32_NOZBB-NEXT: lui a1, 3
141 ; RV32_NOZBB-NEXT: addi a1, a1, 819
142 ; RV32_NOZBB-NEXT: and a2, a0, a1
143 ; RV32_NOZBB-NEXT: srli a0, a0, 2
144 ; RV32_NOZBB-NEXT: and a0, a0, a1
145 ; RV32_NOZBB-NEXT: add a0, a2, a0
146 ; RV32_NOZBB-NEXT: srli a1, a0, 4
147 ; RV32_NOZBB-NEXT: add a0, a0, a1
148 ; RV32_NOZBB-NEXT: andi a1, a0, 15
149 ; RV32_NOZBB-NEXT: slli a0, a0, 20
150 ; RV32_NOZBB-NEXT: srli a0, a0, 28
151 ; RV32_NOZBB-NEXT: add a0, a1, a0
152 ; RV32_NOZBB-NEXT: ret
153 ; RV32_NOZBB-NEXT: .LBB1_2:
154 ; RV32_NOZBB-NEXT: li a0, 16
155 ; RV32_NOZBB-NEXT: ret
157 ; RV64NOZBB-LABEL: test_cttz_i16:
158 ; RV64NOZBB: # %bb.0:
159 ; RV64NOZBB-NEXT: slli a1, a0, 48
160 ; RV64NOZBB-NEXT: beqz a1, .LBB1_2
161 ; RV64NOZBB-NEXT: # %bb.1: # %cond.false
162 ; RV64NOZBB-NEXT: addi a1, a0, -1
163 ; RV64NOZBB-NEXT: not a0, a0
164 ; RV64NOZBB-NEXT: and a0, a0, a1
165 ; RV64NOZBB-NEXT: srli a1, a0, 1
166 ; RV64NOZBB-NEXT: lui a2, 5
167 ; RV64NOZBB-NEXT: addiw a2, a2, 1365
168 ; RV64NOZBB-NEXT: and a1, a1, a2
169 ; RV64NOZBB-NEXT: sub a0, a0, a1
170 ; RV64NOZBB-NEXT: lui a1, 3
171 ; RV64NOZBB-NEXT: addiw a1, a1, 819
172 ; RV64NOZBB-NEXT: and a2, a0, a1
173 ; RV64NOZBB-NEXT: srli a0, a0, 2
174 ; RV64NOZBB-NEXT: and a0, a0, a1
175 ; RV64NOZBB-NEXT: add a0, a2, a0
176 ; RV64NOZBB-NEXT: srli a1, a0, 4
177 ; RV64NOZBB-NEXT: add a0, a0, a1
178 ; RV64NOZBB-NEXT: andi a1, a0, 15
179 ; RV64NOZBB-NEXT: slli a0, a0, 52
180 ; RV64NOZBB-NEXT: srli a0, a0, 60
181 ; RV64NOZBB-NEXT: add a0, a1, a0
182 ; RV64NOZBB-NEXT: ret
183 ; RV64NOZBB-NEXT: .LBB1_2:
184 ; RV64NOZBB-NEXT: li a0, 16
185 ; RV64NOZBB-NEXT: ret
187 ; RV32ZBB-LABEL: test_cttz_i16:
189 ; RV32ZBB-NEXT: lui a1, 16
190 ; RV32ZBB-NEXT: or a0, a0, a1
191 ; RV32ZBB-NEXT: ctz a0, a0
194 ; RV64ZBB-LABEL: test_cttz_i16:
196 ; RV64ZBB-NEXT: lui a1, 16
197 ; RV64ZBB-NEXT: or a0, a0, a1
198 ; RV64ZBB-NEXT: ctz a0, a0
201 ; RV32XTHEADBB-LABEL: test_cttz_i16:
202 ; RV32XTHEADBB: # %bb.0:
203 ; RV32XTHEADBB-NEXT: slli a1, a0, 16
204 ; RV32XTHEADBB-NEXT: beqz a1, .LBB1_2
205 ; RV32XTHEADBB-NEXT: # %bb.1: # %cond.false
206 ; RV32XTHEADBB-NEXT: addi a1, a0, -1
207 ; RV32XTHEADBB-NEXT: not a0, a0
208 ; RV32XTHEADBB-NEXT: and a0, a0, a1
209 ; RV32XTHEADBB-NEXT: th.ff1 a0, a0
210 ; RV32XTHEADBB-NEXT: li a1, 32
211 ; RV32XTHEADBB-NEXT: sub a0, a1, a0
212 ; RV32XTHEADBB-NEXT: ret
213 ; RV32XTHEADBB-NEXT: .LBB1_2:
214 ; RV32XTHEADBB-NEXT: li a0, 16
215 ; RV32XTHEADBB-NEXT: ret
217 ; RV64XTHEADBB-LABEL: test_cttz_i16:
218 ; RV64XTHEADBB: # %bb.0:
219 ; RV64XTHEADBB-NEXT: slli a1, a0, 48
220 ; RV64XTHEADBB-NEXT: beqz a1, .LBB1_2
221 ; RV64XTHEADBB-NEXT: # %bb.1: # %cond.false
222 ; RV64XTHEADBB-NEXT: addi a1, a0, -1
223 ; RV64XTHEADBB-NEXT: not a0, a0
224 ; RV64XTHEADBB-NEXT: and a0, a0, a1
225 ; RV64XTHEADBB-NEXT: th.ff1 a0, a0
226 ; RV64XTHEADBB-NEXT: li a1, 64
227 ; RV64XTHEADBB-NEXT: sub a0, a1, a0
228 ; RV64XTHEADBB-NEXT: ret
229 ; RV64XTHEADBB-NEXT: .LBB1_2:
230 ; RV64XTHEADBB-NEXT: li a0, 16
231 ; RV64XTHEADBB-NEXT: ret
232 %tmp = call i16 @llvm.cttz.i16(i16 %a, i1 false)
236 define i32 @test_cttz_i32(i32 %a) nounwind {
237 ; RV32I-LABEL: test_cttz_i32:
239 ; RV32I-NEXT: beqz a0, .LBB2_2
240 ; RV32I-NEXT: # %bb.1: # %cond.false
241 ; RV32I-NEXT: addi sp, sp, -16
242 ; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
243 ; RV32I-NEXT: neg a1, a0
244 ; RV32I-NEXT: and a0, a0, a1
245 ; RV32I-NEXT: lui a1, 30667
246 ; RV32I-NEXT: addi a1, a1, 1329
247 ; RV32I-NEXT: call __mulsi3
248 ; RV32I-NEXT: srli a0, a0, 27
249 ; RV32I-NEXT: lui a1, %hi(.LCPI2_0)
250 ; RV32I-NEXT: addi a1, a1, %lo(.LCPI2_0)
251 ; RV32I-NEXT: add a0, a1, a0
252 ; RV32I-NEXT: lbu a0, 0(a0)
253 ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
254 ; RV32I-NEXT: addi sp, sp, 16
256 ; RV32I-NEXT: .LBB2_2:
257 ; RV32I-NEXT: li a0, 32
260 ; RV64I-LABEL: test_cttz_i32:
262 ; RV64I-NEXT: sext.w a1, a0
263 ; RV64I-NEXT: beqz a1, .LBB2_2
264 ; RV64I-NEXT: # %bb.1: # %cond.false
265 ; RV64I-NEXT: addi sp, sp, -16
266 ; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
267 ; RV64I-NEXT: neg a1, a0
268 ; RV64I-NEXT: and a0, a0, a1
269 ; RV64I-NEXT: lui a1, 30667
270 ; RV64I-NEXT: addiw a1, a1, 1329
271 ; RV64I-NEXT: call __muldi3
272 ; RV64I-NEXT: srliw a0, a0, 27
273 ; RV64I-NEXT: lui a1, %hi(.LCPI2_0)
274 ; RV64I-NEXT: addi a1, a1, %lo(.LCPI2_0)
275 ; RV64I-NEXT: add a0, a1, a0
276 ; RV64I-NEXT: lbu a0, 0(a0)
277 ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
278 ; RV64I-NEXT: addi sp, sp, 16
280 ; RV64I-NEXT: .LBB2_2:
281 ; RV64I-NEXT: li a0, 32
284 ; RV32M-LABEL: test_cttz_i32:
286 ; RV32M-NEXT: beqz a0, .LBB2_2
287 ; RV32M-NEXT: # %bb.1: # %cond.false
288 ; RV32M-NEXT: neg a1, a0
289 ; RV32M-NEXT: and a0, a0, a1
290 ; RV32M-NEXT: lui a1, 30667
291 ; RV32M-NEXT: addi a1, a1, 1329
292 ; RV32M-NEXT: mul a0, a0, a1
293 ; RV32M-NEXT: srli a0, a0, 27
294 ; RV32M-NEXT: lui a1, %hi(.LCPI2_0)
295 ; RV32M-NEXT: addi a1, a1, %lo(.LCPI2_0)
296 ; RV32M-NEXT: add a0, a1, a0
297 ; RV32M-NEXT: lbu a0, 0(a0)
299 ; RV32M-NEXT: .LBB2_2:
300 ; RV32M-NEXT: li a0, 32
303 ; RV64M-LABEL: test_cttz_i32:
305 ; RV64M-NEXT: sext.w a1, a0
306 ; RV64M-NEXT: beqz a1, .LBB2_2
307 ; RV64M-NEXT: # %bb.1: # %cond.false
308 ; RV64M-NEXT: negw a1, a0
309 ; RV64M-NEXT: and a0, a0, a1
310 ; RV64M-NEXT: lui a1, 30667
311 ; RV64M-NEXT: addi a1, a1, 1329
312 ; RV64M-NEXT: mul a0, a0, a1
313 ; RV64M-NEXT: srliw a0, a0, 27
314 ; RV64M-NEXT: lui a1, %hi(.LCPI2_0)
315 ; RV64M-NEXT: addi a1, a1, %lo(.LCPI2_0)
316 ; RV64M-NEXT: add a0, a1, a0
317 ; RV64M-NEXT: lbu a0, 0(a0)
319 ; RV64M-NEXT: .LBB2_2:
320 ; RV64M-NEXT: li a0, 32
323 ; RV32ZBB-LABEL: test_cttz_i32:
325 ; RV32ZBB-NEXT: ctz a0, a0
328 ; RV64ZBB-LABEL: test_cttz_i32:
330 ; RV64ZBB-NEXT: ctzw a0, a0
333 ; RV32XTHEADBB-LABEL: test_cttz_i32:
334 ; RV32XTHEADBB: # %bb.0:
335 ; RV32XTHEADBB-NEXT: beqz a0, .LBB2_2
336 ; RV32XTHEADBB-NEXT: # %bb.1: # %cond.false
337 ; RV32XTHEADBB-NEXT: addi a1, a0, -1
338 ; RV32XTHEADBB-NEXT: not a0, a0
339 ; RV32XTHEADBB-NEXT: and a0, a0, a1
340 ; RV32XTHEADBB-NEXT: th.ff1 a0, a0
341 ; RV32XTHEADBB-NEXT: li a1, 32
342 ; RV32XTHEADBB-NEXT: sub a0, a1, a0
343 ; RV32XTHEADBB-NEXT: ret
344 ; RV32XTHEADBB-NEXT: .LBB2_2:
345 ; RV32XTHEADBB-NEXT: li a0, 32
346 ; RV32XTHEADBB-NEXT: ret
348 ; RV64XTHEADBB-LABEL: test_cttz_i32:
349 ; RV64XTHEADBB: # %bb.0:
350 ; RV64XTHEADBB-NEXT: sext.w a1, a0
351 ; RV64XTHEADBB-NEXT: beqz a1, .LBB2_2
352 ; RV64XTHEADBB-NEXT: # %bb.1: # %cond.false
353 ; RV64XTHEADBB-NEXT: addi a1, a0, -1
354 ; RV64XTHEADBB-NEXT: not a0, a0
355 ; RV64XTHEADBB-NEXT: and a0, a0, a1
356 ; RV64XTHEADBB-NEXT: th.ff1 a0, a0
357 ; RV64XTHEADBB-NEXT: li a1, 64
358 ; RV64XTHEADBB-NEXT: sub a0, a1, a0
359 ; RV64XTHEADBB-NEXT: ret
360 ; RV64XTHEADBB-NEXT: .LBB2_2:
361 ; RV64XTHEADBB-NEXT: li a0, 32
362 ; RV64XTHEADBB-NEXT: ret
363 %tmp = call i32 @llvm.cttz.i32(i32 %a, i1 false)
367 define i64 @test_cttz_i64(i64 %a) nounwind {
368 ; RV32I-LABEL: test_cttz_i64:
370 ; RV32I-NEXT: addi sp, sp, -32
371 ; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
372 ; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
373 ; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
374 ; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
375 ; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
376 ; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill
377 ; RV32I-NEXT: mv s2, a1
378 ; RV32I-NEXT: mv s0, a0
379 ; RV32I-NEXT: neg a0, a0
380 ; RV32I-NEXT: and a0, s0, a0
381 ; RV32I-NEXT: lui a1, 30667
382 ; RV32I-NEXT: addi s3, a1, 1329
383 ; RV32I-NEXT: mv a1, s3
384 ; RV32I-NEXT: call __mulsi3
385 ; RV32I-NEXT: mv s1, a0
386 ; RV32I-NEXT: lui a0, %hi(.LCPI3_0)
387 ; RV32I-NEXT: addi s4, a0, %lo(.LCPI3_0)
388 ; RV32I-NEXT: neg a0, s2
389 ; RV32I-NEXT: and a0, s2, a0
390 ; RV32I-NEXT: mv a1, s3
391 ; RV32I-NEXT: call __mulsi3
392 ; RV32I-NEXT: bnez s2, .LBB3_3
393 ; RV32I-NEXT: # %bb.1:
394 ; RV32I-NEXT: li a0, 32
395 ; RV32I-NEXT: beqz s0, .LBB3_4
396 ; RV32I-NEXT: .LBB3_2:
397 ; RV32I-NEXT: srli s1, s1, 27
398 ; RV32I-NEXT: add s1, s4, s1
399 ; RV32I-NEXT: lbu a0, 0(s1)
400 ; RV32I-NEXT: j .LBB3_5
401 ; RV32I-NEXT: .LBB3_3:
402 ; RV32I-NEXT: srli a0, a0, 27
403 ; RV32I-NEXT: add a0, s4, a0
404 ; RV32I-NEXT: lbu a0, 0(a0)
405 ; RV32I-NEXT: bnez s0, .LBB3_2
406 ; RV32I-NEXT: .LBB3_4:
407 ; RV32I-NEXT: addi a0, a0, 32
408 ; RV32I-NEXT: .LBB3_5:
409 ; RV32I-NEXT: li a1, 0
410 ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
411 ; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
412 ; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
413 ; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
414 ; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
415 ; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
416 ; RV32I-NEXT: addi sp, sp, 32
419 ; RV64I-LABEL: test_cttz_i64:
421 ; RV64I-NEXT: beqz a0, .LBB3_2
422 ; RV64I-NEXT: # %bb.1: # %cond.false
423 ; RV64I-NEXT: addi sp, sp, -16
424 ; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
425 ; RV64I-NEXT: neg a1, a0
426 ; RV64I-NEXT: and a0, a0, a1
427 ; RV64I-NEXT: lui a1, %hi(.LCPI3_0)
428 ; RV64I-NEXT: ld a1, %lo(.LCPI3_0)(a1)
429 ; RV64I-NEXT: call __muldi3
430 ; RV64I-NEXT: srli a0, a0, 58
431 ; RV64I-NEXT: lui a1, %hi(.LCPI3_1)
432 ; RV64I-NEXT: addi a1, a1, %lo(.LCPI3_1)
433 ; RV64I-NEXT: add a0, a1, a0
434 ; RV64I-NEXT: lbu a0, 0(a0)
435 ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
436 ; RV64I-NEXT: addi sp, sp, 16
438 ; RV64I-NEXT: .LBB3_2:
439 ; RV64I-NEXT: li a0, 64
442 ; RV32M-LABEL: test_cttz_i64:
444 ; RV32M-NEXT: lui a2, 30667
445 ; RV32M-NEXT: addi a2, a2, 1329
446 ; RV32M-NEXT: lui a3, %hi(.LCPI3_0)
447 ; RV32M-NEXT: addi a3, a3, %lo(.LCPI3_0)
448 ; RV32M-NEXT: bnez a1, .LBB3_3
449 ; RV32M-NEXT: # %bb.1:
450 ; RV32M-NEXT: li a1, 32
451 ; RV32M-NEXT: beqz a0, .LBB3_4
452 ; RV32M-NEXT: .LBB3_2:
453 ; RV32M-NEXT: neg a1, a0
454 ; RV32M-NEXT: and a0, a0, a1
455 ; RV32M-NEXT: mul a0, a0, a2
456 ; RV32M-NEXT: srli a0, a0, 27
457 ; RV32M-NEXT: add a0, a3, a0
458 ; RV32M-NEXT: lbu a0, 0(a0)
459 ; RV32M-NEXT: li a1, 0
461 ; RV32M-NEXT: .LBB3_3:
462 ; RV32M-NEXT: neg a4, a1
463 ; RV32M-NEXT: and a1, a1, a4
464 ; RV32M-NEXT: mul a1, a1, a2
465 ; RV32M-NEXT: srli a1, a1, 27
466 ; RV32M-NEXT: add a1, a3, a1
467 ; RV32M-NEXT: lbu a1, 0(a1)
468 ; RV32M-NEXT: bnez a0, .LBB3_2
469 ; RV32M-NEXT: .LBB3_4:
470 ; RV32M-NEXT: addi a0, a1, 32
471 ; RV32M-NEXT: li a1, 0
474 ; RV64M-LABEL: test_cttz_i64:
476 ; RV64M-NEXT: beqz a0, .LBB3_2
477 ; RV64M-NEXT: # %bb.1: # %cond.false
478 ; RV64M-NEXT: lui a1, %hi(.LCPI3_0)
479 ; RV64M-NEXT: ld a1, %lo(.LCPI3_0)(a1)
480 ; RV64M-NEXT: neg a2, a0
481 ; RV64M-NEXT: and a0, a0, a2
482 ; RV64M-NEXT: mul a0, a0, a1
483 ; RV64M-NEXT: srli a0, a0, 58
484 ; RV64M-NEXT: lui a1, %hi(.LCPI3_1)
485 ; RV64M-NEXT: addi a1, a1, %lo(.LCPI3_1)
486 ; RV64M-NEXT: add a0, a1, a0
487 ; RV64M-NEXT: lbu a0, 0(a0)
489 ; RV64M-NEXT: .LBB3_2:
490 ; RV64M-NEXT: li a0, 64
493 ; RV32ZBB-LABEL: test_cttz_i64:
495 ; RV32ZBB-NEXT: bnez a0, .LBB3_2
496 ; RV32ZBB-NEXT: # %bb.1:
497 ; RV32ZBB-NEXT: ctz a0, a1
498 ; RV32ZBB-NEXT: addi a0, a0, 32
499 ; RV32ZBB-NEXT: li a1, 0
501 ; RV32ZBB-NEXT: .LBB3_2:
502 ; RV32ZBB-NEXT: ctz a0, a0
503 ; RV32ZBB-NEXT: li a1, 0
506 ; RV64ZBB-LABEL: test_cttz_i64:
508 ; RV64ZBB-NEXT: ctz a0, a0
511 ; RV32XTHEADBB-LABEL: test_cttz_i64:
512 ; RV32XTHEADBB: # %bb.0:
513 ; RV32XTHEADBB-NEXT: bnez a0, .LBB3_2
514 ; RV32XTHEADBB-NEXT: # %bb.1:
515 ; RV32XTHEADBB-NEXT: addi a0, a1, -1
516 ; RV32XTHEADBB-NEXT: not a1, a1
517 ; RV32XTHEADBB-NEXT: and a0, a1, a0
518 ; RV32XTHEADBB-NEXT: th.ff1 a0, a0
519 ; RV32XTHEADBB-NEXT: li a1, 64
520 ; RV32XTHEADBB-NEXT: j .LBB3_3
521 ; RV32XTHEADBB-NEXT: .LBB3_2:
522 ; RV32XTHEADBB-NEXT: addi a1, a0, -1
523 ; RV32XTHEADBB-NEXT: not a0, a0
524 ; RV32XTHEADBB-NEXT: and a0, a0, a1
525 ; RV32XTHEADBB-NEXT: th.ff1 a0, a0
526 ; RV32XTHEADBB-NEXT: li a1, 32
527 ; RV32XTHEADBB-NEXT: .LBB3_3:
528 ; RV32XTHEADBB-NEXT: sub a0, a1, a0
529 ; RV32XTHEADBB-NEXT: li a1, 0
530 ; RV32XTHEADBB-NEXT: ret
532 ; RV64XTHEADBB-LABEL: test_cttz_i64:
533 ; RV64XTHEADBB: # %bb.0:
534 ; RV64XTHEADBB-NEXT: beqz a0, .LBB3_2
535 ; RV64XTHEADBB-NEXT: # %bb.1: # %cond.false
536 ; RV64XTHEADBB-NEXT: addi a1, a0, -1
537 ; RV64XTHEADBB-NEXT: not a0, a0
538 ; RV64XTHEADBB-NEXT: and a0, a0, a1
539 ; RV64XTHEADBB-NEXT: th.ff1 a0, a0
540 ; RV64XTHEADBB-NEXT: li a1, 64
541 ; RV64XTHEADBB-NEXT: sub a0, a1, a0
542 ; RV64XTHEADBB-NEXT: ret
543 ; RV64XTHEADBB-NEXT: .LBB3_2:
544 ; RV64XTHEADBB-NEXT: li a0, 64
545 ; RV64XTHEADBB-NEXT: ret
546 %tmp = call i64 @llvm.cttz.i64(i64 %a, i1 false)
550 define i8 @test_cttz_i8_zero_undef(i8 %a) nounwind {
551 ; RV32_NOZBB-LABEL: test_cttz_i8_zero_undef:
552 ; RV32_NOZBB: # %bb.0:
553 ; RV32_NOZBB-NEXT: addi a1, a0, -1
554 ; RV32_NOZBB-NEXT: not a0, a0
555 ; RV32_NOZBB-NEXT: and a0, a0, a1
556 ; RV32_NOZBB-NEXT: srli a1, a0, 1
557 ; RV32_NOZBB-NEXT: andi a1, a1, 85
558 ; RV32_NOZBB-NEXT: sub a0, a0, a1
559 ; RV32_NOZBB-NEXT: andi a1, a0, 51
560 ; RV32_NOZBB-NEXT: srli a0, a0, 2
561 ; RV32_NOZBB-NEXT: andi a0, a0, 51
562 ; RV32_NOZBB-NEXT: add a0, a1, a0
563 ; RV32_NOZBB-NEXT: srli a1, a0, 4
564 ; RV32_NOZBB-NEXT: add a0, a0, a1
565 ; RV32_NOZBB-NEXT: andi a0, a0, 15
566 ; RV32_NOZBB-NEXT: ret
568 ; RV64NOZBB-LABEL: test_cttz_i8_zero_undef:
569 ; RV64NOZBB: # %bb.0:
570 ; RV64NOZBB-NEXT: addi a1, a0, -1
571 ; RV64NOZBB-NEXT: not a0, a0
572 ; RV64NOZBB-NEXT: and a0, a0, a1
573 ; RV64NOZBB-NEXT: srli a1, a0, 1
574 ; RV64NOZBB-NEXT: andi a1, a1, 85
575 ; RV64NOZBB-NEXT: subw a0, a0, a1
576 ; RV64NOZBB-NEXT: andi a1, a0, 51
577 ; RV64NOZBB-NEXT: srli a0, a0, 2
578 ; RV64NOZBB-NEXT: andi a0, a0, 51
579 ; RV64NOZBB-NEXT: add a0, a1, a0
580 ; RV64NOZBB-NEXT: srli a1, a0, 4
581 ; RV64NOZBB-NEXT: add a0, a0, a1
582 ; RV64NOZBB-NEXT: andi a0, a0, 15
583 ; RV64NOZBB-NEXT: ret
585 ; RV32ZBB-LABEL: test_cttz_i8_zero_undef:
587 ; RV32ZBB-NEXT: ctz a0, a0
590 ; RV64ZBB-LABEL: test_cttz_i8_zero_undef:
592 ; RV64ZBB-NEXT: ctz a0, a0
595 ; RV32XTHEADBB-LABEL: test_cttz_i8_zero_undef:
596 ; RV32XTHEADBB: # %bb.0:
597 ; RV32XTHEADBB-NEXT: addi a1, a0, -1
598 ; RV32XTHEADBB-NEXT: not a0, a0
599 ; RV32XTHEADBB-NEXT: and a0, a0, a1
600 ; RV32XTHEADBB-NEXT: th.ff1 a0, a0
601 ; RV32XTHEADBB-NEXT: li a1, 32
602 ; RV32XTHEADBB-NEXT: sub a0, a1, a0
603 ; RV32XTHEADBB-NEXT: ret
605 ; RV64XTHEADBB-LABEL: test_cttz_i8_zero_undef:
606 ; RV64XTHEADBB: # %bb.0:
607 ; RV64XTHEADBB-NEXT: addi a1, a0, -1
608 ; RV64XTHEADBB-NEXT: not a0, a0
609 ; RV64XTHEADBB-NEXT: and a0, a0, a1
610 ; RV64XTHEADBB-NEXT: th.ff1 a0, a0
611 ; RV64XTHEADBB-NEXT: li a1, 64
612 ; RV64XTHEADBB-NEXT: sub a0, a1, a0
613 ; RV64XTHEADBB-NEXT: ret
614 %tmp = call i8 @llvm.cttz.i8(i8 %a, i1 true)
618 define i16 @test_cttz_i16_zero_undef(i16 %a) nounwind {
619 ; RV32_NOZBB-LABEL: test_cttz_i16_zero_undef:
620 ; RV32_NOZBB: # %bb.0:
621 ; RV32_NOZBB-NEXT: addi a1, a0, -1
622 ; RV32_NOZBB-NEXT: not a0, a0
623 ; RV32_NOZBB-NEXT: and a0, a0, a1
624 ; RV32_NOZBB-NEXT: srli a1, a0, 1
625 ; RV32_NOZBB-NEXT: lui a2, 5
626 ; RV32_NOZBB-NEXT: addi a2, a2, 1365
627 ; RV32_NOZBB-NEXT: and a1, a1, a2
628 ; RV32_NOZBB-NEXT: sub a0, a0, a1
629 ; RV32_NOZBB-NEXT: lui a1, 3
630 ; RV32_NOZBB-NEXT: addi a1, a1, 819
631 ; RV32_NOZBB-NEXT: and a2, a0, a1
632 ; RV32_NOZBB-NEXT: srli a0, a0, 2
633 ; RV32_NOZBB-NEXT: and a0, a0, a1
634 ; RV32_NOZBB-NEXT: add a0, a2, a0
635 ; RV32_NOZBB-NEXT: srli a1, a0, 4
636 ; RV32_NOZBB-NEXT: add a0, a0, a1
637 ; RV32_NOZBB-NEXT: andi a1, a0, 15
638 ; RV32_NOZBB-NEXT: slli a0, a0, 20
639 ; RV32_NOZBB-NEXT: srli a0, a0, 28
640 ; RV32_NOZBB-NEXT: add a0, a1, a0
641 ; RV32_NOZBB-NEXT: ret
643 ; RV64NOZBB-LABEL: test_cttz_i16_zero_undef:
644 ; RV64NOZBB: # %bb.0:
645 ; RV64NOZBB-NEXT: addi a1, a0, -1
646 ; RV64NOZBB-NEXT: not a0, a0
647 ; RV64NOZBB-NEXT: and a0, a0, a1
648 ; RV64NOZBB-NEXT: srli a1, a0, 1
649 ; RV64NOZBB-NEXT: lui a2, 5
650 ; RV64NOZBB-NEXT: addiw a2, a2, 1365
651 ; RV64NOZBB-NEXT: and a1, a1, a2
652 ; RV64NOZBB-NEXT: sub a0, a0, a1
653 ; RV64NOZBB-NEXT: lui a1, 3
654 ; RV64NOZBB-NEXT: addiw a1, a1, 819
655 ; RV64NOZBB-NEXT: and a2, a0, a1
656 ; RV64NOZBB-NEXT: srli a0, a0, 2
657 ; RV64NOZBB-NEXT: and a0, a0, a1
658 ; RV64NOZBB-NEXT: add a0, a2, a0
659 ; RV64NOZBB-NEXT: srli a1, a0, 4
660 ; RV64NOZBB-NEXT: add a0, a0, a1
661 ; RV64NOZBB-NEXT: andi a1, a0, 15
662 ; RV64NOZBB-NEXT: slli a0, a0, 52
663 ; RV64NOZBB-NEXT: srli a0, a0, 60
664 ; RV64NOZBB-NEXT: add a0, a1, a0
665 ; RV64NOZBB-NEXT: ret
667 ; RV32ZBB-LABEL: test_cttz_i16_zero_undef:
669 ; RV32ZBB-NEXT: ctz a0, a0
672 ; RV64ZBB-LABEL: test_cttz_i16_zero_undef:
674 ; RV64ZBB-NEXT: ctz a0, a0
677 ; RV32XTHEADBB-LABEL: test_cttz_i16_zero_undef:
678 ; RV32XTHEADBB: # %bb.0:
679 ; RV32XTHEADBB-NEXT: addi a1, a0, -1
680 ; RV32XTHEADBB-NEXT: not a0, a0
681 ; RV32XTHEADBB-NEXT: and a0, a0, a1
682 ; RV32XTHEADBB-NEXT: th.ff1 a0, a0
683 ; RV32XTHEADBB-NEXT: li a1, 32
684 ; RV32XTHEADBB-NEXT: sub a0, a1, a0
685 ; RV32XTHEADBB-NEXT: ret
687 ; RV64XTHEADBB-LABEL: test_cttz_i16_zero_undef:
688 ; RV64XTHEADBB: # %bb.0:
689 ; RV64XTHEADBB-NEXT: addi a1, a0, -1
690 ; RV64XTHEADBB-NEXT: not a0, a0
691 ; RV64XTHEADBB-NEXT: and a0, a0, a1
692 ; RV64XTHEADBB-NEXT: th.ff1 a0, a0
693 ; RV64XTHEADBB-NEXT: li a1, 64
694 ; RV64XTHEADBB-NEXT: sub a0, a1, a0
695 ; RV64XTHEADBB-NEXT: ret
696 %tmp = call i16 @llvm.cttz.i16(i16 %a, i1 true)
700 define i32 @test_cttz_i32_zero_undef(i32 %a) nounwind {
701 ; RV32I-LABEL: test_cttz_i32_zero_undef:
703 ; RV32I-NEXT: addi sp, sp, -16
704 ; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
705 ; RV32I-NEXT: neg a1, a0
706 ; RV32I-NEXT: and a0, a0, a1
707 ; RV32I-NEXT: lui a1, 30667
708 ; RV32I-NEXT: addi a1, a1, 1329
709 ; RV32I-NEXT: call __mulsi3
710 ; RV32I-NEXT: srli a0, a0, 27
711 ; RV32I-NEXT: lui a1, %hi(.LCPI6_0)
712 ; RV32I-NEXT: addi a1, a1, %lo(.LCPI6_0)
713 ; RV32I-NEXT: add a0, a1, a0
714 ; RV32I-NEXT: lbu a0, 0(a0)
715 ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
716 ; RV32I-NEXT: addi sp, sp, 16
719 ; RV64I-LABEL: test_cttz_i32_zero_undef:
721 ; RV64I-NEXT: addi sp, sp, -16
722 ; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
723 ; RV64I-NEXT: neg a1, a0
724 ; RV64I-NEXT: and a0, a0, a1
725 ; RV64I-NEXT: lui a1, 30667
726 ; RV64I-NEXT: addiw a1, a1, 1329
727 ; RV64I-NEXT: call __muldi3
728 ; RV64I-NEXT: srliw a0, a0, 27
729 ; RV64I-NEXT: lui a1, %hi(.LCPI6_0)
730 ; RV64I-NEXT: addi a1, a1, %lo(.LCPI6_0)
731 ; RV64I-NEXT: add a0, a1, a0
732 ; RV64I-NEXT: lbu a0, 0(a0)
733 ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
734 ; RV64I-NEXT: addi sp, sp, 16
737 ; RV32M-LABEL: test_cttz_i32_zero_undef:
739 ; RV32M-NEXT: neg a1, a0
740 ; RV32M-NEXT: and a0, a0, a1
741 ; RV32M-NEXT: lui a1, 30667
742 ; RV32M-NEXT: addi a1, a1, 1329
743 ; RV32M-NEXT: mul a0, a0, a1
744 ; RV32M-NEXT: srli a0, a0, 27
745 ; RV32M-NEXT: lui a1, %hi(.LCPI6_0)
746 ; RV32M-NEXT: addi a1, a1, %lo(.LCPI6_0)
747 ; RV32M-NEXT: add a0, a1, a0
748 ; RV32M-NEXT: lbu a0, 0(a0)
751 ; RV64M-LABEL: test_cttz_i32_zero_undef:
753 ; RV64M-NEXT: negw a1, a0
754 ; RV64M-NEXT: and a0, a0, a1
755 ; RV64M-NEXT: lui a1, 30667
756 ; RV64M-NEXT: addi a1, a1, 1329
757 ; RV64M-NEXT: mul a0, a0, a1
758 ; RV64M-NEXT: srliw a0, a0, 27
759 ; RV64M-NEXT: lui a1, %hi(.LCPI6_0)
760 ; RV64M-NEXT: addi a1, a1, %lo(.LCPI6_0)
761 ; RV64M-NEXT: add a0, a1, a0
762 ; RV64M-NEXT: lbu a0, 0(a0)
765 ; RV32ZBB-LABEL: test_cttz_i32_zero_undef:
767 ; RV32ZBB-NEXT: ctz a0, a0
770 ; RV64ZBB-LABEL: test_cttz_i32_zero_undef:
772 ; RV64ZBB-NEXT: ctzw a0, a0
775 ; RV32XTHEADBB-LABEL: test_cttz_i32_zero_undef:
776 ; RV32XTHEADBB: # %bb.0:
777 ; RV32XTHEADBB-NEXT: addi a1, a0, -1
778 ; RV32XTHEADBB-NEXT: not a0, a0
779 ; RV32XTHEADBB-NEXT: and a0, a0, a1
780 ; RV32XTHEADBB-NEXT: th.ff1 a0, a0
781 ; RV32XTHEADBB-NEXT: li a1, 32
782 ; RV32XTHEADBB-NEXT: sub a0, a1, a0
783 ; RV32XTHEADBB-NEXT: ret
785 ; RV64XTHEADBB-LABEL: test_cttz_i32_zero_undef:
786 ; RV64XTHEADBB: # %bb.0:
787 ; RV64XTHEADBB-NEXT: addi a1, a0, -1
788 ; RV64XTHEADBB-NEXT: not a0, a0
789 ; RV64XTHEADBB-NEXT: and a0, a0, a1
790 ; RV64XTHEADBB-NEXT: th.ff1 a0, a0
791 ; RV64XTHEADBB-NEXT: li a1, 64
792 ; RV64XTHEADBB-NEXT: sub a0, a1, a0
793 ; RV64XTHEADBB-NEXT: ret
794 %tmp = call i32 @llvm.cttz.i32(i32 %a, i1 true)
798 define i64 @test_cttz_i64_zero_undef(i64 %a) nounwind {
799 ; RV32I-LABEL: test_cttz_i64_zero_undef:
801 ; RV32I-NEXT: addi sp, sp, -32
802 ; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
803 ; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
804 ; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
805 ; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
806 ; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
807 ; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill
808 ; RV32I-NEXT: mv s1, a1
809 ; RV32I-NEXT: mv s2, a0
810 ; RV32I-NEXT: neg a0, a0
811 ; RV32I-NEXT: and a0, s2, a0
812 ; RV32I-NEXT: lui a1, 30667
813 ; RV32I-NEXT: addi s3, a1, 1329
814 ; RV32I-NEXT: mv a1, s3
815 ; RV32I-NEXT: call __mulsi3
816 ; RV32I-NEXT: mv s0, a0
817 ; RV32I-NEXT: lui a0, %hi(.LCPI7_0)
818 ; RV32I-NEXT: addi s4, a0, %lo(.LCPI7_0)
819 ; RV32I-NEXT: neg a0, s1
820 ; RV32I-NEXT: and a0, s1, a0
821 ; RV32I-NEXT: mv a1, s3
822 ; RV32I-NEXT: call __mulsi3
823 ; RV32I-NEXT: bnez s2, .LBB7_2
824 ; RV32I-NEXT: # %bb.1:
825 ; RV32I-NEXT: srli a0, a0, 27
826 ; RV32I-NEXT: add a0, s4, a0
827 ; RV32I-NEXT: lbu a0, 0(a0)
828 ; RV32I-NEXT: addi a0, a0, 32
829 ; RV32I-NEXT: j .LBB7_3
830 ; RV32I-NEXT: .LBB7_2:
831 ; RV32I-NEXT: srli s0, s0, 27
832 ; RV32I-NEXT: add s0, s4, s0
833 ; RV32I-NEXT: lbu a0, 0(s0)
834 ; RV32I-NEXT: .LBB7_3:
835 ; RV32I-NEXT: li a1, 0
836 ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
837 ; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
838 ; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
839 ; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
840 ; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
841 ; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
842 ; RV32I-NEXT: addi sp, sp, 32
845 ; RV64I-LABEL: test_cttz_i64_zero_undef:
847 ; RV64I-NEXT: addi sp, sp, -16
848 ; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
849 ; RV64I-NEXT: neg a1, a0
850 ; RV64I-NEXT: and a0, a0, a1
851 ; RV64I-NEXT: lui a1, %hi(.LCPI7_0)
852 ; RV64I-NEXT: ld a1, %lo(.LCPI7_0)(a1)
853 ; RV64I-NEXT: call __muldi3
854 ; RV64I-NEXT: srli a0, a0, 58
855 ; RV64I-NEXT: lui a1, %hi(.LCPI7_1)
856 ; RV64I-NEXT: addi a1, a1, %lo(.LCPI7_1)
857 ; RV64I-NEXT: add a0, a1, a0
858 ; RV64I-NEXT: lbu a0, 0(a0)
859 ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
860 ; RV64I-NEXT: addi sp, sp, 16
863 ; RV32M-LABEL: test_cttz_i64_zero_undef:
865 ; RV32M-NEXT: lui a2, 30667
866 ; RV32M-NEXT: addi a3, a2, 1329
867 ; RV32M-NEXT: lui a2, %hi(.LCPI7_0)
868 ; RV32M-NEXT: addi a2, a2, %lo(.LCPI7_0)
869 ; RV32M-NEXT: bnez a0, .LBB7_2
870 ; RV32M-NEXT: # %bb.1:
871 ; RV32M-NEXT: neg a0, a1
872 ; RV32M-NEXT: and a0, a1, a0
873 ; RV32M-NEXT: mul a0, a0, a3
874 ; RV32M-NEXT: srli a0, a0, 27
875 ; RV32M-NEXT: add a0, a2, a0
876 ; RV32M-NEXT: lbu a0, 0(a0)
877 ; RV32M-NEXT: addi a0, a0, 32
878 ; RV32M-NEXT: li a1, 0
880 ; RV32M-NEXT: .LBB7_2:
881 ; RV32M-NEXT: neg a1, a0
882 ; RV32M-NEXT: and a0, a0, a1
883 ; RV32M-NEXT: mul a0, a0, a3
884 ; RV32M-NEXT: srli a0, a0, 27
885 ; RV32M-NEXT: add a0, a2, a0
886 ; RV32M-NEXT: lbu a0, 0(a0)
887 ; RV32M-NEXT: li a1, 0
890 ; RV64M-LABEL: test_cttz_i64_zero_undef:
892 ; RV64M-NEXT: lui a1, %hi(.LCPI7_0)
893 ; RV64M-NEXT: ld a1, %lo(.LCPI7_0)(a1)
894 ; RV64M-NEXT: neg a2, a0
895 ; RV64M-NEXT: and a0, a0, a2
896 ; RV64M-NEXT: mul a0, a0, a1
897 ; RV64M-NEXT: srli a0, a0, 58
898 ; RV64M-NEXT: lui a1, %hi(.LCPI7_1)
899 ; RV64M-NEXT: addi a1, a1, %lo(.LCPI7_1)
900 ; RV64M-NEXT: add a0, a1, a0
901 ; RV64M-NEXT: lbu a0, 0(a0)
904 ; RV32ZBB-LABEL: test_cttz_i64_zero_undef:
906 ; RV32ZBB-NEXT: bnez a0, .LBB7_2
907 ; RV32ZBB-NEXT: # %bb.1:
908 ; RV32ZBB-NEXT: ctz a0, a1
909 ; RV32ZBB-NEXT: addi a0, a0, 32
910 ; RV32ZBB-NEXT: li a1, 0
912 ; RV32ZBB-NEXT: .LBB7_2:
913 ; RV32ZBB-NEXT: ctz a0, a0
914 ; RV32ZBB-NEXT: li a1, 0
917 ; RV64ZBB-LABEL: test_cttz_i64_zero_undef:
919 ; RV64ZBB-NEXT: ctz a0, a0
922 ; RV32XTHEADBB-LABEL: test_cttz_i64_zero_undef:
923 ; RV32XTHEADBB: # %bb.0:
924 ; RV32XTHEADBB-NEXT: bnez a0, .LBB7_2
925 ; RV32XTHEADBB-NEXT: # %bb.1:
926 ; RV32XTHEADBB-NEXT: addi a0, a1, -1
927 ; RV32XTHEADBB-NEXT: not a1, a1
928 ; RV32XTHEADBB-NEXT: and a0, a1, a0
929 ; RV32XTHEADBB-NEXT: th.ff1 a0, a0
930 ; RV32XTHEADBB-NEXT: li a1, 64
931 ; RV32XTHEADBB-NEXT: j .LBB7_3
932 ; RV32XTHEADBB-NEXT: .LBB7_2:
933 ; RV32XTHEADBB-NEXT: addi a1, a0, -1
934 ; RV32XTHEADBB-NEXT: not a0, a0
935 ; RV32XTHEADBB-NEXT: and a0, a0, a1
936 ; RV32XTHEADBB-NEXT: th.ff1 a0, a0
937 ; RV32XTHEADBB-NEXT: li a1, 32
938 ; RV32XTHEADBB-NEXT: .LBB7_3:
939 ; RV32XTHEADBB-NEXT: sub a0, a1, a0
940 ; RV32XTHEADBB-NEXT: li a1, 0
941 ; RV32XTHEADBB-NEXT: ret
943 ; RV64XTHEADBB-LABEL: test_cttz_i64_zero_undef:
944 ; RV64XTHEADBB: # %bb.0:
945 ; RV64XTHEADBB-NEXT: addi a1, a0, -1
946 ; RV64XTHEADBB-NEXT: not a0, a0
947 ; RV64XTHEADBB-NEXT: and a0, a0, a1
948 ; RV64XTHEADBB-NEXT: th.ff1 a0, a0
949 ; RV64XTHEADBB-NEXT: li a1, 64
950 ; RV64XTHEADBB-NEXT: sub a0, a1, a0
951 ; RV64XTHEADBB-NEXT: ret
952 %tmp = call i64 @llvm.cttz.i64(i64 %a, i1 true)
956 define i8 @test_ctlz_i8(i8 %a) nounwind {
957 ; RV32_NOZBB-LABEL: test_ctlz_i8:
958 ; RV32_NOZBB: # %bb.0:
959 ; RV32_NOZBB-NEXT: andi a1, a0, 255
960 ; RV32_NOZBB-NEXT: beqz a1, .LBB8_2
961 ; RV32_NOZBB-NEXT: # %bb.1: # %cond.false
962 ; RV32_NOZBB-NEXT: slli a1, a0, 24
963 ; RV32_NOZBB-NEXT: srli a1, a1, 25
964 ; RV32_NOZBB-NEXT: or a0, a0, a1
965 ; RV32_NOZBB-NEXT: slli a1, a0, 24
966 ; RV32_NOZBB-NEXT: srli a1, a1, 26
967 ; RV32_NOZBB-NEXT: or a0, a0, a1
968 ; RV32_NOZBB-NEXT: slli a1, a0, 24
969 ; RV32_NOZBB-NEXT: srli a1, a1, 28
970 ; RV32_NOZBB-NEXT: or a0, a0, a1
971 ; RV32_NOZBB-NEXT: not a0, a0
972 ; RV32_NOZBB-NEXT: srli a1, a0, 1
973 ; RV32_NOZBB-NEXT: andi a1, a1, 85
974 ; RV32_NOZBB-NEXT: sub a0, a0, a1
975 ; RV32_NOZBB-NEXT: andi a1, a0, 51
976 ; RV32_NOZBB-NEXT: srli a0, a0, 2
977 ; RV32_NOZBB-NEXT: andi a0, a0, 51
978 ; RV32_NOZBB-NEXT: add a0, a1, a0
979 ; RV32_NOZBB-NEXT: srli a1, a0, 4
980 ; RV32_NOZBB-NEXT: add a0, a0, a1
981 ; RV32_NOZBB-NEXT: andi a0, a0, 15
982 ; RV32_NOZBB-NEXT: ret
983 ; RV32_NOZBB-NEXT: .LBB8_2:
984 ; RV32_NOZBB-NEXT: li a0, 8
985 ; RV32_NOZBB-NEXT: ret
987 ; RV64NOZBB-LABEL: test_ctlz_i8:
988 ; RV64NOZBB: # %bb.0:
989 ; RV64NOZBB-NEXT: andi a1, a0, 255
990 ; RV64NOZBB-NEXT: beqz a1, .LBB8_2
991 ; RV64NOZBB-NEXT: # %bb.1: # %cond.false
992 ; RV64NOZBB-NEXT: slli a1, a0, 56
993 ; RV64NOZBB-NEXT: srli a1, a1, 57
994 ; RV64NOZBB-NEXT: or a0, a0, a1
995 ; RV64NOZBB-NEXT: slli a1, a0, 56
996 ; RV64NOZBB-NEXT: srli a1, a1, 58
997 ; RV64NOZBB-NEXT: or a0, a0, a1
998 ; RV64NOZBB-NEXT: slli a1, a0, 56
999 ; RV64NOZBB-NEXT: srli a1, a1, 60
1000 ; RV64NOZBB-NEXT: or a0, a0, a1
1001 ; RV64NOZBB-NEXT: not a0, a0
1002 ; RV64NOZBB-NEXT: srli a1, a0, 1
1003 ; RV64NOZBB-NEXT: andi a1, a1, 85
1004 ; RV64NOZBB-NEXT: subw a0, a0, a1
1005 ; RV64NOZBB-NEXT: andi a1, a0, 51
1006 ; RV64NOZBB-NEXT: srli a0, a0, 2
1007 ; RV64NOZBB-NEXT: andi a0, a0, 51
1008 ; RV64NOZBB-NEXT: add a0, a1, a0
1009 ; RV64NOZBB-NEXT: srli a1, a0, 4
1010 ; RV64NOZBB-NEXT: add a0, a0, a1
1011 ; RV64NOZBB-NEXT: andi a0, a0, 15
1012 ; RV64NOZBB-NEXT: ret
1013 ; RV64NOZBB-NEXT: .LBB8_2:
1014 ; RV64NOZBB-NEXT: li a0, 8
1015 ; RV64NOZBB-NEXT: ret
1017 ; RV32ZBB-LABEL: test_ctlz_i8:
1019 ; RV32ZBB-NEXT: andi a0, a0, 255
1020 ; RV32ZBB-NEXT: clz a0, a0
1021 ; RV32ZBB-NEXT: addi a0, a0, -24
1024 ; RV64ZBB-LABEL: test_ctlz_i8:
1026 ; RV64ZBB-NEXT: andi a0, a0, 255
1027 ; RV64ZBB-NEXT: clz a0, a0
1028 ; RV64ZBB-NEXT: addi a0, a0, -56
1031 ; RV32XTHEADBB-LABEL: test_ctlz_i8:
1032 ; RV32XTHEADBB: # %bb.0:
1033 ; RV32XTHEADBB-NEXT: andi a0, a0, 255
1034 ; RV32XTHEADBB-NEXT: th.ff1 a0, a0
1035 ; RV32XTHEADBB-NEXT: addi a0, a0, -24
1036 ; RV32XTHEADBB-NEXT: ret
1038 ; RV64XTHEADBB-LABEL: test_ctlz_i8:
1039 ; RV64XTHEADBB: # %bb.0:
1040 ; RV64XTHEADBB-NEXT: andi a0, a0, 255
1041 ; RV64XTHEADBB-NEXT: th.ff1 a0, a0
1042 ; RV64XTHEADBB-NEXT: addi a0, a0, -56
1043 ; RV64XTHEADBB-NEXT: ret
1044 %tmp = call i8 @llvm.ctlz.i8(i8 %a, i1 false)
1048 define i16 @test_ctlz_i16(i16 %a) nounwind {
1049 ; RV32_NOZBB-LABEL: test_ctlz_i16:
1050 ; RV32_NOZBB: # %bb.0:
1051 ; RV32_NOZBB-NEXT: slli a1, a0, 16
1052 ; RV32_NOZBB-NEXT: beqz a1, .LBB9_2
1053 ; RV32_NOZBB-NEXT: # %bb.1: # %cond.false
1054 ; RV32_NOZBB-NEXT: srli a1, a1, 17
1055 ; RV32_NOZBB-NEXT: or a0, a0, a1
1056 ; RV32_NOZBB-NEXT: slli a1, a0, 16
1057 ; RV32_NOZBB-NEXT: srli a1, a1, 18
1058 ; RV32_NOZBB-NEXT: or a0, a0, a1
1059 ; RV32_NOZBB-NEXT: slli a1, a0, 16
1060 ; RV32_NOZBB-NEXT: srli a1, a1, 20
1061 ; RV32_NOZBB-NEXT: or a0, a0, a1
1062 ; RV32_NOZBB-NEXT: slli a1, a0, 16
1063 ; RV32_NOZBB-NEXT: srli a1, a1, 24
1064 ; RV32_NOZBB-NEXT: or a0, a0, a1
1065 ; RV32_NOZBB-NEXT: not a0, a0
1066 ; RV32_NOZBB-NEXT: srli a1, a0, 1
1067 ; RV32_NOZBB-NEXT: lui a2, 5
1068 ; RV32_NOZBB-NEXT: addi a2, a2, 1365
1069 ; RV32_NOZBB-NEXT: and a1, a1, a2
1070 ; RV32_NOZBB-NEXT: sub a0, a0, a1
1071 ; RV32_NOZBB-NEXT: lui a1, 3
1072 ; RV32_NOZBB-NEXT: addi a1, a1, 819
1073 ; RV32_NOZBB-NEXT: and a2, a0, a1
1074 ; RV32_NOZBB-NEXT: srli a0, a0, 2
1075 ; RV32_NOZBB-NEXT: and a0, a0, a1
1076 ; RV32_NOZBB-NEXT: add a0, a2, a0
1077 ; RV32_NOZBB-NEXT: srli a1, a0, 4
1078 ; RV32_NOZBB-NEXT: add a0, a0, a1
1079 ; RV32_NOZBB-NEXT: andi a1, a0, 15
1080 ; RV32_NOZBB-NEXT: slli a0, a0, 20
1081 ; RV32_NOZBB-NEXT: srli a0, a0, 28
1082 ; RV32_NOZBB-NEXT: add a0, a1, a0
1083 ; RV32_NOZBB-NEXT: ret
1084 ; RV32_NOZBB-NEXT: .LBB9_2:
1085 ; RV32_NOZBB-NEXT: li a0, 16
1086 ; RV32_NOZBB-NEXT: ret
1088 ; RV64NOZBB-LABEL: test_ctlz_i16:
1089 ; RV64NOZBB: # %bb.0:
1090 ; RV64NOZBB-NEXT: slli a1, a0, 48
1091 ; RV64NOZBB-NEXT: beqz a1, .LBB9_2
1092 ; RV64NOZBB-NEXT: # %bb.1: # %cond.false
1093 ; RV64NOZBB-NEXT: srli a1, a1, 49
1094 ; RV64NOZBB-NEXT: or a0, a0, a1
1095 ; RV64NOZBB-NEXT: slli a1, a0, 48
1096 ; RV64NOZBB-NEXT: srli a1, a1, 50
1097 ; RV64NOZBB-NEXT: or a0, a0, a1
1098 ; RV64NOZBB-NEXT: slli a1, a0, 48
1099 ; RV64NOZBB-NEXT: srli a1, a1, 52
1100 ; RV64NOZBB-NEXT: or a0, a0, a1
1101 ; RV64NOZBB-NEXT: slli a1, a0, 48
1102 ; RV64NOZBB-NEXT: srli a1, a1, 56
1103 ; RV64NOZBB-NEXT: or a0, a0, a1
1104 ; RV64NOZBB-NEXT: not a0, a0
1105 ; RV64NOZBB-NEXT: srli a1, a0, 1
1106 ; RV64NOZBB-NEXT: lui a2, 5
1107 ; RV64NOZBB-NEXT: addiw a2, a2, 1365
1108 ; RV64NOZBB-NEXT: and a1, a1, a2
1109 ; RV64NOZBB-NEXT: sub a0, a0, a1
1110 ; RV64NOZBB-NEXT: lui a1, 3
1111 ; RV64NOZBB-NEXT: addiw a1, a1, 819
1112 ; RV64NOZBB-NEXT: and a2, a0, a1
1113 ; RV64NOZBB-NEXT: srli a0, a0, 2
1114 ; RV64NOZBB-NEXT: and a0, a0, a1
1115 ; RV64NOZBB-NEXT: add a0, a2, a0
1116 ; RV64NOZBB-NEXT: srli a1, a0, 4
1117 ; RV64NOZBB-NEXT: add a0, a0, a1
1118 ; RV64NOZBB-NEXT: andi a1, a0, 15
1119 ; RV64NOZBB-NEXT: slli a0, a0, 52
1120 ; RV64NOZBB-NEXT: srli a0, a0, 60
1121 ; RV64NOZBB-NEXT: add a0, a1, a0
1122 ; RV64NOZBB-NEXT: ret
1123 ; RV64NOZBB-NEXT: .LBB9_2:
1124 ; RV64NOZBB-NEXT: li a0, 16
1125 ; RV64NOZBB-NEXT: ret
1127 ; RV32ZBB-LABEL: test_ctlz_i16:
1129 ; RV32ZBB-NEXT: zext.h a0, a0
1130 ; RV32ZBB-NEXT: clz a0, a0
1131 ; RV32ZBB-NEXT: addi a0, a0, -16
1134 ; RV64ZBB-LABEL: test_ctlz_i16:
1136 ; RV64ZBB-NEXT: zext.h a0, a0
1137 ; RV64ZBB-NEXT: clz a0, a0
1138 ; RV64ZBB-NEXT: addi a0, a0, -48
1141 ; RV32XTHEADBB-LABEL: test_ctlz_i16:
1142 ; RV32XTHEADBB: # %bb.0:
1143 ; RV32XTHEADBB-NEXT: th.extu a0, a0, 15, 0
1144 ; RV32XTHEADBB-NEXT: th.ff1 a0, a0
1145 ; RV32XTHEADBB-NEXT: addi a0, a0, -16
1146 ; RV32XTHEADBB-NEXT: ret
1148 ; RV64XTHEADBB-LABEL: test_ctlz_i16:
1149 ; RV64XTHEADBB: # %bb.0:
1150 ; RV64XTHEADBB-NEXT: th.extu a0, a0, 15, 0
1151 ; RV64XTHEADBB-NEXT: th.ff1 a0, a0
1152 ; RV64XTHEADBB-NEXT: addi a0, a0, -48
1153 ; RV64XTHEADBB-NEXT: ret
1154 %tmp = call i16 @llvm.ctlz.i16(i16 %a, i1 false)
1158 define i32 @test_ctlz_i32(i32 %a) nounwind {
1159 ; RV32I-LABEL: test_ctlz_i32:
1161 ; RV32I-NEXT: beqz a0, .LBB10_2
1162 ; RV32I-NEXT: # %bb.1: # %cond.false
1163 ; RV32I-NEXT: addi sp, sp, -16
1164 ; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
1165 ; RV32I-NEXT: srli a1, a0, 1
1166 ; RV32I-NEXT: or a0, a0, a1
1167 ; RV32I-NEXT: srli a1, a0, 2
1168 ; RV32I-NEXT: or a0, a0, a1
1169 ; RV32I-NEXT: srli a1, a0, 4
1170 ; RV32I-NEXT: or a0, a0, a1
1171 ; RV32I-NEXT: srli a1, a0, 8
1172 ; RV32I-NEXT: or a0, a0, a1
1173 ; RV32I-NEXT: srli a1, a0, 16
1174 ; RV32I-NEXT: or a0, a0, a1
1175 ; RV32I-NEXT: not a0, a0
1176 ; RV32I-NEXT: srli a1, a0, 1
1177 ; RV32I-NEXT: lui a2, 349525
1178 ; RV32I-NEXT: addi a2, a2, 1365
1179 ; RV32I-NEXT: and a1, a1, a2
1180 ; RV32I-NEXT: sub a0, a0, a1
1181 ; RV32I-NEXT: lui a1, 209715
1182 ; RV32I-NEXT: addi a1, a1, 819
1183 ; RV32I-NEXT: and a2, a0, a1
1184 ; RV32I-NEXT: srli a0, a0, 2
1185 ; RV32I-NEXT: and a0, a0, a1
1186 ; RV32I-NEXT: add a0, a2, a0
1187 ; RV32I-NEXT: srli a1, a0, 4
1188 ; RV32I-NEXT: add a0, a0, a1
1189 ; RV32I-NEXT: lui a1, 61681
1190 ; RV32I-NEXT: addi a1, a1, -241
1191 ; RV32I-NEXT: and a0, a0, a1
1192 ; RV32I-NEXT: lui a1, 4112
1193 ; RV32I-NEXT: addi a1, a1, 257
1194 ; RV32I-NEXT: call __mulsi3
1195 ; RV32I-NEXT: srli a0, a0, 24
1196 ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
1197 ; RV32I-NEXT: addi sp, sp, 16
1199 ; RV32I-NEXT: .LBB10_2:
1200 ; RV32I-NEXT: li a0, 32
1203 ; RV64I-LABEL: test_ctlz_i32:
1205 ; RV64I-NEXT: sext.w a1, a0
1206 ; RV64I-NEXT: beqz a1, .LBB10_2
1207 ; RV64I-NEXT: # %bb.1: # %cond.false
1208 ; RV64I-NEXT: addi sp, sp, -16
1209 ; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
1210 ; RV64I-NEXT: srliw a1, a0, 1
1211 ; RV64I-NEXT: or a0, a0, a1
1212 ; RV64I-NEXT: srliw a1, a0, 2
1213 ; RV64I-NEXT: or a0, a0, a1
1214 ; RV64I-NEXT: srliw a1, a0, 4
1215 ; RV64I-NEXT: or a0, a0, a1
1216 ; RV64I-NEXT: srliw a1, a0, 8
1217 ; RV64I-NEXT: or a0, a0, a1
1218 ; RV64I-NEXT: srliw a1, a0, 16
1219 ; RV64I-NEXT: or a0, a0, a1
1220 ; RV64I-NEXT: not a0, a0
1221 ; RV64I-NEXT: srli a1, a0, 1
1222 ; RV64I-NEXT: lui a2, 349525
1223 ; RV64I-NEXT: addiw a2, a2, 1365
1224 ; RV64I-NEXT: and a1, a1, a2
1225 ; RV64I-NEXT: sub a0, a0, a1
1226 ; RV64I-NEXT: lui a1, 209715
1227 ; RV64I-NEXT: addiw a1, a1, 819
1228 ; RV64I-NEXT: and a2, a0, a1
1229 ; RV64I-NEXT: srli a0, a0, 2
1230 ; RV64I-NEXT: and a0, a0, a1
1231 ; RV64I-NEXT: add a0, a2, a0
1232 ; RV64I-NEXT: srli a1, a0, 4
1233 ; RV64I-NEXT: add a0, a0, a1
1234 ; RV64I-NEXT: lui a1, 61681
1235 ; RV64I-NEXT: addiw a1, a1, -241
1236 ; RV64I-NEXT: and a0, a0, a1
1237 ; RV64I-NEXT: lui a1, 4112
1238 ; RV64I-NEXT: addiw a1, a1, 257
1239 ; RV64I-NEXT: call __muldi3
1240 ; RV64I-NEXT: srliw a0, a0, 24
1241 ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
1242 ; RV64I-NEXT: addi sp, sp, 16
1244 ; RV64I-NEXT: .LBB10_2:
1245 ; RV64I-NEXT: li a0, 32
1248 ; RV32M-LABEL: test_ctlz_i32:
1250 ; RV32M-NEXT: beqz a0, .LBB10_2
1251 ; RV32M-NEXT: # %bb.1: # %cond.false
1252 ; RV32M-NEXT: srli a1, a0, 1
1253 ; RV32M-NEXT: or a0, a0, a1
1254 ; RV32M-NEXT: srli a1, a0, 2
1255 ; RV32M-NEXT: or a0, a0, a1
1256 ; RV32M-NEXT: srli a1, a0, 4
1257 ; RV32M-NEXT: or a0, a0, a1
1258 ; RV32M-NEXT: srli a1, a0, 8
1259 ; RV32M-NEXT: or a0, a0, a1
1260 ; RV32M-NEXT: srli a1, a0, 16
1261 ; RV32M-NEXT: or a0, a0, a1
1262 ; RV32M-NEXT: not a0, a0
1263 ; RV32M-NEXT: srli a1, a0, 1
1264 ; RV32M-NEXT: lui a2, 349525
1265 ; RV32M-NEXT: addi a2, a2, 1365
1266 ; RV32M-NEXT: and a1, a1, a2
1267 ; RV32M-NEXT: sub a0, a0, a1
1268 ; RV32M-NEXT: lui a1, 209715
1269 ; RV32M-NEXT: addi a1, a1, 819
1270 ; RV32M-NEXT: and a2, a0, a1
1271 ; RV32M-NEXT: srli a0, a0, 2
1272 ; RV32M-NEXT: and a0, a0, a1
1273 ; RV32M-NEXT: add a0, a2, a0
1274 ; RV32M-NEXT: srli a1, a0, 4
1275 ; RV32M-NEXT: add a0, a0, a1
1276 ; RV32M-NEXT: lui a1, 61681
1277 ; RV32M-NEXT: addi a1, a1, -241
1278 ; RV32M-NEXT: and a0, a0, a1
1279 ; RV32M-NEXT: lui a1, 4112
1280 ; RV32M-NEXT: addi a1, a1, 257
1281 ; RV32M-NEXT: mul a0, a0, a1
1282 ; RV32M-NEXT: srli a0, a0, 24
1284 ; RV32M-NEXT: .LBB10_2:
1285 ; RV32M-NEXT: li a0, 32
1288 ; RV64M-LABEL: test_ctlz_i32:
1290 ; RV64M-NEXT: sext.w a1, a0
1291 ; RV64M-NEXT: beqz a1, .LBB10_2
1292 ; RV64M-NEXT: # %bb.1: # %cond.false
1293 ; RV64M-NEXT: srliw a1, a0, 1
1294 ; RV64M-NEXT: or a0, a0, a1
1295 ; RV64M-NEXT: srliw a1, a0, 2
1296 ; RV64M-NEXT: or a0, a0, a1
1297 ; RV64M-NEXT: srliw a1, a0, 4
1298 ; RV64M-NEXT: or a0, a0, a1
1299 ; RV64M-NEXT: srliw a1, a0, 8
1300 ; RV64M-NEXT: or a0, a0, a1
1301 ; RV64M-NEXT: srliw a1, a0, 16
1302 ; RV64M-NEXT: or a0, a0, a1
1303 ; RV64M-NEXT: not a0, a0
1304 ; RV64M-NEXT: srli a1, a0, 1
1305 ; RV64M-NEXT: lui a2, 349525
1306 ; RV64M-NEXT: addiw a2, a2, 1365
1307 ; RV64M-NEXT: and a1, a1, a2
1308 ; RV64M-NEXT: sub a0, a0, a1
1309 ; RV64M-NEXT: lui a1, 209715
1310 ; RV64M-NEXT: addiw a1, a1, 819
1311 ; RV64M-NEXT: and a2, a0, a1
1312 ; RV64M-NEXT: srli a0, a0, 2
1313 ; RV64M-NEXT: and a0, a0, a1
1314 ; RV64M-NEXT: add a0, a2, a0
1315 ; RV64M-NEXT: srli a1, a0, 4
1316 ; RV64M-NEXT: add a0, a0, a1
1317 ; RV64M-NEXT: lui a1, 61681
1318 ; RV64M-NEXT: addi a1, a1, -241
1319 ; RV64M-NEXT: and a0, a0, a1
1320 ; RV64M-NEXT: lui a1, 4112
1321 ; RV64M-NEXT: addi a1, a1, 257
1322 ; RV64M-NEXT: mul a0, a0, a1
1323 ; RV64M-NEXT: srliw a0, a0, 24
1325 ; RV64M-NEXT: .LBB10_2:
1326 ; RV64M-NEXT: li a0, 32
1329 ; RV32ZBB-LABEL: test_ctlz_i32:
1331 ; RV32ZBB-NEXT: clz a0, a0
1334 ; RV64ZBB-LABEL: test_ctlz_i32:
1336 ; RV64ZBB-NEXT: clzw a0, a0
1339 ; RV32XTHEADBB-LABEL: test_ctlz_i32:
1340 ; RV32XTHEADBB: # %bb.0:
1341 ; RV32XTHEADBB-NEXT: th.ff1 a0, a0
1342 ; RV32XTHEADBB-NEXT: ret
1344 ; RV64XTHEADBB-LABEL: test_ctlz_i32:
1345 ; RV64XTHEADBB: # %bb.0:
1346 ; RV64XTHEADBB-NEXT: not a0, a0
1347 ; RV64XTHEADBB-NEXT: slli a0, a0, 32
1348 ; RV64XTHEADBB-NEXT: th.ff0 a0, a0
1349 ; RV64XTHEADBB-NEXT: ret
1350 %tmp = call i32 @llvm.ctlz.i32(i32 %a, i1 false)
1354 define i64 @test_ctlz_i64(i64 %a) nounwind {
1355 ; RV32I-LABEL: test_ctlz_i64:
1357 ; RV32I-NEXT: addi sp, sp, -32
1358 ; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
1359 ; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
1360 ; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
1361 ; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
1362 ; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
1363 ; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill
1364 ; RV32I-NEXT: sw s5, 4(sp) # 4-byte Folded Spill
1365 ; RV32I-NEXT: sw s6, 0(sp) # 4-byte Folded Spill
1366 ; RV32I-NEXT: mv s0, a1
1367 ; RV32I-NEXT: mv s2, a0
1368 ; RV32I-NEXT: srli a0, a1, 1
1369 ; RV32I-NEXT: or a0, a1, a0
1370 ; RV32I-NEXT: srli a1, a0, 2
1371 ; RV32I-NEXT: or a0, a0, a1
1372 ; RV32I-NEXT: srli a1, a0, 4
1373 ; RV32I-NEXT: or a0, a0, a1
1374 ; RV32I-NEXT: srli a1, a0, 8
1375 ; RV32I-NEXT: or a0, a0, a1
1376 ; RV32I-NEXT: srli a1, a0, 16
1377 ; RV32I-NEXT: or a0, a0, a1
1378 ; RV32I-NEXT: not a0, a0
1379 ; RV32I-NEXT: srli a1, a0, 1
1380 ; RV32I-NEXT: lui a2, 349525
1381 ; RV32I-NEXT: addi s4, a2, 1365
1382 ; RV32I-NEXT: and a1, a1, s4
1383 ; RV32I-NEXT: sub a0, a0, a1
1384 ; RV32I-NEXT: lui a1, 209715
1385 ; RV32I-NEXT: addi s5, a1, 819
1386 ; RV32I-NEXT: and a1, a0, s5
1387 ; RV32I-NEXT: srli a0, a0, 2
1388 ; RV32I-NEXT: and a0, a0, s5
1389 ; RV32I-NEXT: add a0, a1, a0
1390 ; RV32I-NEXT: srli a1, a0, 4
1391 ; RV32I-NEXT: add a0, a0, a1
1392 ; RV32I-NEXT: lui a1, 61681
1393 ; RV32I-NEXT: addi s6, a1, -241
1394 ; RV32I-NEXT: and a0, a0, s6
1395 ; RV32I-NEXT: lui a1, 4112
1396 ; RV32I-NEXT: addi s3, a1, 257
1397 ; RV32I-NEXT: mv a1, s3
1398 ; RV32I-NEXT: call __mulsi3
1399 ; RV32I-NEXT: mv s1, a0
1400 ; RV32I-NEXT: srli a0, s2, 1
1401 ; RV32I-NEXT: or a0, s2, a0
1402 ; RV32I-NEXT: srli a1, a0, 2
1403 ; RV32I-NEXT: or a0, a0, a1
1404 ; RV32I-NEXT: srli a1, a0, 4
1405 ; RV32I-NEXT: or a0, a0, a1
1406 ; RV32I-NEXT: srli a1, a0, 8
1407 ; RV32I-NEXT: or a0, a0, a1
1408 ; RV32I-NEXT: srli a1, a0, 16
1409 ; RV32I-NEXT: or a0, a0, a1
1410 ; RV32I-NEXT: not a0, a0
1411 ; RV32I-NEXT: srli a1, a0, 1
1412 ; RV32I-NEXT: and a1, a1, s4
1413 ; RV32I-NEXT: sub a0, a0, a1
1414 ; RV32I-NEXT: and a1, a0, s5
1415 ; RV32I-NEXT: srli a0, a0, 2
1416 ; RV32I-NEXT: and a0, a0, s5
1417 ; RV32I-NEXT: add a0, a1, a0
1418 ; RV32I-NEXT: srli a1, a0, 4
1419 ; RV32I-NEXT: add a0, a0, a1
1420 ; RV32I-NEXT: and a0, a0, s6
1421 ; RV32I-NEXT: mv a1, s3
1422 ; RV32I-NEXT: call __mulsi3
1423 ; RV32I-NEXT: bnez s0, .LBB11_2
1424 ; RV32I-NEXT: # %bb.1:
1425 ; RV32I-NEXT: srli a0, a0, 24
1426 ; RV32I-NEXT: addi a0, a0, 32
1427 ; RV32I-NEXT: j .LBB11_3
1428 ; RV32I-NEXT: .LBB11_2:
1429 ; RV32I-NEXT: srli a0, s1, 24
1430 ; RV32I-NEXT: .LBB11_3:
1431 ; RV32I-NEXT: li a1, 0
1432 ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
1433 ; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
1434 ; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
1435 ; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
1436 ; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
1437 ; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
1438 ; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
1439 ; RV32I-NEXT: lw s6, 0(sp) # 4-byte Folded Reload
1440 ; RV32I-NEXT: addi sp, sp, 32
1443 ; RV64I-LABEL: test_ctlz_i64:
1445 ; RV64I-NEXT: beqz a0, .LBB11_2
1446 ; RV64I-NEXT: # %bb.1: # %cond.false
1447 ; RV64I-NEXT: addi sp, sp, -16
1448 ; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
1449 ; RV64I-NEXT: srli a1, a0, 1
1450 ; RV64I-NEXT: or a0, a0, a1
1451 ; RV64I-NEXT: srli a1, a0, 2
1452 ; RV64I-NEXT: or a0, a0, a1
1453 ; RV64I-NEXT: srli a1, a0, 4
1454 ; RV64I-NEXT: or a0, a0, a1
1455 ; RV64I-NEXT: srli a1, a0, 8
1456 ; RV64I-NEXT: or a0, a0, a1
1457 ; RV64I-NEXT: srli a1, a0, 16
1458 ; RV64I-NEXT: or a0, a0, a1
1459 ; RV64I-NEXT: srli a1, a0, 32
1460 ; RV64I-NEXT: or a0, a0, a1
1461 ; RV64I-NEXT: not a0, a0
1462 ; RV64I-NEXT: srli a1, a0, 1
1463 ; RV64I-NEXT: lui a2, 349525
1464 ; RV64I-NEXT: addiw a2, a2, 1365
1465 ; RV64I-NEXT: slli a3, a2, 32
1466 ; RV64I-NEXT: add a2, a2, a3
1467 ; RV64I-NEXT: and a1, a1, a2
1468 ; RV64I-NEXT: sub a0, a0, a1
1469 ; RV64I-NEXT: lui a1, 209715
1470 ; RV64I-NEXT: addiw a1, a1, 819
1471 ; RV64I-NEXT: slli a2, a1, 32
1472 ; RV64I-NEXT: add a1, a1, a2
1473 ; RV64I-NEXT: and a2, a0, a1
1474 ; RV64I-NEXT: srli a0, a0, 2
1475 ; RV64I-NEXT: and a0, a0, a1
1476 ; RV64I-NEXT: add a0, a2, a0
1477 ; RV64I-NEXT: srli a1, a0, 4
1478 ; RV64I-NEXT: add a0, a0, a1
1479 ; RV64I-NEXT: lui a1, 61681
1480 ; RV64I-NEXT: addiw a1, a1, -241
1481 ; RV64I-NEXT: slli a2, a1, 32
1482 ; RV64I-NEXT: add a1, a1, a2
1483 ; RV64I-NEXT: and a0, a0, a1
1484 ; RV64I-NEXT: lui a1, 4112
1485 ; RV64I-NEXT: addiw a1, a1, 257
1486 ; RV64I-NEXT: slli a2, a1, 32
1487 ; RV64I-NEXT: add a1, a1, a2
1488 ; RV64I-NEXT: call __muldi3
1489 ; RV64I-NEXT: srli a0, a0, 56
1490 ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
1491 ; RV64I-NEXT: addi sp, sp, 16
1493 ; RV64I-NEXT: .LBB11_2:
1494 ; RV64I-NEXT: li a0, 64
1497 ; RV32M-LABEL: test_ctlz_i64:
1499 ; RV32M-NEXT: lui a2, 349525
1500 ; RV32M-NEXT: addi a5, a2, 1365
1501 ; RV32M-NEXT: lui a2, 209715
1502 ; RV32M-NEXT: addi a4, a2, 819
1503 ; RV32M-NEXT: lui a2, 61681
1504 ; RV32M-NEXT: addi a2, a2, -241
1505 ; RV32M-NEXT: lui a3, 4112
1506 ; RV32M-NEXT: addi a3, a3, 257
1507 ; RV32M-NEXT: bnez a1, .LBB11_2
1508 ; RV32M-NEXT: # %bb.1:
1509 ; RV32M-NEXT: srli a1, a0, 1
1510 ; RV32M-NEXT: or a0, a0, a1
1511 ; RV32M-NEXT: srli a1, a0, 2
1512 ; RV32M-NEXT: or a0, a0, a1
1513 ; RV32M-NEXT: srli a1, a0, 4
1514 ; RV32M-NEXT: or a0, a0, a1
1515 ; RV32M-NEXT: srli a1, a0, 8
1516 ; RV32M-NEXT: or a0, a0, a1
1517 ; RV32M-NEXT: srli a1, a0, 16
1518 ; RV32M-NEXT: or a0, a0, a1
1519 ; RV32M-NEXT: not a0, a0
1520 ; RV32M-NEXT: srli a1, a0, 1
1521 ; RV32M-NEXT: and a1, a1, a5
1522 ; RV32M-NEXT: sub a0, a0, a1
1523 ; RV32M-NEXT: and a1, a0, a4
1524 ; RV32M-NEXT: srli a0, a0, 2
1525 ; RV32M-NEXT: and a0, a0, a4
1526 ; RV32M-NEXT: add a0, a1, a0
1527 ; RV32M-NEXT: srli a1, a0, 4
1528 ; RV32M-NEXT: add a0, a0, a1
1529 ; RV32M-NEXT: and a0, a0, a2
1530 ; RV32M-NEXT: mul a0, a0, a3
1531 ; RV32M-NEXT: srli a0, a0, 24
1532 ; RV32M-NEXT: addi a0, a0, 32
1533 ; RV32M-NEXT: li a1, 0
1535 ; RV32M-NEXT: .LBB11_2:
1536 ; RV32M-NEXT: srli a0, a1, 1
1537 ; RV32M-NEXT: or a0, a1, a0
1538 ; RV32M-NEXT: srli a1, a0, 2
1539 ; RV32M-NEXT: or a0, a0, a1
1540 ; RV32M-NEXT: srli a1, a0, 4
1541 ; RV32M-NEXT: or a0, a0, a1
1542 ; RV32M-NEXT: srli a1, a0, 8
1543 ; RV32M-NEXT: or a0, a0, a1
1544 ; RV32M-NEXT: srli a1, a0, 16
1545 ; RV32M-NEXT: or a0, a0, a1
1546 ; RV32M-NEXT: not a0, a0
1547 ; RV32M-NEXT: srli a1, a0, 1
1548 ; RV32M-NEXT: and a1, a1, a5
1549 ; RV32M-NEXT: sub a0, a0, a1
1550 ; RV32M-NEXT: and a1, a0, a4
1551 ; RV32M-NEXT: srli a0, a0, 2
1552 ; RV32M-NEXT: and a0, a0, a4
1553 ; RV32M-NEXT: add a0, a1, a0
1554 ; RV32M-NEXT: srli a1, a0, 4
1555 ; RV32M-NEXT: add a0, a0, a1
1556 ; RV32M-NEXT: and a0, a0, a2
1557 ; RV32M-NEXT: mul a0, a0, a3
1558 ; RV32M-NEXT: srli a0, a0, 24
1559 ; RV32M-NEXT: li a1, 0
1562 ; RV64M-LABEL: test_ctlz_i64:
1564 ; RV64M-NEXT: beqz a0, .LBB11_2
1565 ; RV64M-NEXT: # %bb.1: # %cond.false
1566 ; RV64M-NEXT: srli a1, a0, 1
1567 ; RV64M-NEXT: or a0, a0, a1
1568 ; RV64M-NEXT: srli a1, a0, 2
1569 ; RV64M-NEXT: or a0, a0, a1
1570 ; RV64M-NEXT: srli a1, a0, 4
1571 ; RV64M-NEXT: or a0, a0, a1
1572 ; RV64M-NEXT: srli a1, a0, 8
1573 ; RV64M-NEXT: or a0, a0, a1
1574 ; RV64M-NEXT: srli a1, a0, 16
1575 ; RV64M-NEXT: or a0, a0, a1
1576 ; RV64M-NEXT: srli a1, a0, 32
1577 ; RV64M-NEXT: or a0, a0, a1
1578 ; RV64M-NEXT: not a0, a0
1579 ; RV64M-NEXT: srli a1, a0, 1
1580 ; RV64M-NEXT: lui a2, 349525
1581 ; RV64M-NEXT: addiw a2, a2, 1365
1582 ; RV64M-NEXT: slli a3, a2, 32
1583 ; RV64M-NEXT: add a2, a2, a3
1584 ; RV64M-NEXT: and a1, a1, a2
1585 ; RV64M-NEXT: sub a0, a0, a1
1586 ; RV64M-NEXT: lui a1, 209715
1587 ; RV64M-NEXT: addiw a1, a1, 819
1588 ; RV64M-NEXT: slli a2, a1, 32
1589 ; RV64M-NEXT: add a1, a1, a2
1590 ; RV64M-NEXT: and a2, a0, a1
1591 ; RV64M-NEXT: srli a0, a0, 2
1592 ; RV64M-NEXT: and a0, a0, a1
1593 ; RV64M-NEXT: add a0, a2, a0
1594 ; RV64M-NEXT: srli a1, a0, 4
1595 ; RV64M-NEXT: add a0, a0, a1
1596 ; RV64M-NEXT: lui a1, 61681
1597 ; RV64M-NEXT: addiw a1, a1, -241
1598 ; RV64M-NEXT: slli a2, a1, 32
1599 ; RV64M-NEXT: add a1, a1, a2
1600 ; RV64M-NEXT: and a0, a0, a1
1601 ; RV64M-NEXT: lui a1, 4112
1602 ; RV64M-NEXT: addiw a1, a1, 257
1603 ; RV64M-NEXT: slli a2, a1, 32
1604 ; RV64M-NEXT: add a1, a1, a2
1605 ; RV64M-NEXT: mul a0, a0, a1
1606 ; RV64M-NEXT: srli a0, a0, 56
1608 ; RV64M-NEXT: .LBB11_2:
1609 ; RV64M-NEXT: li a0, 64
1612 ; RV32ZBB-LABEL: test_ctlz_i64:
1614 ; RV32ZBB-NEXT: bnez a1, .LBB11_2
1615 ; RV32ZBB-NEXT: # %bb.1:
1616 ; RV32ZBB-NEXT: clz a0, a0
1617 ; RV32ZBB-NEXT: addi a0, a0, 32
1618 ; RV32ZBB-NEXT: li a1, 0
1620 ; RV32ZBB-NEXT: .LBB11_2:
1621 ; RV32ZBB-NEXT: clz a0, a1
1622 ; RV32ZBB-NEXT: li a1, 0
1625 ; RV64ZBB-LABEL: test_ctlz_i64:
1627 ; RV64ZBB-NEXT: clz a0, a0
1630 ; RV32XTHEADBB-LABEL: test_ctlz_i64:
1631 ; RV32XTHEADBB: # %bb.0:
1632 ; RV32XTHEADBB-NEXT: bnez a1, .LBB11_2
1633 ; RV32XTHEADBB-NEXT: # %bb.1:
1634 ; RV32XTHEADBB-NEXT: th.ff1 a0, a0
1635 ; RV32XTHEADBB-NEXT: addi a0, a0, 32
1636 ; RV32XTHEADBB-NEXT: li a1, 0
1637 ; RV32XTHEADBB-NEXT: ret
1638 ; RV32XTHEADBB-NEXT: .LBB11_2:
1639 ; RV32XTHEADBB-NEXT: th.ff1 a0, a1
1640 ; RV32XTHEADBB-NEXT: li a1, 0
1641 ; RV32XTHEADBB-NEXT: ret
1643 ; RV64XTHEADBB-LABEL: test_ctlz_i64:
1644 ; RV64XTHEADBB: # %bb.0:
1645 ; RV64XTHEADBB-NEXT: th.ff1 a0, a0
1646 ; RV64XTHEADBB-NEXT: ret
1647 %tmp = call i64 @llvm.ctlz.i64(i64 %a, i1 false)
1651 define i8 @test_ctlz_i8_zero_undef(i8 %a) nounwind {
1652 ; RV32_NOZBB-LABEL: test_ctlz_i8_zero_undef:
1653 ; RV32_NOZBB: # %bb.0:
1654 ; RV32_NOZBB-NEXT: slli a1, a0, 24
1655 ; RV32_NOZBB-NEXT: srli a1, a1, 25
1656 ; RV32_NOZBB-NEXT: or a0, a0, a1
1657 ; RV32_NOZBB-NEXT: slli a1, a0, 24
1658 ; RV32_NOZBB-NEXT: srli a1, a1, 26
1659 ; RV32_NOZBB-NEXT: or a0, a0, a1
1660 ; RV32_NOZBB-NEXT: slli a1, a0, 24
1661 ; RV32_NOZBB-NEXT: srli a1, a1, 28
1662 ; RV32_NOZBB-NEXT: or a0, a0, a1
1663 ; RV32_NOZBB-NEXT: not a0, a0
1664 ; RV32_NOZBB-NEXT: srli a1, a0, 1
1665 ; RV32_NOZBB-NEXT: andi a1, a1, 85
1666 ; RV32_NOZBB-NEXT: sub a0, a0, a1
1667 ; RV32_NOZBB-NEXT: andi a1, a0, 51
1668 ; RV32_NOZBB-NEXT: srli a0, a0, 2
1669 ; RV32_NOZBB-NEXT: andi a0, a0, 51
1670 ; RV32_NOZBB-NEXT: add a0, a1, a0
1671 ; RV32_NOZBB-NEXT: srli a1, a0, 4
1672 ; RV32_NOZBB-NEXT: add a0, a0, a1
1673 ; RV32_NOZBB-NEXT: andi a0, a0, 15
1674 ; RV32_NOZBB-NEXT: ret
1676 ; RV64NOZBB-LABEL: test_ctlz_i8_zero_undef:
1677 ; RV64NOZBB: # %bb.0:
1678 ; RV64NOZBB-NEXT: slli a1, a0, 56
1679 ; RV64NOZBB-NEXT: srli a1, a1, 57
1680 ; RV64NOZBB-NEXT: or a0, a0, a1
1681 ; RV64NOZBB-NEXT: slli a1, a0, 56
1682 ; RV64NOZBB-NEXT: srli a1, a1, 58
1683 ; RV64NOZBB-NEXT: or a0, a0, a1
1684 ; RV64NOZBB-NEXT: slli a1, a0, 56
1685 ; RV64NOZBB-NEXT: srli a1, a1, 60
1686 ; RV64NOZBB-NEXT: or a0, a0, a1
1687 ; RV64NOZBB-NEXT: not a0, a0
1688 ; RV64NOZBB-NEXT: srli a1, a0, 1
1689 ; RV64NOZBB-NEXT: andi a1, a1, 85
1690 ; RV64NOZBB-NEXT: subw a0, a0, a1
1691 ; RV64NOZBB-NEXT: andi a1, a0, 51
1692 ; RV64NOZBB-NEXT: srli a0, a0, 2
1693 ; RV64NOZBB-NEXT: andi a0, a0, 51
1694 ; RV64NOZBB-NEXT: add a0, a1, a0
1695 ; RV64NOZBB-NEXT: srli a1, a0, 4
1696 ; RV64NOZBB-NEXT: add a0, a0, a1
1697 ; RV64NOZBB-NEXT: andi a0, a0, 15
1698 ; RV64NOZBB-NEXT: ret
1700 ; RV32ZBB-LABEL: test_ctlz_i8_zero_undef:
1702 ; RV32ZBB-NEXT: andi a0, a0, 255
1703 ; RV32ZBB-NEXT: clz a0, a0
1704 ; RV32ZBB-NEXT: addi a0, a0, -24
1707 ; RV64ZBB-LABEL: test_ctlz_i8_zero_undef:
1709 ; RV64ZBB-NEXT: andi a0, a0, 255
1710 ; RV64ZBB-NEXT: clz a0, a0
1711 ; RV64ZBB-NEXT: addi a0, a0, -56
1714 ; RV32XTHEADBB-LABEL: test_ctlz_i8_zero_undef:
1715 ; RV32XTHEADBB: # %bb.0:
1716 ; RV32XTHEADBB-NEXT: andi a0, a0, 255
1717 ; RV32XTHEADBB-NEXT: th.ff1 a0, a0
1718 ; RV32XTHEADBB-NEXT: addi a0, a0, -24
1719 ; RV32XTHEADBB-NEXT: ret
1721 ; RV64XTHEADBB-LABEL: test_ctlz_i8_zero_undef:
1722 ; RV64XTHEADBB: # %bb.0:
1723 ; RV64XTHEADBB-NEXT: andi a0, a0, 255
1724 ; RV64XTHEADBB-NEXT: th.ff1 a0, a0
1725 ; RV64XTHEADBB-NEXT: addi a0, a0, -56
1726 ; RV64XTHEADBB-NEXT: ret
1727 %tmp = call i8 @llvm.ctlz.i8(i8 %a, i1 true)
1731 define i16 @test_ctlz_i16_zero_undef(i16 %a) nounwind {
1732 ; RV32_NOZBB-LABEL: test_ctlz_i16_zero_undef:
1733 ; RV32_NOZBB: # %bb.0:
1734 ; RV32_NOZBB-NEXT: slli a1, a0, 16
1735 ; RV32_NOZBB-NEXT: srli a1, a1, 17
1736 ; RV32_NOZBB-NEXT: or a0, a0, a1
1737 ; RV32_NOZBB-NEXT: slli a1, a0, 16
1738 ; RV32_NOZBB-NEXT: srli a1, a1, 18
1739 ; RV32_NOZBB-NEXT: or a0, a0, a1
1740 ; RV32_NOZBB-NEXT: slli a1, a0, 16
1741 ; RV32_NOZBB-NEXT: srli a1, a1, 20
1742 ; RV32_NOZBB-NEXT: or a0, a0, a1
1743 ; RV32_NOZBB-NEXT: slli a1, a0, 16
1744 ; RV32_NOZBB-NEXT: srli a1, a1, 24
1745 ; RV32_NOZBB-NEXT: or a0, a0, a1
1746 ; RV32_NOZBB-NEXT: not a0, a0
1747 ; RV32_NOZBB-NEXT: srli a1, a0, 1
1748 ; RV32_NOZBB-NEXT: lui a2, 5
1749 ; RV32_NOZBB-NEXT: addi a2, a2, 1365
1750 ; RV32_NOZBB-NEXT: and a1, a1, a2
1751 ; RV32_NOZBB-NEXT: sub a0, a0, a1
1752 ; RV32_NOZBB-NEXT: lui a1, 3
1753 ; RV32_NOZBB-NEXT: addi a1, a1, 819
1754 ; RV32_NOZBB-NEXT: and a2, a0, a1
1755 ; RV32_NOZBB-NEXT: srli a0, a0, 2
1756 ; RV32_NOZBB-NEXT: and a0, a0, a1
1757 ; RV32_NOZBB-NEXT: add a0, a2, a0
1758 ; RV32_NOZBB-NEXT: srli a1, a0, 4
1759 ; RV32_NOZBB-NEXT: add a0, a0, a1
1760 ; RV32_NOZBB-NEXT: andi a1, a0, 15
1761 ; RV32_NOZBB-NEXT: slli a0, a0, 20
1762 ; RV32_NOZBB-NEXT: srli a0, a0, 28
1763 ; RV32_NOZBB-NEXT: add a0, a1, a0
1764 ; RV32_NOZBB-NEXT: ret
1766 ; RV64NOZBB-LABEL: test_ctlz_i16_zero_undef:
1767 ; RV64NOZBB: # %bb.0:
1768 ; RV64NOZBB-NEXT: slli a1, a0, 48
1769 ; RV64NOZBB-NEXT: srli a1, a1, 49
1770 ; RV64NOZBB-NEXT: or a0, a0, a1
1771 ; RV64NOZBB-NEXT: slli a1, a0, 48
1772 ; RV64NOZBB-NEXT: srli a1, a1, 50
1773 ; RV64NOZBB-NEXT: or a0, a0, a1
1774 ; RV64NOZBB-NEXT: slli a1, a0, 48
1775 ; RV64NOZBB-NEXT: srli a1, a1, 52
1776 ; RV64NOZBB-NEXT: or a0, a0, a1
1777 ; RV64NOZBB-NEXT: slli a1, a0, 48
1778 ; RV64NOZBB-NEXT: srli a1, a1, 56
1779 ; RV64NOZBB-NEXT: or a0, a0, a1
1780 ; RV64NOZBB-NEXT: not a0, a0
1781 ; RV64NOZBB-NEXT: srli a1, a0, 1
1782 ; RV64NOZBB-NEXT: lui a2, 5
1783 ; RV64NOZBB-NEXT: addiw a2, a2, 1365
1784 ; RV64NOZBB-NEXT: and a1, a1, a2
1785 ; RV64NOZBB-NEXT: sub a0, a0, a1
1786 ; RV64NOZBB-NEXT: lui a1, 3
1787 ; RV64NOZBB-NEXT: addiw a1, a1, 819
1788 ; RV64NOZBB-NEXT: and a2, a0, a1
1789 ; RV64NOZBB-NEXT: srli a0, a0, 2
1790 ; RV64NOZBB-NEXT: and a0, a0, a1
1791 ; RV64NOZBB-NEXT: add a0, a2, a0
1792 ; RV64NOZBB-NEXT: srli a1, a0, 4
1793 ; RV64NOZBB-NEXT: add a0, a0, a1
1794 ; RV64NOZBB-NEXT: andi a1, a0, 15
1795 ; RV64NOZBB-NEXT: slli a0, a0, 52
1796 ; RV64NOZBB-NEXT: srli a0, a0, 60
1797 ; RV64NOZBB-NEXT: add a0, a1, a0
1798 ; RV64NOZBB-NEXT: ret
1800 ; RV32ZBB-LABEL: test_ctlz_i16_zero_undef:
1802 ; RV32ZBB-NEXT: zext.h a0, a0
1803 ; RV32ZBB-NEXT: clz a0, a0
1804 ; RV32ZBB-NEXT: addi a0, a0, -16
1807 ; RV64ZBB-LABEL: test_ctlz_i16_zero_undef:
1809 ; RV64ZBB-NEXT: zext.h a0, a0
1810 ; RV64ZBB-NEXT: clz a0, a0
1811 ; RV64ZBB-NEXT: addi a0, a0, -48
1814 ; RV32XTHEADBB-LABEL: test_ctlz_i16_zero_undef:
1815 ; RV32XTHEADBB: # %bb.0:
1816 ; RV32XTHEADBB-NEXT: th.extu a0, a0, 15, 0
1817 ; RV32XTHEADBB-NEXT: th.ff1 a0, a0
1818 ; RV32XTHEADBB-NEXT: addi a0, a0, -16
1819 ; RV32XTHEADBB-NEXT: ret
1821 ; RV64XTHEADBB-LABEL: test_ctlz_i16_zero_undef:
1822 ; RV64XTHEADBB: # %bb.0:
1823 ; RV64XTHEADBB-NEXT: th.extu a0, a0, 15, 0
1824 ; RV64XTHEADBB-NEXT: th.ff1 a0, a0
1825 ; RV64XTHEADBB-NEXT: addi a0, a0, -48
1826 ; RV64XTHEADBB-NEXT: ret
1827 %tmp = call i16 @llvm.ctlz.i16(i16 %a, i1 true)
1831 define i32 @test_ctlz_i32_zero_undef(i32 %a) nounwind {
1832 ; RV32I-LABEL: test_ctlz_i32_zero_undef:
1834 ; RV32I-NEXT: addi sp, sp, -16
1835 ; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
1836 ; RV32I-NEXT: srli a1, a0, 1
1837 ; RV32I-NEXT: or a0, a0, a1
1838 ; RV32I-NEXT: srli a1, a0, 2
1839 ; RV32I-NEXT: or a0, a0, a1
1840 ; RV32I-NEXT: srli a1, a0, 4
1841 ; RV32I-NEXT: or a0, a0, a1
1842 ; RV32I-NEXT: srli a1, a0, 8
1843 ; RV32I-NEXT: or a0, a0, a1
1844 ; RV32I-NEXT: srli a1, a0, 16
1845 ; RV32I-NEXT: or a0, a0, a1
1846 ; RV32I-NEXT: not a0, a0
1847 ; RV32I-NEXT: srli a1, a0, 1
1848 ; RV32I-NEXT: lui a2, 349525
1849 ; RV32I-NEXT: addi a2, a2, 1365
1850 ; RV32I-NEXT: and a1, a1, a2
1851 ; RV32I-NEXT: sub a0, a0, a1
1852 ; RV32I-NEXT: lui a1, 209715
1853 ; RV32I-NEXT: addi a1, a1, 819
1854 ; RV32I-NEXT: and a2, a0, a1
1855 ; RV32I-NEXT: srli a0, a0, 2
1856 ; RV32I-NEXT: and a0, a0, a1
1857 ; RV32I-NEXT: add a0, a2, a0
1858 ; RV32I-NEXT: srli a1, a0, 4
1859 ; RV32I-NEXT: add a0, a0, a1
1860 ; RV32I-NEXT: lui a1, 61681
1861 ; RV32I-NEXT: addi a1, a1, -241
1862 ; RV32I-NEXT: and a0, a0, a1
1863 ; RV32I-NEXT: lui a1, 4112
1864 ; RV32I-NEXT: addi a1, a1, 257
1865 ; RV32I-NEXT: call __mulsi3
1866 ; RV32I-NEXT: srli a0, a0, 24
1867 ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
1868 ; RV32I-NEXT: addi sp, sp, 16
1871 ; RV64I-LABEL: test_ctlz_i32_zero_undef:
1873 ; RV64I-NEXT: addi sp, sp, -16
1874 ; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
1875 ; RV64I-NEXT: srliw a1, a0, 1
1876 ; RV64I-NEXT: or a0, a0, a1
1877 ; RV64I-NEXT: srliw a1, a0, 2
1878 ; RV64I-NEXT: or a0, a0, a1
1879 ; RV64I-NEXT: srliw a1, a0, 4
1880 ; RV64I-NEXT: or a0, a0, a1
1881 ; RV64I-NEXT: srliw a1, a0, 8
1882 ; RV64I-NEXT: or a0, a0, a1
1883 ; RV64I-NEXT: srliw a1, a0, 16
1884 ; RV64I-NEXT: or a0, a0, a1
1885 ; RV64I-NEXT: not a0, a0
1886 ; RV64I-NEXT: srli a1, a0, 1
1887 ; RV64I-NEXT: lui a2, 349525
1888 ; RV64I-NEXT: addiw a2, a2, 1365
1889 ; RV64I-NEXT: and a1, a1, a2
1890 ; RV64I-NEXT: sub a0, a0, a1
1891 ; RV64I-NEXT: lui a1, 209715
1892 ; RV64I-NEXT: addiw a1, a1, 819
1893 ; RV64I-NEXT: and a2, a0, a1
1894 ; RV64I-NEXT: srli a0, a0, 2
1895 ; RV64I-NEXT: and a0, a0, a1
1896 ; RV64I-NEXT: add a0, a2, a0
1897 ; RV64I-NEXT: srli a1, a0, 4
1898 ; RV64I-NEXT: add a0, a0, a1
1899 ; RV64I-NEXT: lui a1, 61681
1900 ; RV64I-NEXT: addiw a1, a1, -241
1901 ; RV64I-NEXT: and a0, a0, a1
1902 ; RV64I-NEXT: lui a1, 4112
1903 ; RV64I-NEXT: addiw a1, a1, 257
1904 ; RV64I-NEXT: call __muldi3
1905 ; RV64I-NEXT: srliw a0, a0, 24
1906 ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
1907 ; RV64I-NEXT: addi sp, sp, 16
1910 ; RV32M-LABEL: test_ctlz_i32_zero_undef:
1912 ; RV32M-NEXT: srli a1, a0, 1
1913 ; RV32M-NEXT: or a0, a0, a1
1914 ; RV32M-NEXT: srli a1, a0, 2
1915 ; RV32M-NEXT: or a0, a0, a1
1916 ; RV32M-NEXT: srli a1, a0, 4
1917 ; RV32M-NEXT: or a0, a0, a1
1918 ; RV32M-NEXT: srli a1, a0, 8
1919 ; RV32M-NEXT: or a0, a0, a1
1920 ; RV32M-NEXT: srli a1, a0, 16
1921 ; RV32M-NEXT: or a0, a0, a1
1922 ; RV32M-NEXT: not a0, a0
1923 ; RV32M-NEXT: srli a1, a0, 1
1924 ; RV32M-NEXT: lui a2, 349525
1925 ; RV32M-NEXT: addi a2, a2, 1365
1926 ; RV32M-NEXT: and a1, a1, a2
1927 ; RV32M-NEXT: sub a0, a0, a1
1928 ; RV32M-NEXT: lui a1, 209715
1929 ; RV32M-NEXT: addi a1, a1, 819
1930 ; RV32M-NEXT: and a2, a0, a1
1931 ; RV32M-NEXT: srli a0, a0, 2
1932 ; RV32M-NEXT: and a0, a0, a1
1933 ; RV32M-NEXT: add a0, a2, a0
1934 ; RV32M-NEXT: srli a1, a0, 4
1935 ; RV32M-NEXT: add a0, a0, a1
1936 ; RV32M-NEXT: lui a1, 61681
1937 ; RV32M-NEXT: addi a1, a1, -241
1938 ; RV32M-NEXT: and a0, a0, a1
1939 ; RV32M-NEXT: lui a1, 4112
1940 ; RV32M-NEXT: addi a1, a1, 257
1941 ; RV32M-NEXT: mul a0, a0, a1
1942 ; RV32M-NEXT: srli a0, a0, 24
1945 ; RV64M-LABEL: test_ctlz_i32_zero_undef:
1947 ; RV64M-NEXT: srliw a1, a0, 1
1948 ; RV64M-NEXT: or a0, a0, a1
1949 ; RV64M-NEXT: srliw a1, a0, 2
1950 ; RV64M-NEXT: or a0, a0, a1
1951 ; RV64M-NEXT: srliw a1, a0, 4
1952 ; RV64M-NEXT: or a0, a0, a1
1953 ; RV64M-NEXT: srliw a1, a0, 8
1954 ; RV64M-NEXT: or a0, a0, a1
1955 ; RV64M-NEXT: srliw a1, a0, 16
1956 ; RV64M-NEXT: or a0, a0, a1
1957 ; RV64M-NEXT: not a0, a0
1958 ; RV64M-NEXT: srli a1, a0, 1
1959 ; RV64M-NEXT: lui a2, 349525
1960 ; RV64M-NEXT: addiw a2, a2, 1365
1961 ; RV64M-NEXT: and a1, a1, a2
1962 ; RV64M-NEXT: sub a0, a0, a1
1963 ; RV64M-NEXT: lui a1, 209715
1964 ; RV64M-NEXT: addiw a1, a1, 819
1965 ; RV64M-NEXT: and a2, a0, a1
1966 ; RV64M-NEXT: srli a0, a0, 2
1967 ; RV64M-NEXT: and a0, a0, a1
1968 ; RV64M-NEXT: add a0, a2, a0
1969 ; RV64M-NEXT: srli a1, a0, 4
1970 ; RV64M-NEXT: add a0, a0, a1
1971 ; RV64M-NEXT: lui a1, 61681
1972 ; RV64M-NEXT: addi a1, a1, -241
1973 ; RV64M-NEXT: and a0, a0, a1
1974 ; RV64M-NEXT: lui a1, 4112
1975 ; RV64M-NEXT: addi a1, a1, 257
1976 ; RV64M-NEXT: mul a0, a0, a1
1977 ; RV64M-NEXT: srliw a0, a0, 24
1980 ; RV32ZBB-LABEL: test_ctlz_i32_zero_undef:
1982 ; RV32ZBB-NEXT: clz a0, a0
1985 ; RV64ZBB-LABEL: test_ctlz_i32_zero_undef:
1987 ; RV64ZBB-NEXT: clzw a0, a0
1990 ; RV32XTHEADBB-LABEL: test_ctlz_i32_zero_undef:
1991 ; RV32XTHEADBB: # %bb.0:
1992 ; RV32XTHEADBB-NEXT: th.ff1 a0, a0
1993 ; RV32XTHEADBB-NEXT: ret
1995 ; RV64XTHEADBB-LABEL: test_ctlz_i32_zero_undef:
1996 ; RV64XTHEADBB: # %bb.0:
1997 ; RV64XTHEADBB-NEXT: not a0, a0
1998 ; RV64XTHEADBB-NEXT: slli a0, a0, 32
1999 ; RV64XTHEADBB-NEXT: th.ff0 a0, a0
2000 ; RV64XTHEADBB-NEXT: ret
2001 %tmp = call i32 @llvm.ctlz.i32(i32 %a, i1 true)
2005 define i64 @test_ctlz_i64_zero_undef(i64 %a) nounwind {
2006 ; RV32I-LABEL: test_ctlz_i64_zero_undef:
2008 ; RV32I-NEXT: addi sp, sp, -32
2009 ; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
2010 ; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
2011 ; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
2012 ; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
2013 ; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
2014 ; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill
2015 ; RV32I-NEXT: sw s5, 4(sp) # 4-byte Folded Spill
2016 ; RV32I-NEXT: sw s6, 0(sp) # 4-byte Folded Spill
2017 ; RV32I-NEXT: mv s0, a1
2018 ; RV32I-NEXT: mv s2, a0
2019 ; RV32I-NEXT: srli a0, a1, 1
2020 ; RV32I-NEXT: or a0, a1, a0
2021 ; RV32I-NEXT: srli a1, a0, 2
2022 ; RV32I-NEXT: or a0, a0, a1
2023 ; RV32I-NEXT: srli a1, a0, 4
2024 ; RV32I-NEXT: or a0, a0, a1
2025 ; RV32I-NEXT: srli a1, a0, 8
2026 ; RV32I-NEXT: or a0, a0, a1
2027 ; RV32I-NEXT: srli a1, a0, 16
2028 ; RV32I-NEXT: or a0, a0, a1
2029 ; RV32I-NEXT: not a0, a0
2030 ; RV32I-NEXT: srli a1, a0, 1
2031 ; RV32I-NEXT: lui a2, 349525
2032 ; RV32I-NEXT: addi s4, a2, 1365
2033 ; RV32I-NEXT: and a1, a1, s4
2034 ; RV32I-NEXT: sub a0, a0, a1
2035 ; RV32I-NEXT: lui a1, 209715
2036 ; RV32I-NEXT: addi s5, a1, 819
2037 ; RV32I-NEXT: and a1, a0, s5
2038 ; RV32I-NEXT: srli a0, a0, 2
2039 ; RV32I-NEXT: and a0, a0, s5
2040 ; RV32I-NEXT: add a0, a1, a0
2041 ; RV32I-NEXT: srli a1, a0, 4
2042 ; RV32I-NEXT: add a0, a0, a1
2043 ; RV32I-NEXT: lui a1, 61681
2044 ; RV32I-NEXT: addi s6, a1, -241
2045 ; RV32I-NEXT: and a0, a0, s6
2046 ; RV32I-NEXT: lui a1, 4112
2047 ; RV32I-NEXT: addi s3, a1, 257
2048 ; RV32I-NEXT: mv a1, s3
2049 ; RV32I-NEXT: call __mulsi3
2050 ; RV32I-NEXT: mv s1, a0
2051 ; RV32I-NEXT: srli a0, s2, 1
2052 ; RV32I-NEXT: or a0, s2, a0
2053 ; RV32I-NEXT: srli a1, a0, 2
2054 ; RV32I-NEXT: or a0, a0, a1
2055 ; RV32I-NEXT: srli a1, a0, 4
2056 ; RV32I-NEXT: or a0, a0, a1
2057 ; RV32I-NEXT: srli a1, a0, 8
2058 ; RV32I-NEXT: or a0, a0, a1
2059 ; RV32I-NEXT: srli a1, a0, 16
2060 ; RV32I-NEXT: or a0, a0, a1
2061 ; RV32I-NEXT: not a0, a0
2062 ; RV32I-NEXT: srli a1, a0, 1
2063 ; RV32I-NEXT: and a1, a1, s4
2064 ; RV32I-NEXT: sub a0, a0, a1
2065 ; RV32I-NEXT: and a1, a0, s5
2066 ; RV32I-NEXT: srli a0, a0, 2
2067 ; RV32I-NEXT: and a0, a0, s5
2068 ; RV32I-NEXT: add a0, a1, a0
2069 ; RV32I-NEXT: srli a1, a0, 4
2070 ; RV32I-NEXT: add a0, a0, a1
2071 ; RV32I-NEXT: and a0, a0, s6
2072 ; RV32I-NEXT: mv a1, s3
2073 ; RV32I-NEXT: call __mulsi3
2074 ; RV32I-NEXT: bnez s0, .LBB15_2
2075 ; RV32I-NEXT: # %bb.1:
2076 ; RV32I-NEXT: srli a0, a0, 24
2077 ; RV32I-NEXT: addi a0, a0, 32
2078 ; RV32I-NEXT: j .LBB15_3
2079 ; RV32I-NEXT: .LBB15_2:
2080 ; RV32I-NEXT: srli a0, s1, 24
2081 ; RV32I-NEXT: .LBB15_3:
2082 ; RV32I-NEXT: li a1, 0
2083 ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
2084 ; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
2085 ; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
2086 ; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
2087 ; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
2088 ; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
2089 ; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
2090 ; RV32I-NEXT: lw s6, 0(sp) # 4-byte Folded Reload
2091 ; RV32I-NEXT: addi sp, sp, 32
2094 ; RV64I-LABEL: test_ctlz_i64_zero_undef:
2096 ; RV64I-NEXT: addi sp, sp, -16
2097 ; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
2098 ; RV64I-NEXT: srli a1, a0, 1
2099 ; RV64I-NEXT: or a0, a0, a1
2100 ; RV64I-NEXT: srli a1, a0, 2
2101 ; RV64I-NEXT: or a0, a0, a1
2102 ; RV64I-NEXT: srli a1, a0, 4
2103 ; RV64I-NEXT: or a0, a0, a1
2104 ; RV64I-NEXT: srli a1, a0, 8
2105 ; RV64I-NEXT: or a0, a0, a1
2106 ; RV64I-NEXT: srli a1, a0, 16
2107 ; RV64I-NEXT: or a0, a0, a1
2108 ; RV64I-NEXT: srli a1, a0, 32
2109 ; RV64I-NEXT: or a0, a0, a1
2110 ; RV64I-NEXT: not a0, a0
2111 ; RV64I-NEXT: srli a1, a0, 1
2112 ; RV64I-NEXT: lui a2, 349525
2113 ; RV64I-NEXT: addiw a2, a2, 1365
2114 ; RV64I-NEXT: slli a3, a2, 32
2115 ; RV64I-NEXT: add a2, a2, a3
2116 ; RV64I-NEXT: and a1, a1, a2
2117 ; RV64I-NEXT: sub a0, a0, a1
2118 ; RV64I-NEXT: lui a1, 209715
2119 ; RV64I-NEXT: addiw a1, a1, 819
2120 ; RV64I-NEXT: slli a2, a1, 32
2121 ; RV64I-NEXT: add a1, a1, a2
2122 ; RV64I-NEXT: and a2, a0, a1
2123 ; RV64I-NEXT: srli a0, a0, 2
2124 ; RV64I-NEXT: and a0, a0, a1
2125 ; RV64I-NEXT: add a0, a2, a0
2126 ; RV64I-NEXT: srli a1, a0, 4
2127 ; RV64I-NEXT: add a0, a0, a1
2128 ; RV64I-NEXT: lui a1, 61681
2129 ; RV64I-NEXT: addiw a1, a1, -241
2130 ; RV64I-NEXT: slli a2, a1, 32
2131 ; RV64I-NEXT: add a1, a1, a2
2132 ; RV64I-NEXT: and a0, a0, a1
2133 ; RV64I-NEXT: lui a1, 4112
2134 ; RV64I-NEXT: addiw a1, a1, 257
2135 ; RV64I-NEXT: slli a2, a1, 32
2136 ; RV64I-NEXT: add a1, a1, a2
2137 ; RV64I-NEXT: call __muldi3
2138 ; RV64I-NEXT: srli a0, a0, 56
2139 ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
2140 ; RV64I-NEXT: addi sp, sp, 16
2143 ; RV32M-LABEL: test_ctlz_i64_zero_undef:
2145 ; RV32M-NEXT: lui a2, 349525
2146 ; RV32M-NEXT: addi a5, a2, 1365
2147 ; RV32M-NEXT: lui a2, 209715
2148 ; RV32M-NEXT: addi a4, a2, 819
2149 ; RV32M-NEXT: lui a2, 61681
2150 ; RV32M-NEXT: addi a2, a2, -241
2151 ; RV32M-NEXT: lui a3, 4112
2152 ; RV32M-NEXT: addi a3, a3, 257
2153 ; RV32M-NEXT: bnez a1, .LBB15_2
2154 ; RV32M-NEXT: # %bb.1:
2155 ; RV32M-NEXT: srli a1, a0, 1
2156 ; RV32M-NEXT: or a0, a0, a1
2157 ; RV32M-NEXT: srli a1, a0, 2
2158 ; RV32M-NEXT: or a0, a0, a1
2159 ; RV32M-NEXT: srli a1, a0, 4
2160 ; RV32M-NEXT: or a0, a0, a1
2161 ; RV32M-NEXT: srli a1, a0, 8
2162 ; RV32M-NEXT: or a0, a0, a1
2163 ; RV32M-NEXT: srli a1, a0, 16
2164 ; RV32M-NEXT: or a0, a0, a1
2165 ; RV32M-NEXT: not a0, a0
2166 ; RV32M-NEXT: srli a1, a0, 1
2167 ; RV32M-NEXT: and a1, a1, a5
2168 ; RV32M-NEXT: sub a0, a0, a1
2169 ; RV32M-NEXT: and a1, a0, a4
2170 ; RV32M-NEXT: srli a0, a0, 2
2171 ; RV32M-NEXT: and a0, a0, a4
2172 ; RV32M-NEXT: add a0, a1, a0
2173 ; RV32M-NEXT: srli a1, a0, 4
2174 ; RV32M-NEXT: add a0, a0, a1
2175 ; RV32M-NEXT: and a0, a0, a2
2176 ; RV32M-NEXT: mul a0, a0, a3
2177 ; RV32M-NEXT: srli a0, a0, 24
2178 ; RV32M-NEXT: addi a0, a0, 32
2179 ; RV32M-NEXT: li a1, 0
2181 ; RV32M-NEXT: .LBB15_2:
2182 ; RV32M-NEXT: srli a0, a1, 1
2183 ; RV32M-NEXT: or a0, a1, a0
2184 ; RV32M-NEXT: srli a1, a0, 2
2185 ; RV32M-NEXT: or a0, a0, a1
2186 ; RV32M-NEXT: srli a1, a0, 4
2187 ; RV32M-NEXT: or a0, a0, a1
2188 ; RV32M-NEXT: srli a1, a0, 8
2189 ; RV32M-NEXT: or a0, a0, a1
2190 ; RV32M-NEXT: srli a1, a0, 16
2191 ; RV32M-NEXT: or a0, a0, a1
2192 ; RV32M-NEXT: not a0, a0
2193 ; RV32M-NEXT: srli a1, a0, 1
2194 ; RV32M-NEXT: and a1, a1, a5
2195 ; RV32M-NEXT: sub a0, a0, a1
2196 ; RV32M-NEXT: and a1, a0, a4
2197 ; RV32M-NEXT: srli a0, a0, 2
2198 ; RV32M-NEXT: and a0, a0, a4
2199 ; RV32M-NEXT: add a0, a1, a0
2200 ; RV32M-NEXT: srli a1, a0, 4
2201 ; RV32M-NEXT: add a0, a0, a1
2202 ; RV32M-NEXT: and a0, a0, a2
2203 ; RV32M-NEXT: mul a0, a0, a3
2204 ; RV32M-NEXT: srli a0, a0, 24
2205 ; RV32M-NEXT: li a1, 0
2208 ; RV64M-LABEL: test_ctlz_i64_zero_undef:
2210 ; RV64M-NEXT: srli a1, a0, 1
2211 ; RV64M-NEXT: or a0, a0, a1
2212 ; RV64M-NEXT: srli a1, a0, 2
2213 ; RV64M-NEXT: or a0, a0, a1
2214 ; RV64M-NEXT: srli a1, a0, 4
2215 ; RV64M-NEXT: or a0, a0, a1
2216 ; RV64M-NEXT: srli a1, a0, 8
2217 ; RV64M-NEXT: or a0, a0, a1
2218 ; RV64M-NEXT: srli a1, a0, 16
2219 ; RV64M-NEXT: or a0, a0, a1
2220 ; RV64M-NEXT: srli a1, a0, 32
2221 ; RV64M-NEXT: or a0, a0, a1
2222 ; RV64M-NEXT: not a0, a0
2223 ; RV64M-NEXT: srli a1, a0, 1
2224 ; RV64M-NEXT: lui a2, 349525
2225 ; RV64M-NEXT: addiw a2, a2, 1365
2226 ; RV64M-NEXT: slli a3, a2, 32
2227 ; RV64M-NEXT: add a2, a2, a3
2228 ; RV64M-NEXT: and a1, a1, a2
2229 ; RV64M-NEXT: sub a0, a0, a1
2230 ; RV64M-NEXT: lui a1, 209715
2231 ; RV64M-NEXT: addiw a1, a1, 819
2232 ; RV64M-NEXT: slli a2, a1, 32
2233 ; RV64M-NEXT: add a1, a1, a2
2234 ; RV64M-NEXT: and a2, a0, a1
2235 ; RV64M-NEXT: srli a0, a0, 2
2236 ; RV64M-NEXT: and a0, a0, a1
2237 ; RV64M-NEXT: add a0, a2, a0
2238 ; RV64M-NEXT: srli a1, a0, 4
2239 ; RV64M-NEXT: add a0, a0, a1
2240 ; RV64M-NEXT: lui a1, 61681
2241 ; RV64M-NEXT: addiw a1, a1, -241
2242 ; RV64M-NEXT: slli a2, a1, 32
2243 ; RV64M-NEXT: add a1, a1, a2
2244 ; RV64M-NEXT: and a0, a0, a1
2245 ; RV64M-NEXT: lui a1, 4112
2246 ; RV64M-NEXT: addiw a1, a1, 257
2247 ; RV64M-NEXT: slli a2, a1, 32
2248 ; RV64M-NEXT: add a1, a1, a2
2249 ; RV64M-NEXT: mul a0, a0, a1
2250 ; RV64M-NEXT: srli a0, a0, 56
2253 ; RV32ZBB-LABEL: test_ctlz_i64_zero_undef:
2255 ; RV32ZBB-NEXT: bnez a1, .LBB15_2
2256 ; RV32ZBB-NEXT: # %bb.1:
2257 ; RV32ZBB-NEXT: clz a0, a0
2258 ; RV32ZBB-NEXT: addi a0, a0, 32
2259 ; RV32ZBB-NEXT: li a1, 0
2261 ; RV32ZBB-NEXT: .LBB15_2:
2262 ; RV32ZBB-NEXT: clz a0, a1
2263 ; RV32ZBB-NEXT: li a1, 0
2266 ; RV64ZBB-LABEL: test_ctlz_i64_zero_undef:
2268 ; RV64ZBB-NEXT: clz a0, a0
2271 ; RV32XTHEADBB-LABEL: test_ctlz_i64_zero_undef:
2272 ; RV32XTHEADBB: # %bb.0:
2273 ; RV32XTHEADBB-NEXT: bnez a1, .LBB15_2
2274 ; RV32XTHEADBB-NEXT: # %bb.1:
2275 ; RV32XTHEADBB-NEXT: th.ff1 a0, a0
2276 ; RV32XTHEADBB-NEXT: addi a0, a0, 32
2277 ; RV32XTHEADBB-NEXT: li a1, 0
2278 ; RV32XTHEADBB-NEXT: ret
2279 ; RV32XTHEADBB-NEXT: .LBB15_2:
2280 ; RV32XTHEADBB-NEXT: th.ff1 a0, a1
2281 ; RV32XTHEADBB-NEXT: li a1, 0
2282 ; RV32XTHEADBB-NEXT: ret
2284 ; RV64XTHEADBB-LABEL: test_ctlz_i64_zero_undef:
2285 ; RV64XTHEADBB: # %bb.0:
2286 ; RV64XTHEADBB-NEXT: th.ff1 a0, a0
2287 ; RV64XTHEADBB-NEXT: ret
2288 %tmp = call i64 @llvm.ctlz.i64(i64 %a, i1 true)
2292 define i8 @test_ctpop_i8(i8 %a) nounwind {
2293 ; RV32_NOZBB-LABEL: test_ctpop_i8:
2294 ; RV32_NOZBB: # %bb.0:
2295 ; RV32_NOZBB-NEXT: srli a1, a0, 1
2296 ; RV32_NOZBB-NEXT: andi a1, a1, 85
2297 ; RV32_NOZBB-NEXT: sub a0, a0, a1
2298 ; RV32_NOZBB-NEXT: andi a1, a0, 51
2299 ; RV32_NOZBB-NEXT: srli a0, a0, 2
2300 ; RV32_NOZBB-NEXT: andi a0, a0, 51
2301 ; RV32_NOZBB-NEXT: add a0, a1, a0
2302 ; RV32_NOZBB-NEXT: srli a1, a0, 4
2303 ; RV32_NOZBB-NEXT: add a0, a0, a1
2304 ; RV32_NOZBB-NEXT: andi a0, a0, 15
2305 ; RV32_NOZBB-NEXT: ret
2307 ; RV64NOZBB-LABEL: test_ctpop_i8:
2308 ; RV64NOZBB: # %bb.0:
2309 ; RV64NOZBB-NEXT: srli a1, a0, 1
2310 ; RV64NOZBB-NEXT: andi a1, a1, 85
2311 ; RV64NOZBB-NEXT: subw a0, a0, a1
2312 ; RV64NOZBB-NEXT: andi a1, a0, 51
2313 ; RV64NOZBB-NEXT: srli a0, a0, 2
2314 ; RV64NOZBB-NEXT: andi a0, a0, 51
2315 ; RV64NOZBB-NEXT: add a0, a1, a0
2316 ; RV64NOZBB-NEXT: srli a1, a0, 4
2317 ; RV64NOZBB-NEXT: add a0, a0, a1
2318 ; RV64NOZBB-NEXT: andi a0, a0, 15
2319 ; RV64NOZBB-NEXT: ret
2321 ; RV32ZBB-LABEL: test_ctpop_i8:
2323 ; RV32ZBB-NEXT: andi a0, a0, 255
2324 ; RV32ZBB-NEXT: cpop a0, a0
2327 ; RV64ZBB-LABEL: test_ctpop_i8:
2329 ; RV64ZBB-NEXT: andi a0, a0, 255
2330 ; RV64ZBB-NEXT: cpopw a0, a0
2333 ; RV32XTHEADBB-LABEL: test_ctpop_i8:
2334 ; RV32XTHEADBB: # %bb.0:
2335 ; RV32XTHEADBB-NEXT: srli a1, a0, 1
2336 ; RV32XTHEADBB-NEXT: andi a1, a1, 85
2337 ; RV32XTHEADBB-NEXT: sub a0, a0, a1
2338 ; RV32XTHEADBB-NEXT: andi a1, a0, 51
2339 ; RV32XTHEADBB-NEXT: srli a0, a0, 2
2340 ; RV32XTHEADBB-NEXT: andi a0, a0, 51
2341 ; RV32XTHEADBB-NEXT: add a0, a1, a0
2342 ; RV32XTHEADBB-NEXT: srli a1, a0, 4
2343 ; RV32XTHEADBB-NEXT: add a0, a0, a1
2344 ; RV32XTHEADBB-NEXT: andi a0, a0, 15
2345 ; RV32XTHEADBB-NEXT: ret
2347 ; RV64XTHEADBB-LABEL: test_ctpop_i8:
2348 ; RV64XTHEADBB: # %bb.0:
2349 ; RV64XTHEADBB-NEXT: srli a1, a0, 1
2350 ; RV64XTHEADBB-NEXT: andi a1, a1, 85
2351 ; RV64XTHEADBB-NEXT: subw a0, a0, a1
2352 ; RV64XTHEADBB-NEXT: andi a1, a0, 51
2353 ; RV64XTHEADBB-NEXT: srli a0, a0, 2
2354 ; RV64XTHEADBB-NEXT: andi a0, a0, 51
2355 ; RV64XTHEADBB-NEXT: add a0, a1, a0
2356 ; RV64XTHEADBB-NEXT: srli a1, a0, 4
2357 ; RV64XTHEADBB-NEXT: add a0, a0, a1
2358 ; RV64XTHEADBB-NEXT: andi a0, a0, 15
2359 ; RV64XTHEADBB-NEXT: ret
2360 %1 = call i8 @llvm.ctpop.i8(i8 %a)
2364 define i16 @test_ctpop_i16(i16 %a) nounwind {
2365 ; RV32_NOZBB-LABEL: test_ctpop_i16:
2366 ; RV32_NOZBB: # %bb.0:
2367 ; RV32_NOZBB-NEXT: srli a1, a0, 1
2368 ; RV32_NOZBB-NEXT: lui a2, 5
2369 ; RV32_NOZBB-NEXT: addi a2, a2, 1365
2370 ; RV32_NOZBB-NEXT: and a1, a1, a2
2371 ; RV32_NOZBB-NEXT: sub a0, a0, a1
2372 ; RV32_NOZBB-NEXT: lui a1, 3
2373 ; RV32_NOZBB-NEXT: addi a1, a1, 819
2374 ; RV32_NOZBB-NEXT: and a2, a0, a1
2375 ; RV32_NOZBB-NEXT: srli a0, a0, 2
2376 ; RV32_NOZBB-NEXT: and a0, a0, a1
2377 ; RV32_NOZBB-NEXT: add a0, a2, a0
2378 ; RV32_NOZBB-NEXT: srli a1, a0, 4
2379 ; RV32_NOZBB-NEXT: add a0, a0, a1
2380 ; RV32_NOZBB-NEXT: andi a1, a0, 15
2381 ; RV32_NOZBB-NEXT: slli a0, a0, 20
2382 ; RV32_NOZBB-NEXT: srli a0, a0, 28
2383 ; RV32_NOZBB-NEXT: add a0, a1, a0
2384 ; RV32_NOZBB-NEXT: ret
2386 ; RV64NOZBB-LABEL: test_ctpop_i16:
2387 ; RV64NOZBB: # %bb.0:
2388 ; RV64NOZBB-NEXT: srli a1, a0, 1
2389 ; RV64NOZBB-NEXT: lui a2, 5
2390 ; RV64NOZBB-NEXT: addiw a2, a2, 1365
2391 ; RV64NOZBB-NEXT: and a1, a1, a2
2392 ; RV64NOZBB-NEXT: sub a0, a0, a1
2393 ; RV64NOZBB-NEXT: lui a1, 3
2394 ; RV64NOZBB-NEXT: addiw a1, a1, 819
2395 ; RV64NOZBB-NEXT: and a2, a0, a1
2396 ; RV64NOZBB-NEXT: srli a0, a0, 2
2397 ; RV64NOZBB-NEXT: and a0, a0, a1
2398 ; RV64NOZBB-NEXT: add a0, a2, a0
2399 ; RV64NOZBB-NEXT: srli a1, a0, 4
2400 ; RV64NOZBB-NEXT: add a0, a0, a1
2401 ; RV64NOZBB-NEXT: andi a1, a0, 15
2402 ; RV64NOZBB-NEXT: slli a0, a0, 52
2403 ; RV64NOZBB-NEXT: srli a0, a0, 60
2404 ; RV64NOZBB-NEXT: add a0, a1, a0
2405 ; RV64NOZBB-NEXT: ret
2407 ; RV32ZBB-LABEL: test_ctpop_i16:
2409 ; RV32ZBB-NEXT: zext.h a0, a0
2410 ; RV32ZBB-NEXT: cpop a0, a0
2413 ; RV64ZBB-LABEL: test_ctpop_i16:
2415 ; RV64ZBB-NEXT: zext.h a0, a0
2416 ; RV64ZBB-NEXT: cpopw a0, a0
2419 ; RV32XTHEADBB-LABEL: test_ctpop_i16:
2420 ; RV32XTHEADBB: # %bb.0:
2421 ; RV32XTHEADBB-NEXT: srli a1, a0, 1
2422 ; RV32XTHEADBB-NEXT: lui a2, 5
2423 ; RV32XTHEADBB-NEXT: addi a2, a2, 1365
2424 ; RV32XTHEADBB-NEXT: and a1, a1, a2
2425 ; RV32XTHEADBB-NEXT: sub a0, a0, a1
2426 ; RV32XTHEADBB-NEXT: lui a1, 3
2427 ; RV32XTHEADBB-NEXT: addi a1, a1, 819
2428 ; RV32XTHEADBB-NEXT: and a2, a0, a1
2429 ; RV32XTHEADBB-NEXT: srli a0, a0, 2
2430 ; RV32XTHEADBB-NEXT: and a0, a0, a1
2431 ; RV32XTHEADBB-NEXT: add a0, a2, a0
2432 ; RV32XTHEADBB-NEXT: srli a1, a0, 4
2433 ; RV32XTHEADBB-NEXT: add a0, a0, a1
2434 ; RV32XTHEADBB-NEXT: andi a1, a0, 15
2435 ; RV32XTHEADBB-NEXT: slli a0, a0, 20
2436 ; RV32XTHEADBB-NEXT: srli a0, a0, 28
2437 ; RV32XTHEADBB-NEXT: add a0, a1, a0
2438 ; RV32XTHEADBB-NEXT: ret
2440 ; RV64XTHEADBB-LABEL: test_ctpop_i16:
2441 ; RV64XTHEADBB: # %bb.0:
2442 ; RV64XTHEADBB-NEXT: srli a1, a0, 1
2443 ; RV64XTHEADBB-NEXT: lui a2, 5
2444 ; RV64XTHEADBB-NEXT: addiw a2, a2, 1365
2445 ; RV64XTHEADBB-NEXT: and a1, a1, a2
2446 ; RV64XTHEADBB-NEXT: sub a0, a0, a1
2447 ; RV64XTHEADBB-NEXT: lui a1, 3
2448 ; RV64XTHEADBB-NEXT: addiw a1, a1, 819
2449 ; RV64XTHEADBB-NEXT: and a2, a0, a1
2450 ; RV64XTHEADBB-NEXT: srli a0, a0, 2
2451 ; RV64XTHEADBB-NEXT: and a0, a0, a1
2452 ; RV64XTHEADBB-NEXT: add a0, a2, a0
2453 ; RV64XTHEADBB-NEXT: srli a1, a0, 4
2454 ; RV64XTHEADBB-NEXT: add a0, a0, a1
2455 ; RV64XTHEADBB-NEXT: andi a1, a0, 15
2456 ; RV64XTHEADBB-NEXT: slli a0, a0, 52
2457 ; RV64XTHEADBB-NEXT: srli a0, a0, 60
2458 ; RV64XTHEADBB-NEXT: add a0, a1, a0
2459 ; RV64XTHEADBB-NEXT: ret
2460 %1 = call i16 @llvm.ctpop.i16(i16 %a)
2464 define i32 @test_ctpop_i32(i32 %a) nounwind {
2465 ; RV32I-LABEL: test_ctpop_i32:
2467 ; RV32I-NEXT: addi sp, sp, -16
2468 ; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
2469 ; RV32I-NEXT: srli a1, a0, 1
2470 ; RV32I-NEXT: lui a2, 349525
2471 ; RV32I-NEXT: addi a2, a2, 1365
2472 ; RV32I-NEXT: and a1, a1, a2
2473 ; RV32I-NEXT: sub a0, a0, a1
2474 ; RV32I-NEXT: lui a1, 209715
2475 ; RV32I-NEXT: addi a1, a1, 819
2476 ; RV32I-NEXT: and a2, a0, a1
2477 ; RV32I-NEXT: srli a0, a0, 2
2478 ; RV32I-NEXT: and a0, a0, a1
2479 ; RV32I-NEXT: add a0, a2, a0
2480 ; RV32I-NEXT: srli a1, a0, 4
2481 ; RV32I-NEXT: add a0, a0, a1
2482 ; RV32I-NEXT: lui a1, 61681
2483 ; RV32I-NEXT: addi a1, a1, -241
2484 ; RV32I-NEXT: and a0, a0, a1
2485 ; RV32I-NEXT: lui a1, 4112
2486 ; RV32I-NEXT: addi a1, a1, 257
2487 ; RV32I-NEXT: call __mulsi3
2488 ; RV32I-NEXT: srli a0, a0, 24
2489 ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
2490 ; RV32I-NEXT: addi sp, sp, 16
2493 ; RV64I-LABEL: test_ctpop_i32:
2495 ; RV64I-NEXT: addi sp, sp, -16
2496 ; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
2497 ; RV64I-NEXT: srli a1, a0, 1
2498 ; RV64I-NEXT: lui a2, 349525
2499 ; RV64I-NEXT: addiw a2, a2, 1365
2500 ; RV64I-NEXT: and a1, a1, a2
2501 ; RV64I-NEXT: sub a0, a0, a1
2502 ; RV64I-NEXT: lui a1, 209715
2503 ; RV64I-NEXT: addiw a1, a1, 819
2504 ; RV64I-NEXT: and a2, a0, a1
2505 ; RV64I-NEXT: srli a0, a0, 2
2506 ; RV64I-NEXT: and a0, a0, a1
2507 ; RV64I-NEXT: add a0, a2, a0
2508 ; RV64I-NEXT: srli a1, a0, 4
2509 ; RV64I-NEXT: add a0, a0, a1
2510 ; RV64I-NEXT: lui a1, 61681
2511 ; RV64I-NEXT: addiw a1, a1, -241
2512 ; RV64I-NEXT: and a0, a0, a1
2513 ; RV64I-NEXT: lui a1, 4112
2514 ; RV64I-NEXT: addiw a1, a1, 257
2515 ; RV64I-NEXT: call __muldi3
2516 ; RV64I-NEXT: srliw a0, a0, 24
2517 ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
2518 ; RV64I-NEXT: addi sp, sp, 16
2521 ; RV32M-LABEL: test_ctpop_i32:
2523 ; RV32M-NEXT: srli a1, a0, 1
2524 ; RV32M-NEXT: lui a2, 349525
2525 ; RV32M-NEXT: addi a2, a2, 1365
2526 ; RV32M-NEXT: and a1, a1, a2
2527 ; RV32M-NEXT: sub a0, a0, a1
2528 ; RV32M-NEXT: lui a1, 209715
2529 ; RV32M-NEXT: addi a1, a1, 819
2530 ; RV32M-NEXT: and a2, a0, a1
2531 ; RV32M-NEXT: srli a0, a0, 2
2532 ; RV32M-NEXT: and a0, a0, a1
2533 ; RV32M-NEXT: add a0, a2, a0
2534 ; RV32M-NEXT: srli a1, a0, 4
2535 ; RV32M-NEXT: add a0, a0, a1
2536 ; RV32M-NEXT: lui a1, 61681
2537 ; RV32M-NEXT: addi a1, a1, -241
2538 ; RV32M-NEXT: and a0, a0, a1
2539 ; RV32M-NEXT: lui a1, 4112
2540 ; RV32M-NEXT: addi a1, a1, 257
2541 ; RV32M-NEXT: mul a0, a0, a1
2542 ; RV32M-NEXT: srli a0, a0, 24
2545 ; RV64M-LABEL: test_ctpop_i32:
2547 ; RV64M-NEXT: srli a1, a0, 1
2548 ; RV64M-NEXT: lui a2, 349525
2549 ; RV64M-NEXT: addiw a2, a2, 1365
2550 ; RV64M-NEXT: and a1, a1, a2
2551 ; RV64M-NEXT: sub a0, a0, a1
2552 ; RV64M-NEXT: lui a1, 209715
2553 ; RV64M-NEXT: addiw a1, a1, 819
2554 ; RV64M-NEXT: and a2, a0, a1
2555 ; RV64M-NEXT: srli a0, a0, 2
2556 ; RV64M-NEXT: and a0, a0, a1
2557 ; RV64M-NEXT: add a0, a2, a0
2558 ; RV64M-NEXT: srli a1, a0, 4
2559 ; RV64M-NEXT: add a0, a0, a1
2560 ; RV64M-NEXT: lui a1, 61681
2561 ; RV64M-NEXT: addi a1, a1, -241
2562 ; RV64M-NEXT: and a0, a0, a1
2563 ; RV64M-NEXT: lui a1, 4112
2564 ; RV64M-NEXT: addi a1, a1, 257
2565 ; RV64M-NEXT: mul a0, a0, a1
2566 ; RV64M-NEXT: srliw a0, a0, 24
2569 ; RV32ZBB-LABEL: test_ctpop_i32:
2571 ; RV32ZBB-NEXT: cpop a0, a0
2574 ; RV64ZBB-LABEL: test_ctpop_i32:
2576 ; RV64ZBB-NEXT: cpopw a0, a0
2579 ; RV32XTHEADBB-LABEL: test_ctpop_i32:
2580 ; RV32XTHEADBB: # %bb.0:
2581 ; RV32XTHEADBB-NEXT: addi sp, sp, -16
2582 ; RV32XTHEADBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
2583 ; RV32XTHEADBB-NEXT: srli a1, a0, 1
2584 ; RV32XTHEADBB-NEXT: lui a2, 349525
2585 ; RV32XTHEADBB-NEXT: addi a2, a2, 1365
2586 ; RV32XTHEADBB-NEXT: and a1, a1, a2
2587 ; RV32XTHEADBB-NEXT: sub a0, a0, a1
2588 ; RV32XTHEADBB-NEXT: lui a1, 209715
2589 ; RV32XTHEADBB-NEXT: addi a1, a1, 819
2590 ; RV32XTHEADBB-NEXT: and a2, a0, a1
2591 ; RV32XTHEADBB-NEXT: srli a0, a0, 2
2592 ; RV32XTHEADBB-NEXT: and a0, a0, a1
2593 ; RV32XTHEADBB-NEXT: add a0, a2, a0
2594 ; RV32XTHEADBB-NEXT: srli a1, a0, 4
2595 ; RV32XTHEADBB-NEXT: add a0, a0, a1
2596 ; RV32XTHEADBB-NEXT: lui a1, 61681
2597 ; RV32XTHEADBB-NEXT: addi a1, a1, -241
2598 ; RV32XTHEADBB-NEXT: and a0, a0, a1
2599 ; RV32XTHEADBB-NEXT: lui a1, 4112
2600 ; RV32XTHEADBB-NEXT: addi a1, a1, 257
2601 ; RV32XTHEADBB-NEXT: call __mulsi3
2602 ; RV32XTHEADBB-NEXT: srli a0, a0, 24
2603 ; RV32XTHEADBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
2604 ; RV32XTHEADBB-NEXT: addi sp, sp, 16
2605 ; RV32XTHEADBB-NEXT: ret
2607 ; RV64XTHEADBB-LABEL: test_ctpop_i32:
2608 ; RV64XTHEADBB: # %bb.0:
2609 ; RV64XTHEADBB-NEXT: addi sp, sp, -16
2610 ; RV64XTHEADBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
2611 ; RV64XTHEADBB-NEXT: srli a1, a0, 1
2612 ; RV64XTHEADBB-NEXT: lui a2, 349525
2613 ; RV64XTHEADBB-NEXT: addiw a2, a2, 1365
2614 ; RV64XTHEADBB-NEXT: and a1, a1, a2
2615 ; RV64XTHEADBB-NEXT: sub a0, a0, a1
2616 ; RV64XTHEADBB-NEXT: lui a1, 209715
2617 ; RV64XTHEADBB-NEXT: addiw a1, a1, 819
2618 ; RV64XTHEADBB-NEXT: and a2, a0, a1
2619 ; RV64XTHEADBB-NEXT: srli a0, a0, 2
2620 ; RV64XTHEADBB-NEXT: and a0, a0, a1
2621 ; RV64XTHEADBB-NEXT: add a0, a2, a0
2622 ; RV64XTHEADBB-NEXT: srli a1, a0, 4
2623 ; RV64XTHEADBB-NEXT: add a0, a0, a1
2624 ; RV64XTHEADBB-NEXT: lui a1, 61681
2625 ; RV64XTHEADBB-NEXT: addiw a1, a1, -241
2626 ; RV64XTHEADBB-NEXT: and a0, a0, a1
2627 ; RV64XTHEADBB-NEXT: lui a1, 4112
2628 ; RV64XTHEADBB-NEXT: addiw a1, a1, 257
2629 ; RV64XTHEADBB-NEXT: call __muldi3
2630 ; RV64XTHEADBB-NEXT: srliw a0, a0, 24
2631 ; RV64XTHEADBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
2632 ; RV64XTHEADBB-NEXT: addi sp, sp, 16
2633 ; RV64XTHEADBB-NEXT: ret
2634 %1 = call i32 @llvm.ctpop.i32(i32 %a)
2638 define i64 @test_ctpop_i64(i64 %a) nounwind {
2639 ; RV32I-LABEL: test_ctpop_i64:
2641 ; RV32I-NEXT: addi sp, sp, -32
2642 ; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
2643 ; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
2644 ; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
2645 ; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
2646 ; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
2647 ; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill
2648 ; RV32I-NEXT: sw s5, 4(sp) # 4-byte Folded Spill
2649 ; RV32I-NEXT: mv s0, a0
2650 ; RV32I-NEXT: srli a0, a1, 1
2651 ; RV32I-NEXT: lui a2, 349525
2652 ; RV32I-NEXT: addi s2, a2, 1365
2653 ; RV32I-NEXT: and a0, a0, s2
2654 ; RV32I-NEXT: sub a1, a1, a0
2655 ; RV32I-NEXT: lui a0, 209715
2656 ; RV32I-NEXT: addi s3, a0, 819
2657 ; RV32I-NEXT: and a0, a1, s3
2658 ; RV32I-NEXT: srli a1, a1, 2
2659 ; RV32I-NEXT: and a1, a1, s3
2660 ; RV32I-NEXT: add a0, a0, a1
2661 ; RV32I-NEXT: srli a1, a0, 4
2662 ; RV32I-NEXT: add a0, a0, a1
2663 ; RV32I-NEXT: lui a1, 61681
2664 ; RV32I-NEXT: addi s4, a1, -241
2665 ; RV32I-NEXT: and a0, a0, s4
2666 ; RV32I-NEXT: lui a1, 4112
2667 ; RV32I-NEXT: addi s1, a1, 257
2668 ; RV32I-NEXT: mv a1, s1
2669 ; RV32I-NEXT: call __mulsi3
2670 ; RV32I-NEXT: srli s5, a0, 24
2671 ; RV32I-NEXT: srli a0, s0, 1
2672 ; RV32I-NEXT: and a0, a0, s2
2673 ; RV32I-NEXT: sub s0, s0, a0
2674 ; RV32I-NEXT: and a0, s0, s3
2675 ; RV32I-NEXT: srli s0, s0, 2
2676 ; RV32I-NEXT: and a1, s0, s3
2677 ; RV32I-NEXT: add a0, a0, a1
2678 ; RV32I-NEXT: srli a1, a0, 4
2679 ; RV32I-NEXT: add a0, a0, a1
2680 ; RV32I-NEXT: and a0, a0, s4
2681 ; RV32I-NEXT: mv a1, s1
2682 ; RV32I-NEXT: call __mulsi3
2683 ; RV32I-NEXT: srli a0, a0, 24
2684 ; RV32I-NEXT: add a0, a0, s5
2685 ; RV32I-NEXT: li a1, 0
2686 ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
2687 ; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
2688 ; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
2689 ; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
2690 ; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
2691 ; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
2692 ; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
2693 ; RV32I-NEXT: addi sp, sp, 32
2696 ; RV64I-LABEL: test_ctpop_i64:
2698 ; RV64I-NEXT: addi sp, sp, -16
2699 ; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
2700 ; RV64I-NEXT: srli a1, a0, 1
2701 ; RV64I-NEXT: lui a2, 349525
2702 ; RV64I-NEXT: addiw a2, a2, 1365
2703 ; RV64I-NEXT: slli a3, a2, 32
2704 ; RV64I-NEXT: add a2, a2, a3
2705 ; RV64I-NEXT: and a1, a1, a2
2706 ; RV64I-NEXT: sub a0, a0, a1
2707 ; RV64I-NEXT: lui a1, 209715
2708 ; RV64I-NEXT: addiw a1, a1, 819
2709 ; RV64I-NEXT: slli a2, a1, 32
2710 ; RV64I-NEXT: add a1, a1, a2
2711 ; RV64I-NEXT: and a2, a0, a1
2712 ; RV64I-NEXT: srli a0, a0, 2
2713 ; RV64I-NEXT: and a0, a0, a1
2714 ; RV64I-NEXT: add a0, a2, a0
2715 ; RV64I-NEXT: srli a1, a0, 4
2716 ; RV64I-NEXT: add a0, a0, a1
2717 ; RV64I-NEXT: lui a1, 61681
2718 ; RV64I-NEXT: addiw a1, a1, -241
2719 ; RV64I-NEXT: slli a2, a1, 32
2720 ; RV64I-NEXT: add a1, a1, a2
2721 ; RV64I-NEXT: and a0, a0, a1
2722 ; RV64I-NEXT: lui a1, 4112
2723 ; RV64I-NEXT: addiw a1, a1, 257
2724 ; RV64I-NEXT: slli a2, a1, 32
2725 ; RV64I-NEXT: add a1, a1, a2
2726 ; RV64I-NEXT: call __muldi3
2727 ; RV64I-NEXT: srli a0, a0, 56
2728 ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
2729 ; RV64I-NEXT: addi sp, sp, 16
2732 ; RV32M-LABEL: test_ctpop_i64:
2734 ; RV32M-NEXT: srli a2, a1, 1
2735 ; RV32M-NEXT: lui a3, 349525
2736 ; RV32M-NEXT: addi a3, a3, 1365
2737 ; RV32M-NEXT: and a2, a2, a3
2738 ; RV32M-NEXT: sub a1, a1, a2
2739 ; RV32M-NEXT: lui a2, 209715
2740 ; RV32M-NEXT: addi a2, a2, 819
2741 ; RV32M-NEXT: and a4, a1, a2
2742 ; RV32M-NEXT: srli a1, a1, 2
2743 ; RV32M-NEXT: and a1, a1, a2
2744 ; RV32M-NEXT: add a1, a4, a1
2745 ; RV32M-NEXT: srli a4, a1, 4
2746 ; RV32M-NEXT: add a1, a1, a4
2747 ; RV32M-NEXT: lui a4, 61681
2748 ; RV32M-NEXT: addi a4, a4, -241
2749 ; RV32M-NEXT: and a1, a1, a4
2750 ; RV32M-NEXT: lui a5, 4112
2751 ; RV32M-NEXT: addi a5, a5, 257
2752 ; RV32M-NEXT: mul a1, a1, a5
2753 ; RV32M-NEXT: srli a1, a1, 24
2754 ; RV32M-NEXT: srli a6, a0, 1
2755 ; RV32M-NEXT: and a3, a6, a3
2756 ; RV32M-NEXT: sub a0, a0, a3
2757 ; RV32M-NEXT: and a3, a0, a2
2758 ; RV32M-NEXT: srli a0, a0, 2
2759 ; RV32M-NEXT: and a0, a0, a2
2760 ; RV32M-NEXT: add a0, a3, a0
2761 ; RV32M-NEXT: srli a2, a0, 4
2762 ; RV32M-NEXT: add a0, a0, a2
2763 ; RV32M-NEXT: and a0, a0, a4
2764 ; RV32M-NEXT: mul a0, a0, a5
2765 ; RV32M-NEXT: srli a0, a0, 24
2766 ; RV32M-NEXT: add a0, a0, a1
2767 ; RV32M-NEXT: li a1, 0
2770 ; RV64M-LABEL: test_ctpop_i64:
2772 ; RV64M-NEXT: srli a1, a0, 1
2773 ; RV64M-NEXT: lui a2, 349525
2774 ; RV64M-NEXT: addiw a2, a2, 1365
2775 ; RV64M-NEXT: slli a3, a2, 32
2776 ; RV64M-NEXT: add a2, a2, a3
2777 ; RV64M-NEXT: and a1, a1, a2
2778 ; RV64M-NEXT: sub a0, a0, a1
2779 ; RV64M-NEXT: lui a1, 209715
2780 ; RV64M-NEXT: addiw a1, a1, 819
2781 ; RV64M-NEXT: slli a2, a1, 32
2782 ; RV64M-NEXT: add a1, a1, a2
2783 ; RV64M-NEXT: and a2, a0, a1
2784 ; RV64M-NEXT: srli a0, a0, 2
2785 ; RV64M-NEXT: and a0, a0, a1
2786 ; RV64M-NEXT: add a0, a2, a0
2787 ; RV64M-NEXT: srli a1, a0, 4
2788 ; RV64M-NEXT: add a0, a0, a1
2789 ; RV64M-NEXT: lui a1, 61681
2790 ; RV64M-NEXT: addiw a1, a1, -241
2791 ; RV64M-NEXT: slli a2, a1, 32
2792 ; RV64M-NEXT: add a1, a1, a2
2793 ; RV64M-NEXT: and a0, a0, a1
2794 ; RV64M-NEXT: lui a1, 4112
2795 ; RV64M-NEXT: addiw a1, a1, 257
2796 ; RV64M-NEXT: slli a2, a1, 32
2797 ; RV64M-NEXT: add a1, a1, a2
2798 ; RV64M-NEXT: mul a0, a0, a1
2799 ; RV64M-NEXT: srli a0, a0, 56
2802 ; RV32ZBB-LABEL: test_ctpop_i64:
2804 ; RV32ZBB-NEXT: cpop a1, a1
2805 ; RV32ZBB-NEXT: cpop a0, a0
2806 ; RV32ZBB-NEXT: add a0, a0, a1
2807 ; RV32ZBB-NEXT: li a1, 0
2810 ; RV64ZBB-LABEL: test_ctpop_i64:
2812 ; RV64ZBB-NEXT: cpop a0, a0
2815 ; RV32XTHEADBB-LABEL: test_ctpop_i64:
2816 ; RV32XTHEADBB: # %bb.0:
2817 ; RV32XTHEADBB-NEXT: addi sp, sp, -32
2818 ; RV32XTHEADBB-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
2819 ; RV32XTHEADBB-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
2820 ; RV32XTHEADBB-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
2821 ; RV32XTHEADBB-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
2822 ; RV32XTHEADBB-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
2823 ; RV32XTHEADBB-NEXT: sw s4, 8(sp) # 4-byte Folded Spill
2824 ; RV32XTHEADBB-NEXT: sw s5, 4(sp) # 4-byte Folded Spill
2825 ; RV32XTHEADBB-NEXT: mv s0, a0
2826 ; RV32XTHEADBB-NEXT: srli a0, a1, 1
2827 ; RV32XTHEADBB-NEXT: lui a2, 349525
2828 ; RV32XTHEADBB-NEXT: addi s2, a2, 1365
2829 ; RV32XTHEADBB-NEXT: and a0, a0, s2
2830 ; RV32XTHEADBB-NEXT: sub a1, a1, a0
2831 ; RV32XTHEADBB-NEXT: lui a0, 209715
2832 ; RV32XTHEADBB-NEXT: addi s3, a0, 819
2833 ; RV32XTHEADBB-NEXT: and a0, a1, s3
2834 ; RV32XTHEADBB-NEXT: srli a1, a1, 2
2835 ; RV32XTHEADBB-NEXT: and a1, a1, s3
2836 ; RV32XTHEADBB-NEXT: add a0, a0, a1
2837 ; RV32XTHEADBB-NEXT: srli a1, a0, 4
2838 ; RV32XTHEADBB-NEXT: add a0, a0, a1
2839 ; RV32XTHEADBB-NEXT: lui a1, 61681
2840 ; RV32XTHEADBB-NEXT: addi s4, a1, -241
2841 ; RV32XTHEADBB-NEXT: and a0, a0, s4
2842 ; RV32XTHEADBB-NEXT: lui a1, 4112
2843 ; RV32XTHEADBB-NEXT: addi s1, a1, 257
2844 ; RV32XTHEADBB-NEXT: mv a1, s1
2845 ; RV32XTHEADBB-NEXT: call __mulsi3
2846 ; RV32XTHEADBB-NEXT: srli s5, a0, 24
2847 ; RV32XTHEADBB-NEXT: srli a0, s0, 1
2848 ; RV32XTHEADBB-NEXT: and a0, a0, s2
2849 ; RV32XTHEADBB-NEXT: sub s0, s0, a0
2850 ; RV32XTHEADBB-NEXT: and a0, s0, s3
2851 ; RV32XTHEADBB-NEXT: srli s0, s0, 2
2852 ; RV32XTHEADBB-NEXT: and a1, s0, s3
2853 ; RV32XTHEADBB-NEXT: add a0, a0, a1
2854 ; RV32XTHEADBB-NEXT: srli a1, a0, 4
2855 ; RV32XTHEADBB-NEXT: add a0, a0, a1
2856 ; RV32XTHEADBB-NEXT: and a0, a0, s4
2857 ; RV32XTHEADBB-NEXT: mv a1, s1
2858 ; RV32XTHEADBB-NEXT: call __mulsi3
2859 ; RV32XTHEADBB-NEXT: srli a0, a0, 24
2860 ; RV32XTHEADBB-NEXT: add a0, a0, s5
2861 ; RV32XTHEADBB-NEXT: li a1, 0
2862 ; RV32XTHEADBB-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
2863 ; RV32XTHEADBB-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
2864 ; RV32XTHEADBB-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
2865 ; RV32XTHEADBB-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
2866 ; RV32XTHEADBB-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
2867 ; RV32XTHEADBB-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
2868 ; RV32XTHEADBB-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
2869 ; RV32XTHEADBB-NEXT: addi sp, sp, 32
2870 ; RV32XTHEADBB-NEXT: ret
2872 ; RV64XTHEADBB-LABEL: test_ctpop_i64:
2873 ; RV64XTHEADBB: # %bb.0:
2874 ; RV64XTHEADBB-NEXT: addi sp, sp, -16
2875 ; RV64XTHEADBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
2876 ; RV64XTHEADBB-NEXT: srli a1, a0, 1
2877 ; RV64XTHEADBB-NEXT: lui a2, 349525
2878 ; RV64XTHEADBB-NEXT: addiw a2, a2, 1365
2879 ; RV64XTHEADBB-NEXT: slli a3, a2, 32
2880 ; RV64XTHEADBB-NEXT: add a2, a2, a3
2881 ; RV64XTHEADBB-NEXT: and a1, a1, a2
2882 ; RV64XTHEADBB-NEXT: sub a0, a0, a1
2883 ; RV64XTHEADBB-NEXT: lui a1, 209715
2884 ; RV64XTHEADBB-NEXT: addiw a1, a1, 819
2885 ; RV64XTHEADBB-NEXT: slli a2, a1, 32
2886 ; RV64XTHEADBB-NEXT: add a1, a1, a2
2887 ; RV64XTHEADBB-NEXT: and a2, a0, a1
2888 ; RV64XTHEADBB-NEXT: srli a0, a0, 2
2889 ; RV64XTHEADBB-NEXT: and a0, a0, a1
2890 ; RV64XTHEADBB-NEXT: add a0, a2, a0
2891 ; RV64XTHEADBB-NEXT: srli a1, a0, 4
2892 ; RV64XTHEADBB-NEXT: add a0, a0, a1
2893 ; RV64XTHEADBB-NEXT: lui a1, 61681
2894 ; RV64XTHEADBB-NEXT: addiw a1, a1, -241
2895 ; RV64XTHEADBB-NEXT: slli a2, a1, 32
2896 ; RV64XTHEADBB-NEXT: add a1, a1, a2
2897 ; RV64XTHEADBB-NEXT: and a0, a0, a1
2898 ; RV64XTHEADBB-NEXT: lui a1, 4112
2899 ; RV64XTHEADBB-NEXT: addiw a1, a1, 257
2900 ; RV64XTHEADBB-NEXT: slli a2, a1, 32
2901 ; RV64XTHEADBB-NEXT: add a1, a1, a2
2902 ; RV64XTHEADBB-NEXT: call __muldi3
2903 ; RV64XTHEADBB-NEXT: srli a0, a0, 56
2904 ; RV64XTHEADBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
2905 ; RV64XTHEADBB-NEXT: addi sp, sp, 16
2906 ; RV64XTHEADBB-NEXT: ret
2907 %1 = call i64 @llvm.ctpop.i64(i64 %a)
2911 define i8 @test_parity_i8(i8 %a) {
2912 ; RV32_NOZBB-LABEL: test_parity_i8:
2913 ; RV32_NOZBB: # %bb.0:
2914 ; RV32_NOZBB-NEXT: andi a0, a0, 255
2915 ; RV32_NOZBB-NEXT: srli a1, a0, 4
2916 ; RV32_NOZBB-NEXT: xor a0, a0, a1
2917 ; RV32_NOZBB-NEXT: srli a1, a0, 2
2918 ; RV32_NOZBB-NEXT: xor a0, a0, a1
2919 ; RV32_NOZBB-NEXT: srli a1, a0, 1
2920 ; RV32_NOZBB-NEXT: xor a0, a0, a1
2921 ; RV32_NOZBB-NEXT: andi a0, a0, 1
2922 ; RV32_NOZBB-NEXT: ret
2924 ; RV64NOZBB-LABEL: test_parity_i8:
2925 ; RV64NOZBB: # %bb.0:
2926 ; RV64NOZBB-NEXT: andi a0, a0, 255
2927 ; RV64NOZBB-NEXT: srli a1, a0, 4
2928 ; RV64NOZBB-NEXT: xor a0, a0, a1
2929 ; RV64NOZBB-NEXT: srli a1, a0, 2
2930 ; RV64NOZBB-NEXT: xor a0, a0, a1
2931 ; RV64NOZBB-NEXT: srli a1, a0, 1
2932 ; RV64NOZBB-NEXT: xor a0, a0, a1
2933 ; RV64NOZBB-NEXT: andi a0, a0, 1
2934 ; RV64NOZBB-NEXT: ret
2936 ; RV32ZBB-LABEL: test_parity_i8:
2938 ; RV32ZBB-NEXT: andi a0, a0, 255
2939 ; RV32ZBB-NEXT: cpop a0, a0
2940 ; RV32ZBB-NEXT: andi a0, a0, 1
2943 ; RV64ZBB-LABEL: test_parity_i8:
2945 ; RV64ZBB-NEXT: andi a0, a0, 255
2946 ; RV64ZBB-NEXT: cpopw a0, a0
2947 ; RV64ZBB-NEXT: andi a0, a0, 1
2950 ; RV32XTHEADBB-LABEL: test_parity_i8:
2951 ; RV32XTHEADBB: # %bb.0:
2952 ; RV32XTHEADBB-NEXT: andi a0, a0, 255
2953 ; RV32XTHEADBB-NEXT: srli a1, a0, 4
2954 ; RV32XTHEADBB-NEXT: xor a0, a0, a1
2955 ; RV32XTHEADBB-NEXT: srli a1, a0, 2
2956 ; RV32XTHEADBB-NEXT: xor a0, a0, a1
2957 ; RV32XTHEADBB-NEXT: srli a1, a0, 1
2958 ; RV32XTHEADBB-NEXT: xor a0, a0, a1
2959 ; RV32XTHEADBB-NEXT: andi a0, a0, 1
2960 ; RV32XTHEADBB-NEXT: ret
2962 ; RV64XTHEADBB-LABEL: test_parity_i8:
2963 ; RV64XTHEADBB: # %bb.0:
2964 ; RV64XTHEADBB-NEXT: andi a0, a0, 255
2965 ; RV64XTHEADBB-NEXT: srli a1, a0, 4
2966 ; RV64XTHEADBB-NEXT: xor a0, a0, a1
2967 ; RV64XTHEADBB-NEXT: srli a1, a0, 2
2968 ; RV64XTHEADBB-NEXT: xor a0, a0, a1
2969 ; RV64XTHEADBB-NEXT: srli a1, a0, 1
2970 ; RV64XTHEADBB-NEXT: xor a0, a0, a1
2971 ; RV64XTHEADBB-NEXT: andi a0, a0, 1
2972 ; RV64XTHEADBB-NEXT: ret
2973 %1 = call i8 @llvm.ctpop.i8(i8 %a)
2978 define i16 @test_parity_i16(i16 %a) {
2979 ; RV32_NOZBB-LABEL: test_parity_i16:
2980 ; RV32_NOZBB: # %bb.0:
2981 ; RV32_NOZBB-NEXT: slli a0, a0, 16
2982 ; RV32_NOZBB-NEXT: srli a0, a0, 16
2983 ; RV32_NOZBB-NEXT: srli a1, a0, 8
2984 ; RV32_NOZBB-NEXT: xor a0, a0, a1
2985 ; RV32_NOZBB-NEXT: srli a1, a0, 4
2986 ; RV32_NOZBB-NEXT: xor a0, a0, a1
2987 ; RV32_NOZBB-NEXT: srli a1, a0, 2
2988 ; RV32_NOZBB-NEXT: xor a0, a0, a1
2989 ; RV32_NOZBB-NEXT: srli a1, a0, 1
2990 ; RV32_NOZBB-NEXT: xor a0, a0, a1
2991 ; RV32_NOZBB-NEXT: andi a0, a0, 1
2992 ; RV32_NOZBB-NEXT: ret
2994 ; RV64NOZBB-LABEL: test_parity_i16:
2995 ; RV64NOZBB: # %bb.0:
2996 ; RV64NOZBB-NEXT: slli a0, a0, 48
2997 ; RV64NOZBB-NEXT: srli a0, a0, 48
2998 ; RV64NOZBB-NEXT: srli a1, a0, 8
2999 ; RV64NOZBB-NEXT: xor a0, a0, a1
3000 ; RV64NOZBB-NEXT: srli a1, a0, 4
3001 ; RV64NOZBB-NEXT: xor a0, a0, a1
3002 ; RV64NOZBB-NEXT: srli a1, a0, 2
3003 ; RV64NOZBB-NEXT: xor a0, a0, a1
3004 ; RV64NOZBB-NEXT: srli a1, a0, 1
3005 ; RV64NOZBB-NEXT: xor a0, a0, a1
3006 ; RV64NOZBB-NEXT: andi a0, a0, 1
3007 ; RV64NOZBB-NEXT: ret
3009 ; RV32ZBB-LABEL: test_parity_i16:
3011 ; RV32ZBB-NEXT: zext.h a0, a0
3012 ; RV32ZBB-NEXT: cpop a0, a0
3013 ; RV32ZBB-NEXT: andi a0, a0, 1
3016 ; RV64ZBB-LABEL: test_parity_i16:
3018 ; RV64ZBB-NEXT: zext.h a0, a0
3019 ; RV64ZBB-NEXT: cpopw a0, a0
3020 ; RV64ZBB-NEXT: andi a0, a0, 1
3023 ; RV32XTHEADBB-LABEL: test_parity_i16:
3024 ; RV32XTHEADBB: # %bb.0:
3025 ; RV32XTHEADBB-NEXT: th.extu a0, a0, 15, 0
3026 ; RV32XTHEADBB-NEXT: srli a1, a0, 8
3027 ; RV32XTHEADBB-NEXT: xor a0, a0, a1
3028 ; RV32XTHEADBB-NEXT: srli a1, a0, 4
3029 ; RV32XTHEADBB-NEXT: xor a0, a0, a1
3030 ; RV32XTHEADBB-NEXT: srli a1, a0, 2
3031 ; RV32XTHEADBB-NEXT: xor a0, a0, a1
3032 ; RV32XTHEADBB-NEXT: srli a1, a0, 1
3033 ; RV32XTHEADBB-NEXT: xor a0, a0, a1
3034 ; RV32XTHEADBB-NEXT: andi a0, a0, 1
3035 ; RV32XTHEADBB-NEXT: ret
3037 ; RV64XTHEADBB-LABEL: test_parity_i16:
3038 ; RV64XTHEADBB: # %bb.0:
3039 ; RV64XTHEADBB-NEXT: th.extu a0, a0, 15, 0
3040 ; RV64XTHEADBB-NEXT: srli a1, a0, 8
3041 ; RV64XTHEADBB-NEXT: xor a0, a0, a1
3042 ; RV64XTHEADBB-NEXT: srli a1, a0, 4
3043 ; RV64XTHEADBB-NEXT: xor a0, a0, a1
3044 ; RV64XTHEADBB-NEXT: srli a1, a0, 2
3045 ; RV64XTHEADBB-NEXT: xor a0, a0, a1
3046 ; RV64XTHEADBB-NEXT: srli a1, a0, 1
3047 ; RV64XTHEADBB-NEXT: xor a0, a0, a1
3048 ; RV64XTHEADBB-NEXT: andi a0, a0, 1
3049 ; RV64XTHEADBB-NEXT: ret
3050 %1 = call i16 @llvm.ctpop.i16(i16 %a)
3055 define i32 @test_parity_i32(i32 %a) {
3056 ; RV32_NOZBB-LABEL: test_parity_i32:
3057 ; RV32_NOZBB: # %bb.0:
3058 ; RV32_NOZBB-NEXT: srli a1, a0, 16
3059 ; RV32_NOZBB-NEXT: xor a0, a0, a1
3060 ; RV32_NOZBB-NEXT: srli a1, a0, 8
3061 ; RV32_NOZBB-NEXT: xor a0, a0, a1
3062 ; RV32_NOZBB-NEXT: srli a1, a0, 4
3063 ; RV32_NOZBB-NEXT: xor a0, a0, a1
3064 ; RV32_NOZBB-NEXT: srli a1, a0, 2
3065 ; RV32_NOZBB-NEXT: xor a0, a0, a1
3066 ; RV32_NOZBB-NEXT: srli a1, a0, 1
3067 ; RV32_NOZBB-NEXT: xor a0, a0, a1
3068 ; RV32_NOZBB-NEXT: andi a0, a0, 1
3069 ; RV32_NOZBB-NEXT: ret
3071 ; RV64NOZBB-LABEL: test_parity_i32:
3072 ; RV64NOZBB: # %bb.0:
3073 ; RV64NOZBB-NEXT: slli a1, a0, 32
3074 ; RV64NOZBB-NEXT: srli a1, a1, 32
3075 ; RV64NOZBB-NEXT: srliw a0, a0, 16
3076 ; RV64NOZBB-NEXT: xor a0, a1, a0
3077 ; RV64NOZBB-NEXT: srli a1, a0, 8
3078 ; RV64NOZBB-NEXT: xor a0, a0, a1
3079 ; RV64NOZBB-NEXT: srli a1, a0, 4
3080 ; RV64NOZBB-NEXT: xor a0, a0, a1
3081 ; RV64NOZBB-NEXT: srli a1, a0, 2
3082 ; RV64NOZBB-NEXT: xor a0, a0, a1
3083 ; RV64NOZBB-NEXT: srli a1, a0, 1
3084 ; RV64NOZBB-NEXT: xor a0, a0, a1
3085 ; RV64NOZBB-NEXT: andi a0, a0, 1
3086 ; RV64NOZBB-NEXT: ret
3088 ; RV32ZBB-LABEL: test_parity_i32:
3090 ; RV32ZBB-NEXT: cpop a0, a0
3091 ; RV32ZBB-NEXT: andi a0, a0, 1
3094 ; RV64ZBB-LABEL: test_parity_i32:
3096 ; RV64ZBB-NEXT: cpopw a0, a0
3097 ; RV64ZBB-NEXT: andi a0, a0, 1
3100 ; RV32XTHEADBB-LABEL: test_parity_i32:
3101 ; RV32XTHEADBB: # %bb.0:
3102 ; RV32XTHEADBB-NEXT: srli a1, a0, 16
3103 ; RV32XTHEADBB-NEXT: xor a0, a0, a1
3104 ; RV32XTHEADBB-NEXT: srli a1, a0, 8
3105 ; RV32XTHEADBB-NEXT: xor a0, a0, a1
3106 ; RV32XTHEADBB-NEXT: srli a1, a0, 4
3107 ; RV32XTHEADBB-NEXT: xor a0, a0, a1
3108 ; RV32XTHEADBB-NEXT: srli a1, a0, 2
3109 ; RV32XTHEADBB-NEXT: xor a0, a0, a1
3110 ; RV32XTHEADBB-NEXT: srli a1, a0, 1
3111 ; RV32XTHEADBB-NEXT: xor a0, a0, a1
3112 ; RV32XTHEADBB-NEXT: andi a0, a0, 1
3113 ; RV32XTHEADBB-NEXT: ret
3115 ; RV64XTHEADBB-LABEL: test_parity_i32:
3116 ; RV64XTHEADBB: # %bb.0:
3117 ; RV64XTHEADBB-NEXT: th.extu a1, a0, 31, 0
3118 ; RV64XTHEADBB-NEXT: srliw a0, a0, 16
3119 ; RV64XTHEADBB-NEXT: xor a0, a1, a0
3120 ; RV64XTHEADBB-NEXT: srli a1, a0, 8
3121 ; RV64XTHEADBB-NEXT: xor a0, a0, a1
3122 ; RV64XTHEADBB-NEXT: srli a1, a0, 4
3123 ; RV64XTHEADBB-NEXT: xor a0, a0, a1
3124 ; RV64XTHEADBB-NEXT: srli a1, a0, 2
3125 ; RV64XTHEADBB-NEXT: xor a0, a0, a1
3126 ; RV64XTHEADBB-NEXT: srli a1, a0, 1
3127 ; RV64XTHEADBB-NEXT: xor a0, a0, a1
3128 ; RV64XTHEADBB-NEXT: andi a0, a0, 1
3129 ; RV64XTHEADBB-NEXT: ret
3130 %1 = call i32 @llvm.ctpop.i32(i32 %a)
3135 define i64 @test_parity_i64(i64 %a) {
3136 ; RV32_NOZBB-LABEL: test_parity_i64:
3137 ; RV32_NOZBB: # %bb.0:
3138 ; RV32_NOZBB-NEXT: xor a0, a0, a1
3139 ; RV32_NOZBB-NEXT: srli a1, a0, 16
3140 ; RV32_NOZBB-NEXT: xor a0, a0, a1
3141 ; RV32_NOZBB-NEXT: srli a1, a0, 8
3142 ; RV32_NOZBB-NEXT: xor a0, a0, a1
3143 ; RV32_NOZBB-NEXT: srli a1, a0, 4
3144 ; RV32_NOZBB-NEXT: xor a0, a0, a1
3145 ; RV32_NOZBB-NEXT: srli a1, a0, 2
3146 ; RV32_NOZBB-NEXT: xor a0, a0, a1
3147 ; RV32_NOZBB-NEXT: srli a1, a0, 1
3148 ; RV32_NOZBB-NEXT: xor a0, a0, a1
3149 ; RV32_NOZBB-NEXT: andi a0, a0, 1
3150 ; RV32_NOZBB-NEXT: li a1, 0
3151 ; RV32_NOZBB-NEXT: ret
3153 ; RV64NOZBB-LABEL: test_parity_i64:
3154 ; RV64NOZBB: # %bb.0:
3155 ; RV64NOZBB-NEXT: srli a1, a0, 32
3156 ; RV64NOZBB-NEXT: xor a0, a0, a1
3157 ; RV64NOZBB-NEXT: srli a1, a0, 16
3158 ; RV64NOZBB-NEXT: xor a0, a0, a1
3159 ; RV64NOZBB-NEXT: srli a1, a0, 8
3160 ; RV64NOZBB-NEXT: xor a0, a0, a1
3161 ; RV64NOZBB-NEXT: srli a1, a0, 4
3162 ; RV64NOZBB-NEXT: xor a0, a0, a1
3163 ; RV64NOZBB-NEXT: srli a1, a0, 2
3164 ; RV64NOZBB-NEXT: xor a0, a0, a1
3165 ; RV64NOZBB-NEXT: srli a1, a0, 1
3166 ; RV64NOZBB-NEXT: xor a0, a0, a1
3167 ; RV64NOZBB-NEXT: andi a0, a0, 1
3168 ; RV64NOZBB-NEXT: ret
3170 ; RV32ZBB-LABEL: test_parity_i64:
3172 ; RV32ZBB-NEXT: xor a0, a0, a1
3173 ; RV32ZBB-NEXT: cpop a0, a0
3174 ; RV32ZBB-NEXT: andi a0, a0, 1
3175 ; RV32ZBB-NEXT: li a1, 0
3178 ; RV64ZBB-LABEL: test_parity_i64:
3180 ; RV64ZBB-NEXT: cpop a0, a0
3181 ; RV64ZBB-NEXT: andi a0, a0, 1
3184 ; RV32XTHEADBB-LABEL: test_parity_i64:
3185 ; RV32XTHEADBB: # %bb.0:
3186 ; RV32XTHEADBB-NEXT: xor a0, a0, a1
3187 ; RV32XTHEADBB-NEXT: srli a1, a0, 16
3188 ; RV32XTHEADBB-NEXT: xor a0, a0, a1
3189 ; RV32XTHEADBB-NEXT: srli a1, a0, 8
3190 ; RV32XTHEADBB-NEXT: xor a0, a0, a1
3191 ; RV32XTHEADBB-NEXT: srli a1, a0, 4
3192 ; RV32XTHEADBB-NEXT: xor a0, a0, a1
3193 ; RV32XTHEADBB-NEXT: srli a1, a0, 2
3194 ; RV32XTHEADBB-NEXT: xor a0, a0, a1
3195 ; RV32XTHEADBB-NEXT: srli a1, a0, 1
3196 ; RV32XTHEADBB-NEXT: xor a0, a0, a1
3197 ; RV32XTHEADBB-NEXT: andi a0, a0, 1
3198 ; RV32XTHEADBB-NEXT: li a1, 0
3199 ; RV32XTHEADBB-NEXT: ret
3201 ; RV64XTHEADBB-LABEL: test_parity_i64:
3202 ; RV64XTHEADBB: # %bb.0:
3203 ; RV64XTHEADBB-NEXT: srli a1, a0, 32
3204 ; RV64XTHEADBB-NEXT: xor a0, a0, a1
3205 ; RV64XTHEADBB-NEXT: srli a1, a0, 16
3206 ; RV64XTHEADBB-NEXT: xor a0, a0, a1
3207 ; RV64XTHEADBB-NEXT: srli a1, a0, 8
3208 ; RV64XTHEADBB-NEXT: xor a0, a0, a1
3209 ; RV64XTHEADBB-NEXT: srli a1, a0, 4
3210 ; RV64XTHEADBB-NEXT: xor a0, a0, a1
3211 ; RV64XTHEADBB-NEXT: srli a1, a0, 2
3212 ; RV64XTHEADBB-NEXT: xor a0, a0, a1
3213 ; RV64XTHEADBB-NEXT: srli a1, a0, 1
3214 ; RV64XTHEADBB-NEXT: xor a0, a0, a1
3215 ; RV64XTHEADBB-NEXT: andi a0, a0, 1
3216 ; RV64XTHEADBB-NEXT: ret
3217 %1 = call i64 @llvm.ctpop.i64(i64 %a)