1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
3 ; RUN: | FileCheck -check-prefix=RV32 %s
4 ; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
5 ; RUN: | FileCheck -check-prefix=RV64 %s
7 define fastcc i32 @callee(<16 x i32> %A) nounwind {
15 %B = extractelement <16 x i32> %A, i32 0
19 ; With the fastcc, arguments will be passed by a0-a7 and t2-t6.
20 ; The rest will be pushed on the stack.
21 define i32 @caller(<16 x i32> %A) nounwind {
24 ; RV32-NEXT: addi sp, sp, -32
25 ; RV32-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
26 ; RV32-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
27 ; RV32-NEXT: lw t0, 0(a0)
28 ; RV32-NEXT: lw a1, 4(a0)
29 ; RV32-NEXT: lw a2, 8(a0)
30 ; RV32-NEXT: lw a3, 12(a0)
31 ; RV32-NEXT: lw a4, 16(a0)
32 ; RV32-NEXT: lw a5, 20(a0)
33 ; RV32-NEXT: lw a6, 24(a0)
34 ; RV32-NEXT: lw a7, 28(a0)
35 ; RV32-NEXT: lw t2, 32(a0)
36 ; RV32-NEXT: lw t3, 36(a0)
37 ; RV32-NEXT: lw t4, 40(a0)
38 ; RV32-NEXT: lw t5, 44(a0)
39 ; RV32-NEXT: lw t6, 48(a0)
40 ; RV32-NEXT: lw t1, 52(a0)
41 ; RV32-NEXT: lw s0, 56(a0)
42 ; RV32-NEXT: lw a0, 60(a0)
43 ; RV32-NEXT: sw a0, 8(sp)
44 ; RV32-NEXT: sw s0, 4(sp)
45 ; RV32-NEXT: sw t1, 0(sp)
46 ; RV32-NEXT: mv a0, t0
47 ; RV32-NEXT: call callee
48 ; RV32-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
49 ; RV32-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
50 ; RV32-NEXT: addi sp, sp, 32
55 ; RV64-NEXT: addi sp, sp, -48
56 ; RV64-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
57 ; RV64-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
58 ; RV64-NEXT: ld t0, 0(a0)
59 ; RV64-NEXT: ld a1, 8(a0)
60 ; RV64-NEXT: ld a2, 16(a0)
61 ; RV64-NEXT: ld a3, 24(a0)
62 ; RV64-NEXT: ld a4, 32(a0)
63 ; RV64-NEXT: ld a5, 40(a0)
64 ; RV64-NEXT: ld a6, 48(a0)
65 ; RV64-NEXT: ld a7, 56(a0)
66 ; RV64-NEXT: ld t2, 64(a0)
67 ; RV64-NEXT: ld t3, 72(a0)
68 ; RV64-NEXT: ld t4, 80(a0)
69 ; RV64-NEXT: ld t5, 88(a0)
70 ; RV64-NEXT: ld t6, 96(a0)
71 ; RV64-NEXT: ld t1, 104(a0)
72 ; RV64-NEXT: ld s0, 112(a0)
73 ; RV64-NEXT: ld a0, 120(a0)
74 ; RV64-NEXT: sd a0, 16(sp)
75 ; RV64-NEXT: sd s0, 8(sp)
76 ; RV64-NEXT: sd t1, 0(sp)
77 ; RV64-NEXT: mv a0, t0
78 ; RV64-NEXT: call callee
79 ; RV64-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
80 ; RV64-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
81 ; RV64-NEXT: addi sp, sp, 48
83 %C = call fastcc i32 @callee(<16 x i32> %A)