1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
2 ; RUN: opt < %s -msan-check-access-address=0 -S -passes=msan 2>&1 | FileCheck %s
4 target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
5 target triple = "aarch64-grtev4-linux-gnu"
7 %struct.IntInt = type { i32, i32 }
8 %struct.Int64Int64 = type { i64, i64 }
9 %struct.DoubleDouble = type { double, double }
10 %struct.Double4 = type { [4 x double] }
11 %struct.DoubleFloat = type { double, float }
12 %struct.LongDouble2 = type { [2 x fp128] }
13 %struct.LongDouble4 = type { [4 x fp128] }
14 %"struct.std::__va_list" = type { ptr, ptr, ptr, i32, i32 }
16 define linkonce_odr dso_local void @_Z4testIcEvT_(i8 noundef %arg) sanitize_memory {
17 ; CHECK-LABEL: define linkonce_odr dso_local void @_Z4testIcEvT_(
18 ; CHECK-SAME: i8 noundef [[ARG:%.*]]) #[[ATTR0:[0-9]+]] {
20 ; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr @__msan_param_tls, align 8
21 ; CHECK-NEXT: call void @llvm.donothing()
22 ; CHECK-NEXT: [[ARG_ADDR:%.*]] = alloca i8, align 4
23 ; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i64
24 ; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 193514046488576
25 ; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr
26 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[TMP3]], i8 -1, i64 1, i1 false)
27 ; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i64
28 ; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 193514046488576
29 ; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
30 ; CHECK-NEXT: store i8 [[TMP0]], ptr [[TMP6]], align 4
31 ; CHECK-NEXT: store i8 [[ARG]], ptr [[ARG_ADDR]], align 4
32 ; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8
33 ; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG_ADDR]])
34 ; CHECK-NEXT: [[TMP7:%.*]] = load i8, ptr [[ARG_ADDR]], align 4
35 ; CHECK-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i64
36 ; CHECK-NEXT: [[TMP9:%.*]] = xor i64 [[TMP8]], 193514046488576
37 ; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP9]] to ptr
38 ; CHECK-NEXT: [[_MSLD:%.*]] = load i8, ptr [[TMP10]], align 4
39 ; CHECK-NEXT: [[_MSPROP:%.*]] = zext i8 [[_MSLD]] to i32
40 ; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[TMP7]] to i32
41 ; CHECK-NEXT: store i8 [[_MSLD]], ptr @__msan_param_tls, align 8
42 ; CHECK-NEXT: store i32 0, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8
43 ; CHECK-NEXT: store i32 [[_MSPROP]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 16) to ptr), align 8
44 ; CHECK-NEXT: store i32 [[_MSPROP]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_va_arg_tls to i64), i64 16) to ptr), align 8
45 ; CHECK-NEXT: store i64 0, ptr @__msan_va_arg_overflow_size_tls, align 8
46 ; CHECK-NEXT: call void (i8, i32, ...) @_Z5test2IcEvT_iz(i8 noundef [[TMP7]], i32 noundef 1, i32 noundef [[CONV]])
47 ; CHECK-NEXT: ret void
50 %arg.addr = alloca i8, align 4
51 store i8 %arg, ptr %arg.addr, align 4
52 call void @_Z3usePv(ptr noundef nonnull %arg.addr)
53 %0 = load i8, ptr %arg.addr, align 4
54 %conv = zext i8 %0 to i32
55 call void (i8, i32, ...) @_Z5test2IcEvT_iz(i8 noundef %0, i32 noundef 1, i32 noundef %conv)
59 define linkonce_odr dso_local void @_Z4testIiEvT_(i32 noundef %arg) sanitize_memory {
60 ; CHECK-LABEL: define linkonce_odr dso_local void @_Z4testIiEvT_(
61 ; CHECK-SAME: i32 noundef [[ARG:%.*]]) #[[ATTR0]] {
63 ; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @__msan_param_tls, align 8
64 ; CHECK-NEXT: call void @llvm.donothing()
65 ; CHECK-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
66 ; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i64
67 ; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 193514046488576
68 ; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr
69 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[TMP3]], i8 -1, i64 4, i1 false)
70 ; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i64
71 ; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 193514046488576
72 ; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
73 ; CHECK-NEXT: store i32 [[TMP0]], ptr [[TMP6]], align 4
74 ; CHECK-NEXT: store i32 [[ARG]], ptr [[ARG_ADDR]], align 4
75 ; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8
76 ; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG_ADDR]])
77 ; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[ARG_ADDR]], align 4
78 ; CHECK-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i64
79 ; CHECK-NEXT: [[TMP9:%.*]] = xor i64 [[TMP8]], 193514046488576
80 ; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP9]] to ptr
81 ; CHECK-NEXT: [[_MSLD:%.*]] = load i32, ptr [[TMP10]], align 4
82 ; CHECK-NEXT: store i32 [[_MSLD]], ptr @__msan_param_tls, align 8
83 ; CHECK-NEXT: store i32 0, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8
84 ; CHECK-NEXT: store i32 [[_MSLD]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 16) to ptr), align 8
85 ; CHECK-NEXT: store i32 [[_MSLD]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_va_arg_tls to i64), i64 16) to ptr), align 8
86 ; CHECK-NEXT: store i64 0, ptr @__msan_va_arg_overflow_size_tls, align 8
87 ; CHECK-NEXT: call void (i32, i32, ...) @_Z5test2IiEvT_iz(i32 noundef [[TMP7]], i32 noundef 1, i32 noundef [[TMP7]])
88 ; CHECK-NEXT: ret void
91 %arg.addr = alloca i32, align 4
92 store i32 %arg, ptr %arg.addr, align 4
93 call void @_Z3usePv(ptr noundef nonnull %arg.addr)
94 %0 = load i32, ptr %arg.addr, align 4
95 call void (i32, i32, ...) @_Z5test2IiEvT_iz(i32 noundef %0, i32 noundef 1, i32 noundef %0)
99 define linkonce_odr dso_local void @_Z4testIfEvT_(float noundef %arg) sanitize_memory {
100 ; CHECK-LABEL: define linkonce_odr dso_local void @_Z4testIfEvT_(
101 ; CHECK-SAME: float noundef [[ARG:%.*]]) #[[ATTR0]] {
103 ; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @__msan_param_tls, align 8
104 ; CHECK-NEXT: call void @llvm.donothing()
105 ; CHECK-NEXT: [[ARG_ADDR:%.*]] = alloca float, align 4
106 ; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i64
107 ; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 193514046488576
108 ; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr
109 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[TMP3]], i8 -1, i64 4, i1 false)
110 ; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i64
111 ; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 193514046488576
112 ; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
113 ; CHECK-NEXT: store i32 [[TMP0]], ptr [[TMP6]], align 4
114 ; CHECK-NEXT: store float [[ARG]], ptr [[ARG_ADDR]], align 4
115 ; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8
116 ; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG_ADDR]])
117 ; CHECK-NEXT: [[TMP7:%.*]] = load float, ptr [[ARG_ADDR]], align 4
118 ; CHECK-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i64
119 ; CHECK-NEXT: [[TMP9:%.*]] = xor i64 [[TMP8]], 193514046488576
120 ; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP9]] to ptr
121 ; CHECK-NEXT: [[_MSLD:%.*]] = load i32, ptr [[TMP10]], align 4
122 ; CHECK-NEXT: [[TMP11:%.*]] = zext i32 [[_MSLD]] to i64
123 ; CHECK-NEXT: [[CONV:%.*]] = fpext float [[TMP7]] to double
124 ; CHECK-NEXT: store i32 [[_MSLD]], ptr @__msan_param_tls, align 8
125 ; CHECK-NEXT: store i32 0, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8
126 ; CHECK-NEXT: store i64 [[TMP11]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 16) to ptr), align 8
127 ; CHECK-NEXT: store i64 [[TMP11]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_va_arg_tls to i64), i64 80) to ptr), align 8
128 ; CHECK-NEXT: store i64 0, ptr @__msan_va_arg_overflow_size_tls, align 8
129 ; CHECK-NEXT: call void (float, i32, ...) @_Z5test2IfEvT_iz(float noundef [[TMP7]], i32 noundef 1, double noundef [[CONV]])
130 ; CHECK-NEXT: ret void
133 %arg.addr = alloca float, align 4
134 store float %arg, ptr %arg.addr, align 4
135 call void @_Z3usePv(ptr noundef nonnull %arg.addr)
136 %0 = load float, ptr %arg.addr, align 4
137 %conv = fpext float %0 to double
138 call void (float, i32, ...) @_Z5test2IfEvT_iz(float noundef %0, i32 noundef 1, double noundef %conv)
142 define linkonce_odr dso_local void @_Z4testIdEvT_(double noundef %arg) sanitize_memory {
143 ; CHECK-LABEL: define linkonce_odr dso_local void @_Z4testIdEvT_(
144 ; CHECK-SAME: double noundef [[ARG:%.*]]) #[[ATTR0]] {
146 ; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_param_tls, align 8
147 ; CHECK-NEXT: call void @llvm.donothing()
148 ; CHECK-NEXT: [[ARG_ADDR:%.*]] = alloca double, align 8
149 ; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i64
150 ; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 193514046488576
151 ; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr
152 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP3]], i8 -1, i64 8, i1 false)
153 ; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i64
154 ; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 193514046488576
155 ; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
156 ; CHECK-NEXT: store i64 [[TMP0]], ptr [[TMP6]], align 8
157 ; CHECK-NEXT: store double [[ARG]], ptr [[ARG_ADDR]], align 8
158 ; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8
159 ; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG_ADDR]])
160 ; CHECK-NEXT: [[TMP7:%.*]] = load double, ptr [[ARG_ADDR]], align 8
161 ; CHECK-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i64
162 ; CHECK-NEXT: [[TMP9:%.*]] = xor i64 [[TMP8]], 193514046488576
163 ; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP9]] to ptr
164 ; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP10]], align 8
165 ; CHECK-NEXT: store i64 [[_MSLD]], ptr @__msan_param_tls, align 8
166 ; CHECK-NEXT: store i32 0, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8
167 ; CHECK-NEXT: store i64 [[_MSLD]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 16) to ptr), align 8
168 ; CHECK-NEXT: store i64 [[_MSLD]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_va_arg_tls to i64), i64 80) to ptr), align 8
169 ; CHECK-NEXT: store i64 0, ptr @__msan_va_arg_overflow_size_tls, align 8
170 ; CHECK-NEXT: call void (double, i32, ...) @_Z5test2IdEvT_iz(double noundef [[TMP7]], i32 noundef 1, double noundef [[TMP7]])
171 ; CHECK-NEXT: ret void
174 %arg.addr = alloca double, align 8
175 store double %arg, ptr %arg.addr, align 8
176 call void @_Z3usePv(ptr noundef nonnull %arg.addr)
177 %0 = load double, ptr %arg.addr, align 8
178 call void (double, i32, ...) @_Z5test2IdEvT_iz(double noundef %0, i32 noundef 1, double noundef %0)
182 define linkonce_odr dso_local void @_Z4testIeEvT_(fp128 noundef %arg) sanitize_memory {
183 ; CHECK-LABEL: define linkonce_odr dso_local void @_Z4testIeEvT_(
184 ; CHECK-SAME: fp128 noundef [[ARG:%.*]]) #[[ATTR0]] {
186 ; CHECK-NEXT: [[TMP0:%.*]] = load i128, ptr @__msan_param_tls, align 8
187 ; CHECK-NEXT: call void @llvm.donothing()
188 ; CHECK-NEXT: [[ARG_ADDR:%.*]] = alloca fp128, align 16
189 ; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i64
190 ; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 193514046488576
191 ; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr
192 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 16 [[TMP3]], i8 -1, i64 16, i1 false)
193 ; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i64
194 ; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 193514046488576
195 ; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
196 ; CHECK-NEXT: store i128 [[TMP0]], ptr [[TMP6]], align 16
197 ; CHECK-NEXT: store fp128 [[ARG]], ptr [[ARG_ADDR]], align 16
198 ; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8
199 ; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG_ADDR]])
200 ; CHECK-NEXT: [[TMP7:%.*]] = load fp128, ptr [[ARG_ADDR]], align 16
201 ; CHECK-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[ARG_ADDR]] to i64
202 ; CHECK-NEXT: [[TMP9:%.*]] = xor i64 [[TMP8]], 193514046488576
203 ; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP9]] to ptr
204 ; CHECK-NEXT: [[_MSLD:%.*]] = load i128, ptr [[TMP10]], align 16
205 ; CHECK-NEXT: store i128 [[_MSLD]], ptr @__msan_param_tls, align 8
206 ; CHECK-NEXT: store i32 0, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 16) to ptr), align 8
207 ; CHECK-NEXT: store i128 [[_MSLD]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 24) to ptr), align 8
208 ; CHECK-NEXT: store i128 [[_MSLD]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_va_arg_tls to i64), i64 80) to ptr), align 8
209 ; CHECK-NEXT: store i64 0, ptr @__msan_va_arg_overflow_size_tls, align 8
210 ; CHECK-NEXT: call void (fp128, i32, ...) @_Z5test2IeEvT_iz(fp128 noundef [[TMP7]], i32 noundef 1, fp128 noundef [[TMP7]])
211 ; CHECK-NEXT: ret void
214 %arg.addr = alloca fp128, align 16
215 store fp128 %arg, ptr %arg.addr, align 16
216 call void @_Z3usePv(ptr noundef nonnull %arg.addr)
217 %0 = load fp128, ptr %arg.addr, align 16
218 call void (fp128, i32, ...) @_Z5test2IeEvT_iz(fp128 noundef %0, i32 noundef 1, fp128 noundef %0)
222 define linkonce_odr dso_local void @_Z4testI6IntIntEvT_(i64 %arg.coerce) sanitize_memory {
223 ; CHECK-LABEL: define linkonce_odr dso_local void @_Z4testI6IntIntEvT_(
224 ; CHECK-SAME: i64 [[ARG_COERCE:%.*]]) #[[ATTR0]] {
226 ; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_param_tls, align 8
227 ; CHECK-NEXT: call void @llvm.donothing()
228 ; CHECK-NEXT: [[ARG:%.*]] = alloca [[STRUCT_INTINT:%.*]], align 8
229 ; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[ARG]] to i64
230 ; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 193514046488576
231 ; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr
232 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP3]], i8 -1, i64 8, i1 false)
233 ; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARG]] to i64
234 ; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 193514046488576
235 ; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
236 ; CHECK-NEXT: store i64 [[TMP0]], ptr [[TMP6]], align 8
237 ; CHECK-NEXT: store i64 [[ARG_COERCE]], ptr [[ARG]], align 8
238 ; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8
239 ; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG]])
240 ; CHECK-NEXT: [[AGG_TMP_SROA_0_0_COPYLOAD:%.*]] = load i64, ptr [[ARG]], align 8
241 ; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARG]] to i64
242 ; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 193514046488576
243 ; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr
244 ; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP9]], align 8
245 ; CHECK-NEXT: store i64 [[_MSLD]], ptr @__msan_param_tls, align 8
246 ; CHECK-NEXT: store i32 0, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8
247 ; CHECK-NEXT: store i64 [[_MSLD]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 16) to ptr), align 8
248 ; CHECK-NEXT: store i64 [[_MSLD]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_va_arg_tls to i64), i64 16) to ptr), align 8
249 ; CHECK-NEXT: store i64 0, ptr @__msan_va_arg_overflow_size_tls, align 8
250 ; CHECK-NEXT: call void (i64, i32, ...) @_Z5test2I6IntIntEvT_iz(i64 [[AGG_TMP_SROA_0_0_COPYLOAD]], i32 noundef 1, i64 [[AGG_TMP_SROA_0_0_COPYLOAD]])
251 ; CHECK-NEXT: ret void
254 %arg = alloca %struct.IntInt, align 8
255 store i64 %arg.coerce, ptr %arg, align 8
256 call void @_Z3usePv(ptr noundef nonnull %arg)
257 %agg.tmp.sroa.0.0.copyload = load i64, ptr %arg, align 8
258 call void (i64, i32, ...) @_Z5test2I6IntIntEvT_iz(i64 %agg.tmp.sroa.0.0.copyload, i32 noundef 1, i64 %agg.tmp.sroa.0.0.copyload)
262 define linkonce_odr dso_local void @_Z4testI10Int64Int64EvT_([2 x i64] %arg.coerce) sanitize_memory {
263 ; CHECK-LABEL: define linkonce_odr dso_local void @_Z4testI10Int64Int64EvT_(
264 ; CHECK-SAME: [2 x i64] [[ARG_COERCE:%.*]]) #[[ATTR0]] {
266 ; CHECK-NEXT: [[TMP0:%.*]] = load [2 x i64], ptr @__msan_param_tls, align 8
267 ; CHECK-NEXT: call void @llvm.donothing()
268 ; CHECK-NEXT: [[ARG:%.*]] = alloca [[STRUCT_INT64INT64:%.*]], align 8
269 ; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[ARG]] to i64
270 ; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 193514046488576
271 ; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr
272 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP3]], i8 -1, i64 16, i1 false)
273 ; CHECK-NEXT: [[TMP4:%.*]] = extractvalue [2 x i64] [[TMP0]], 0
274 ; CHECK-NEXT: [[ARG_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x i64] [[ARG_COERCE]], 0
275 ; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[ARG]] to i64
276 ; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 193514046488576
277 ; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr
278 ; CHECK-NEXT: store i64 [[TMP4]], ptr [[TMP7]], align 8
279 ; CHECK-NEXT: store i64 [[ARG_COERCE_FCA_0_EXTRACT]], ptr [[ARG]], align 8
280 ; CHECK-NEXT: [[TMP8:%.*]] = extractvalue [2 x i64] [[TMP0]], 1
281 ; CHECK-NEXT: [[ARG_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x i64] [[ARG_COERCE]], 1
282 ; CHECK-NEXT: [[ARG_COERCE_FCA_1_GEP:%.*]] = getelementptr inbounds [2 x i64], ptr [[ARG]], i64 0, i64 1
283 ; CHECK-NEXT: [[TMP9:%.*]] = ptrtoint ptr [[ARG_COERCE_FCA_1_GEP]] to i64
284 ; CHECK-NEXT: [[TMP10:%.*]] = xor i64 [[TMP9]], 193514046488576
285 ; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr
286 ; CHECK-NEXT: store i64 [[TMP8]], ptr [[TMP11]], align 8
287 ; CHECK-NEXT: store i64 [[ARG_COERCE_FCA_1_EXTRACT]], ptr [[ARG_COERCE_FCA_1_GEP]], align 8
288 ; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8
289 ; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG]])
290 ; CHECK-NEXT: [[AGG_TMP_SROA_0_0_COPYLOAD:%.*]] = load i64, ptr [[ARG]], align 8
291 ; CHECK-NEXT: [[TMP12:%.*]] = ptrtoint ptr [[ARG]] to i64
292 ; CHECK-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], 193514046488576
293 ; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP13]] to ptr
294 ; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP14]], align 8
295 ; CHECK-NEXT: [[AGG_TMP_SROA_2_0_COPYLOAD:%.*]] = load i64, ptr [[ARG_COERCE_FCA_1_GEP]], align 8
296 ; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[ARG_COERCE_FCA_1_GEP]] to i64
297 ; CHECK-NEXT: [[TMP16:%.*]] = xor i64 [[TMP15]], 193514046488576
298 ; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr
299 ; CHECK-NEXT: [[_MSLD1:%.*]] = load i64, ptr [[TMP17]], align 8
300 ; CHECK-NEXT: [[TMP18:%.*]] = insertvalue [2 x i64] [i64 -1, i64 -1], i64 [[_MSLD]], 0
301 ; CHECK-NEXT: [[DOTFCA_0_INSERT2:%.*]] = insertvalue [2 x i64] poison, i64 [[AGG_TMP_SROA_0_0_COPYLOAD]], 0
302 ; CHECK-NEXT: [[TMP19:%.*]] = insertvalue [2 x i64] [[TMP18]], i64 [[_MSLD1]], 1
303 ; CHECK-NEXT: [[DOTFCA_1_INSERT3:%.*]] = insertvalue [2 x i64] [[DOTFCA_0_INSERT2]], i64 [[AGG_TMP_SROA_2_0_COPYLOAD]], 1
304 ; CHECK-NEXT: store [2 x i64] [[TMP19]], ptr @__msan_param_tls, align 8
305 ; CHECK-NEXT: store i32 0, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 16) to ptr), align 8
306 ; CHECK-NEXT: store [2 x i64] [[TMP19]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 24) to ptr), align 8
307 ; CHECK-NEXT: store [2 x i64] [[TMP19]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_va_arg_tls to i64), i64 24) to ptr), align 8
308 ; CHECK-NEXT: store i64 0, ptr @__msan_va_arg_overflow_size_tls, align 8
309 ; CHECK-NEXT: call void ([2 x i64], i32, ...) @_Z5test2I10Int64Int64EvT_iz([2 x i64] [[DOTFCA_1_INSERT3]], i32 noundef 1, [2 x i64] [[DOTFCA_1_INSERT3]])
310 ; CHECK-NEXT: ret void
313 %arg = alloca %struct.Int64Int64, align 8
314 %arg.coerce.fca.0.extract = extractvalue [2 x i64] %arg.coerce, 0
315 store i64 %arg.coerce.fca.0.extract, ptr %arg, align 8
316 %arg.coerce.fca.1.extract = extractvalue [2 x i64] %arg.coerce, 1
317 %arg.coerce.fca.1.gep = getelementptr inbounds [2 x i64], ptr %arg, i64 0, i64 1
318 store i64 %arg.coerce.fca.1.extract, ptr %arg.coerce.fca.1.gep, align 8
319 call void @_Z3usePv(ptr noundef nonnull %arg)
320 %agg.tmp.sroa.0.0.copyload = load i64, ptr %arg, align 8
321 %agg.tmp.sroa.2.0.copyload = load i64, ptr %arg.coerce.fca.1.gep, align 8
322 %.fca.0.insert2 = insertvalue [2 x i64] poison, i64 %agg.tmp.sroa.0.0.copyload, 0
323 %.fca.1.insert3 = insertvalue [2 x i64] %.fca.0.insert2, i64 %agg.tmp.sroa.2.0.copyload, 1
324 call void ([2 x i64], i32, ...) @_Z5test2I10Int64Int64EvT_iz([2 x i64] %.fca.1.insert3, i32 noundef 1, [2 x i64] %.fca.1.insert3)
328 define linkonce_odr dso_local void @_Z4testI12DoubleDoubleEvT_([2 x double] alignstack(8) %arg.coerce) sanitize_memory {
329 ; CHECK-LABEL: define linkonce_odr dso_local void @_Z4testI12DoubleDoubleEvT_(
330 ; CHECK-SAME: [2 x double] alignstack(8) [[ARG_COERCE:%.*]]) #[[ATTR0]] {
332 ; CHECK-NEXT: [[TMP0:%.*]] = load [2 x i64], ptr @__msan_param_tls, align 8
333 ; CHECK-NEXT: call void @llvm.donothing()
334 ; CHECK-NEXT: [[ARG:%.*]] = alloca [[STRUCT_DOUBLEDOUBLE:%.*]], align 8
335 ; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[ARG]] to i64
336 ; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 193514046488576
337 ; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr
338 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP3]], i8 -1, i64 16, i1 false)
339 ; CHECK-NEXT: [[TMP4:%.*]] = extractvalue [2 x i64] [[TMP0]], 0
340 ; CHECK-NEXT: [[ARG_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x double] [[ARG_COERCE]], 0
341 ; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[ARG]] to i64
342 ; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 193514046488576
343 ; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr
344 ; CHECK-NEXT: store i64 [[TMP4]], ptr [[TMP7]], align 8
345 ; CHECK-NEXT: store double [[ARG_COERCE_FCA_0_EXTRACT]], ptr [[ARG]], align 8
346 ; CHECK-NEXT: [[TMP8:%.*]] = extractvalue [2 x i64] [[TMP0]], 1
347 ; CHECK-NEXT: [[ARG_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x double] [[ARG_COERCE]], 1
348 ; CHECK-NEXT: [[ARG_COERCE_FCA_1_GEP:%.*]] = getelementptr inbounds [2 x double], ptr [[ARG]], i64 0, i64 1
349 ; CHECK-NEXT: [[TMP9:%.*]] = ptrtoint ptr [[ARG_COERCE_FCA_1_GEP]] to i64
350 ; CHECK-NEXT: [[TMP10:%.*]] = xor i64 [[TMP9]], 193514046488576
351 ; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr
352 ; CHECK-NEXT: store i64 [[TMP8]], ptr [[TMP11]], align 8
353 ; CHECK-NEXT: store double [[ARG_COERCE_FCA_1_EXTRACT]], ptr [[ARG_COERCE_FCA_1_GEP]], align 8
354 ; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8
355 ; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG]])
356 ; CHECK-NEXT: [[AGG_TMP_SROA_0_0_COPYLOAD:%.*]] = load double, ptr [[ARG]], align 8
357 ; CHECK-NEXT: [[TMP12:%.*]] = ptrtoint ptr [[ARG]] to i64
358 ; CHECK-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], 193514046488576
359 ; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP13]] to ptr
360 ; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP14]], align 8
361 ; CHECK-NEXT: [[AGG_TMP_SROA_2_0_COPYLOAD:%.*]] = load double, ptr [[ARG_COERCE_FCA_1_GEP]], align 8
362 ; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[ARG_COERCE_FCA_1_GEP]] to i64
363 ; CHECK-NEXT: [[TMP16:%.*]] = xor i64 [[TMP15]], 193514046488576
364 ; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr
365 ; CHECK-NEXT: [[_MSLD1:%.*]] = load i64, ptr [[TMP17]], align 8
366 ; CHECK-NEXT: [[TMP18:%.*]] = insertvalue [2 x i64] [i64 -1, i64 -1], i64 [[_MSLD]], 0
367 ; CHECK-NEXT: [[DOTFCA_0_INSERT2:%.*]] = insertvalue [2 x double] poison, double [[AGG_TMP_SROA_0_0_COPYLOAD]], 0
368 ; CHECK-NEXT: [[TMP19:%.*]] = insertvalue [2 x i64] [[TMP18]], i64 [[_MSLD1]], 1
369 ; CHECK-NEXT: [[DOTFCA_1_INSERT3:%.*]] = insertvalue [2 x double] [[DOTFCA_0_INSERT2]], double [[AGG_TMP_SROA_2_0_COPYLOAD]], 1
370 ; CHECK-NEXT: store [2 x i64] [[TMP19]], ptr @__msan_param_tls, align 8
371 ; CHECK-NEXT: store i32 0, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 16) to ptr), align 8
372 ; CHECK-NEXT: store [2 x i64] [[TMP19]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 24) to ptr), align 8
373 ; CHECK-NEXT: store [2 x i64] [[TMP19]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_va_arg_tls to i64), i64 96) to ptr), align 8
374 ; CHECK-NEXT: store i64 0, ptr @__msan_va_arg_overflow_size_tls, align 8
375 ; CHECK-NEXT: call void ([2 x double], i32, ...) @_Z5test2I12DoubleDoubleEvT_iz([2 x double] alignstack(8) [[DOTFCA_1_INSERT3]], i32 noundef 1, [2 x double] alignstack(8) [[DOTFCA_1_INSERT3]])
376 ; CHECK-NEXT: ret void
379 %arg = alloca %struct.DoubleDouble, align 8
380 %arg.coerce.fca.0.extract = extractvalue [2 x double] %arg.coerce, 0
381 store double %arg.coerce.fca.0.extract, ptr %arg, align 8
382 %arg.coerce.fca.1.extract = extractvalue [2 x double] %arg.coerce, 1
383 %arg.coerce.fca.1.gep = getelementptr inbounds [2 x double], ptr %arg, i64 0, i64 1
384 store double %arg.coerce.fca.1.extract, ptr %arg.coerce.fca.1.gep, align 8
385 call void @_Z3usePv(ptr noundef nonnull %arg)
386 %agg.tmp.sroa.0.0.copyload = load double, ptr %arg, align 8
387 %agg.tmp.sroa.2.0.copyload = load double, ptr %arg.coerce.fca.1.gep, align 8
388 %.fca.0.insert2 = insertvalue [2 x double] poison, double %agg.tmp.sroa.0.0.copyload, 0
389 %.fca.1.insert3 = insertvalue [2 x double] %.fca.0.insert2, double %agg.tmp.sroa.2.0.copyload, 1
390 call void ([2 x double], i32, ...) @_Z5test2I12DoubleDoubleEvT_iz([2 x double] alignstack(8) %.fca.1.insert3, i32 noundef 1, [2 x double] alignstack(8) %.fca.1.insert3)
394 define linkonce_odr dso_local void @_Z4testI7Double4EvT_([4 x double] alignstack(8) %arg.coerce) sanitize_memory {
395 ; CHECK-LABEL: define linkonce_odr dso_local void @_Z4testI7Double4EvT_(
396 ; CHECK-SAME: [4 x double] alignstack(8) [[ARG_COERCE:%.*]]) #[[ATTR0]] {
398 ; CHECK-NEXT: [[TMP0:%.*]] = load [4 x i64], ptr @__msan_param_tls, align 8
399 ; CHECK-NEXT: call void @llvm.donothing()
400 ; CHECK-NEXT: [[ARG:%.*]] = alloca [[STRUCT_DOUBLE4:%.*]], align 8
401 ; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[ARG]] to i64
402 ; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 193514046488576
403 ; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr
404 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP3]], i8 -1, i64 32, i1 false)
405 ; CHECK-NEXT: [[TMP4:%.*]] = extractvalue [4 x i64] [[TMP0]], 0
406 ; CHECK-NEXT: [[ARG_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x double] [[ARG_COERCE]], 0
407 ; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[ARG]] to i64
408 ; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 193514046488576
409 ; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr
410 ; CHECK-NEXT: store i64 [[TMP4]], ptr [[TMP7]], align 8
411 ; CHECK-NEXT: store double [[ARG_COERCE_FCA_0_EXTRACT]], ptr [[ARG]], align 8
412 ; CHECK-NEXT: [[TMP8:%.*]] = extractvalue [4 x i64] [[TMP0]], 1
413 ; CHECK-NEXT: [[ARG_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x double] [[ARG_COERCE]], 1
414 ; CHECK-NEXT: [[ARG_COERCE_FCA_1_GEP:%.*]] = getelementptr inbounds [4 x double], ptr [[ARG]], i64 0, i64 1
415 ; CHECK-NEXT: [[TMP9:%.*]] = ptrtoint ptr [[ARG_COERCE_FCA_1_GEP]] to i64
416 ; CHECK-NEXT: [[TMP10:%.*]] = xor i64 [[TMP9]], 193514046488576
417 ; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr
418 ; CHECK-NEXT: store i64 [[TMP8]], ptr [[TMP11]], align 8
419 ; CHECK-NEXT: store double [[ARG_COERCE_FCA_1_EXTRACT]], ptr [[ARG_COERCE_FCA_1_GEP]], align 8
420 ; CHECK-NEXT: [[TMP12:%.*]] = extractvalue [4 x i64] [[TMP0]], 2
421 ; CHECK-NEXT: [[ARG_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x double] [[ARG_COERCE]], 2
422 ; CHECK-NEXT: [[ARG_COERCE_FCA_2_GEP:%.*]] = getelementptr inbounds [4 x double], ptr [[ARG]], i64 0, i64 2
423 ; CHECK-NEXT: [[TMP13:%.*]] = ptrtoint ptr [[ARG_COERCE_FCA_2_GEP]] to i64
424 ; CHECK-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], 193514046488576
425 ; CHECK-NEXT: [[TMP15:%.*]] = inttoptr i64 [[TMP14]] to ptr
426 ; CHECK-NEXT: store i64 [[TMP12]], ptr [[TMP15]], align 8
427 ; CHECK-NEXT: store double [[ARG_COERCE_FCA_2_EXTRACT]], ptr [[ARG_COERCE_FCA_2_GEP]], align 8
428 ; CHECK-NEXT: [[TMP16:%.*]] = extractvalue [4 x i64] [[TMP0]], 3
429 ; CHECK-NEXT: [[ARG_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x double] [[ARG_COERCE]], 3
430 ; CHECK-NEXT: [[ARG_COERCE_FCA_3_GEP:%.*]] = getelementptr inbounds [4 x double], ptr [[ARG]], i64 0, i64 3
431 ; CHECK-NEXT: [[TMP17:%.*]] = ptrtoint ptr [[ARG_COERCE_FCA_3_GEP]] to i64
432 ; CHECK-NEXT: [[TMP18:%.*]] = xor i64 [[TMP17]], 193514046488576
433 ; CHECK-NEXT: [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
434 ; CHECK-NEXT: store i64 [[TMP16]], ptr [[TMP19]], align 8
435 ; CHECK-NEXT: store double [[ARG_COERCE_FCA_3_EXTRACT]], ptr [[ARG_COERCE_FCA_3_GEP]], align 8
436 ; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8
437 ; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG]])
438 ; CHECK-NEXT: [[AGG_TMP_SROA_0_0_COPYLOAD:%.*]] = load double, ptr [[ARG]], align 8
439 ; CHECK-NEXT: [[TMP20:%.*]] = ptrtoint ptr [[ARG]] to i64
440 ; CHECK-NEXT: [[TMP21:%.*]] = xor i64 [[TMP20]], 193514046488576
441 ; CHECK-NEXT: [[TMP22:%.*]] = inttoptr i64 [[TMP21]] to ptr
442 ; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP22]], align 8
443 ; CHECK-NEXT: [[AGG_TMP_SROA_2_0_COPYLOAD:%.*]] = load double, ptr [[ARG_COERCE_FCA_1_GEP]], align 8
444 ; CHECK-NEXT: [[TMP23:%.*]] = ptrtoint ptr [[ARG_COERCE_FCA_1_GEP]] to i64
445 ; CHECK-NEXT: [[TMP24:%.*]] = xor i64 [[TMP23]], 193514046488576
446 ; CHECK-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP24]] to ptr
447 ; CHECK-NEXT: [[_MSLD1:%.*]] = load i64, ptr [[TMP25]], align 8
448 ; CHECK-NEXT: [[AGG_TMP_SROA_3_0_COPYLOAD:%.*]] = load double, ptr [[ARG_COERCE_FCA_2_GEP]], align 8
449 ; CHECK-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[ARG_COERCE_FCA_2_GEP]] to i64
450 ; CHECK-NEXT: [[TMP27:%.*]] = xor i64 [[TMP26]], 193514046488576
451 ; CHECK-NEXT: [[TMP28:%.*]] = inttoptr i64 [[TMP27]] to ptr
452 ; CHECK-NEXT: [[_MSLD2:%.*]] = load i64, ptr [[TMP28]], align 8
453 ; CHECK-NEXT: [[AGG_TMP_SROA_4_0_COPYLOAD:%.*]] = load double, ptr [[ARG_COERCE_FCA_3_GEP]], align 8
454 ; CHECK-NEXT: [[TMP29:%.*]] = ptrtoint ptr [[ARG_COERCE_FCA_3_GEP]] to i64
455 ; CHECK-NEXT: [[TMP30:%.*]] = xor i64 [[TMP29]], 193514046488576
456 ; CHECK-NEXT: [[TMP31:%.*]] = inttoptr i64 [[TMP30]] to ptr
457 ; CHECK-NEXT: [[_MSLD3:%.*]] = load i64, ptr [[TMP31]], align 8
458 ; CHECK-NEXT: [[TMP32:%.*]] = insertvalue [4 x i64] [i64 -1, i64 -1, i64 -1, i64 -1], i64 [[_MSLD]], 0
459 ; CHECK-NEXT: [[DOTFCA_0_INSERT4:%.*]] = insertvalue [4 x double] poison, double [[AGG_TMP_SROA_0_0_COPYLOAD]], 0
460 ; CHECK-NEXT: [[TMP33:%.*]] = insertvalue [4 x i64] [[TMP32]], i64 [[_MSLD1]], 1
461 ; CHECK-NEXT: [[DOTFCA_1_INSERT5:%.*]] = insertvalue [4 x double] [[DOTFCA_0_INSERT4]], double [[AGG_TMP_SROA_2_0_COPYLOAD]], 1
462 ; CHECK-NEXT: [[TMP34:%.*]] = insertvalue [4 x i64] [[TMP33]], i64 [[_MSLD2]], 2
463 ; CHECK-NEXT: [[DOTFCA_2_INSERT6:%.*]] = insertvalue [4 x double] [[DOTFCA_1_INSERT5]], double [[AGG_TMP_SROA_3_0_COPYLOAD]], 2
464 ; CHECK-NEXT: [[TMP35:%.*]] = insertvalue [4 x i64] [[TMP34]], i64 [[_MSLD3]], 3
465 ; CHECK-NEXT: [[DOTFCA_3_INSERT7:%.*]] = insertvalue [4 x double] [[DOTFCA_2_INSERT6]], double [[AGG_TMP_SROA_4_0_COPYLOAD]], 3
466 ; CHECK-NEXT: store [4 x i64] [[TMP35]], ptr @__msan_param_tls, align 8
467 ; CHECK-NEXT: store i32 0, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 32) to ptr), align 8
468 ; CHECK-NEXT: store [4 x i64] [[TMP35]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 40) to ptr), align 8
469 ; CHECK-NEXT: store [4 x i64] [[TMP35]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_va_arg_tls to i64), i64 128) to ptr), align 8
470 ; CHECK-NEXT: store i64 0, ptr @__msan_va_arg_overflow_size_tls, align 8
471 ; CHECK-NEXT: call void ([4 x double], i32, ...) @_Z5test2I7Double4EvT_iz([4 x double] alignstack(8) [[DOTFCA_3_INSERT7]], i32 noundef 1, [4 x double] alignstack(8) [[DOTFCA_3_INSERT7]])
472 ; CHECK-NEXT: ret void
475 %arg = alloca %struct.Double4, align 8
476 %arg.coerce.fca.0.extract = extractvalue [4 x double] %arg.coerce, 0
477 store double %arg.coerce.fca.0.extract, ptr %arg, align 8
478 %arg.coerce.fca.1.extract = extractvalue [4 x double] %arg.coerce, 1
479 %arg.coerce.fca.1.gep = getelementptr inbounds [4 x double], ptr %arg, i64 0, i64 1
480 store double %arg.coerce.fca.1.extract, ptr %arg.coerce.fca.1.gep, align 8
481 %arg.coerce.fca.2.extract = extractvalue [4 x double] %arg.coerce, 2
482 %arg.coerce.fca.2.gep = getelementptr inbounds [4 x double], ptr %arg, i64 0, i64 2
483 store double %arg.coerce.fca.2.extract, ptr %arg.coerce.fca.2.gep, align 8
484 %arg.coerce.fca.3.extract = extractvalue [4 x double] %arg.coerce, 3
485 %arg.coerce.fca.3.gep = getelementptr inbounds [4 x double], ptr %arg, i64 0, i64 3
486 store double %arg.coerce.fca.3.extract, ptr %arg.coerce.fca.3.gep, align 8
487 call void @_Z3usePv(ptr noundef nonnull %arg)
488 %agg.tmp.sroa.0.0.copyload = load double, ptr %arg, align 8
489 %agg.tmp.sroa.2.0.copyload = load double, ptr %arg.coerce.fca.1.gep, align 8
490 %agg.tmp.sroa.3.0.copyload = load double, ptr %arg.coerce.fca.2.gep, align 8
491 %agg.tmp.sroa.4.0.copyload = load double, ptr %arg.coerce.fca.3.gep, align 8
492 %.fca.0.insert4 = insertvalue [4 x double] poison, double %agg.tmp.sroa.0.0.copyload, 0
493 %.fca.1.insert5 = insertvalue [4 x double] %.fca.0.insert4, double %agg.tmp.sroa.2.0.copyload, 1
494 %.fca.2.insert6 = insertvalue [4 x double] %.fca.1.insert5, double %agg.tmp.sroa.3.0.copyload, 2
495 %.fca.3.insert7 = insertvalue [4 x double] %.fca.2.insert6, double %agg.tmp.sroa.4.0.copyload, 3
496 call void ([4 x double], i32, ...) @_Z5test2I7Double4EvT_iz([4 x double] alignstack(8) %.fca.3.insert7, i32 noundef 1, [4 x double] alignstack(8) %.fca.3.insert7)
500 define linkonce_odr dso_local void @_Z4testI11DoubleFloatEvT_([2 x i64] %arg.coerce) sanitize_memory {
501 ; CHECK-LABEL: define linkonce_odr dso_local void @_Z4testI11DoubleFloatEvT_(
502 ; CHECK-SAME: [2 x i64] [[ARG_COERCE:%.*]]) #[[ATTR0]] {
504 ; CHECK-NEXT: [[TMP0:%.*]] = load [2 x i64], ptr @__msan_param_tls, align 8
505 ; CHECK-NEXT: call void @llvm.donothing()
506 ; CHECK-NEXT: [[ARG:%.*]] = alloca [[STRUCT_DOUBLEFLOAT:%.*]], align 8
507 ; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[ARG]] to i64
508 ; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 193514046488576
509 ; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr
510 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP3]], i8 -1, i64 16, i1 false)
511 ; CHECK-NEXT: [[TMP4:%.*]] = extractvalue [2 x i64] [[TMP0]], 0
512 ; CHECK-NEXT: [[ARG_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x i64] [[ARG_COERCE]], 0
513 ; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[ARG]] to i64
514 ; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 193514046488576
515 ; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr
516 ; CHECK-NEXT: store i64 [[TMP4]], ptr [[TMP7]], align 8
517 ; CHECK-NEXT: store i64 [[ARG_COERCE_FCA_0_EXTRACT]], ptr [[ARG]], align 8
518 ; CHECK-NEXT: [[TMP8:%.*]] = extractvalue [2 x i64] [[TMP0]], 1
519 ; CHECK-NEXT: [[ARG_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x i64] [[ARG_COERCE]], 1
520 ; CHECK-NEXT: [[ARG_COERCE_FCA_1_GEP:%.*]] = getelementptr inbounds [2 x i64], ptr [[ARG]], i64 0, i64 1
521 ; CHECK-NEXT: [[TMP9:%.*]] = ptrtoint ptr [[ARG_COERCE_FCA_1_GEP]] to i64
522 ; CHECK-NEXT: [[TMP10:%.*]] = xor i64 [[TMP9]], 193514046488576
523 ; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr
524 ; CHECK-NEXT: store i64 [[TMP8]], ptr [[TMP11]], align 8
525 ; CHECK-NEXT: store i64 [[ARG_COERCE_FCA_1_EXTRACT]], ptr [[ARG_COERCE_FCA_1_GEP]], align 8
526 ; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8
527 ; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG]])
528 ; CHECK-NEXT: [[AGG_TMP_SROA_0_0_COPYLOAD:%.*]] = load i64, ptr [[ARG]], align 8
529 ; CHECK-NEXT: [[TMP12:%.*]] = ptrtoint ptr [[ARG]] to i64
530 ; CHECK-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], 193514046488576
531 ; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP13]] to ptr
532 ; CHECK-NEXT: [[_MSLD:%.*]] = load i64, ptr [[TMP14]], align 8
533 ; CHECK-NEXT: [[AGG_TMP_SROA_2_0_COPYLOAD:%.*]] = load i64, ptr [[ARG_COERCE_FCA_1_GEP]], align 8
534 ; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[ARG_COERCE_FCA_1_GEP]] to i64
535 ; CHECK-NEXT: [[TMP16:%.*]] = xor i64 [[TMP15]], 193514046488576
536 ; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr
537 ; CHECK-NEXT: [[_MSLD1:%.*]] = load i64, ptr [[TMP17]], align 8
538 ; CHECK-NEXT: [[TMP18:%.*]] = insertvalue [2 x i64] [i64 -1, i64 -1], i64 [[_MSLD]], 0
539 ; CHECK-NEXT: [[DOTFCA_0_INSERT2:%.*]] = insertvalue [2 x i64] poison, i64 [[AGG_TMP_SROA_0_0_COPYLOAD]], 0
540 ; CHECK-NEXT: [[TMP19:%.*]] = insertvalue [2 x i64] [[TMP18]], i64 [[_MSLD1]], 1
541 ; CHECK-NEXT: [[DOTFCA_1_INSERT3:%.*]] = insertvalue [2 x i64] [[DOTFCA_0_INSERT2]], i64 [[AGG_TMP_SROA_2_0_COPYLOAD]], 1
542 ; CHECK-NEXT: store [2 x i64] [[TMP19]], ptr @__msan_param_tls, align 8
543 ; CHECK-NEXT: store i32 0, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 16) to ptr), align 8
544 ; CHECK-NEXT: store [2 x i64] [[TMP19]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 24) to ptr), align 8
545 ; CHECK-NEXT: store [2 x i64] [[TMP19]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_va_arg_tls to i64), i64 24) to ptr), align 8
546 ; CHECK-NEXT: store i64 0, ptr @__msan_va_arg_overflow_size_tls, align 8
547 ; CHECK-NEXT: call void ([2 x i64], i32, ...) @_Z5test2I11DoubleFloatEvT_iz([2 x i64] [[DOTFCA_1_INSERT3]], i32 noundef 1, [2 x i64] [[DOTFCA_1_INSERT3]])
548 ; CHECK-NEXT: ret void
551 %arg = alloca %struct.DoubleFloat, align 8
552 %arg.coerce.fca.0.extract = extractvalue [2 x i64] %arg.coerce, 0
553 store i64 %arg.coerce.fca.0.extract, ptr %arg, align 8
554 %arg.coerce.fca.1.extract = extractvalue [2 x i64] %arg.coerce, 1
555 %arg.coerce.fca.1.gep = getelementptr inbounds [2 x i64], ptr %arg, i64 0, i64 1
556 store i64 %arg.coerce.fca.1.extract, ptr %arg.coerce.fca.1.gep, align 8
557 call void @_Z3usePv(ptr noundef nonnull %arg)
558 %agg.tmp.sroa.0.0.copyload = load i64, ptr %arg, align 8
559 %agg.tmp.sroa.2.0.copyload = load i64, ptr %arg.coerce.fca.1.gep, align 8
560 %.fca.0.insert2 = insertvalue [2 x i64] poison, i64 %agg.tmp.sroa.0.0.copyload, 0
561 %.fca.1.insert3 = insertvalue [2 x i64] %.fca.0.insert2, i64 %agg.tmp.sroa.2.0.copyload, 1
562 call void ([2 x i64], i32, ...) @_Z5test2I11DoubleFloatEvT_iz([2 x i64] %.fca.1.insert3, i32 noundef 1, [2 x i64] %.fca.1.insert3)
566 define linkonce_odr dso_local void @_Z4testI11LongDouble2EvT_([2 x fp128] alignstack(16) %arg.coerce) sanitize_memory {
567 ; CHECK-LABEL: define linkonce_odr dso_local void @_Z4testI11LongDouble2EvT_(
568 ; CHECK-SAME: [2 x fp128] alignstack(16) [[ARG_COERCE:%.*]]) #[[ATTR0]] {
570 ; CHECK-NEXT: [[TMP0:%.*]] = load [2 x i128], ptr @__msan_param_tls, align 8
571 ; CHECK-NEXT: call void @llvm.donothing()
572 ; CHECK-NEXT: [[ARG:%.*]] = alloca [[STRUCT_LONGDOUBLE2:%.*]], align 16
573 ; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[ARG]] to i64
574 ; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 193514046488576
575 ; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr
576 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 16 [[TMP3]], i8 -1, i64 32, i1 false)
577 ; CHECK-NEXT: [[TMP4:%.*]] = extractvalue [2 x i128] [[TMP0]], 0
578 ; CHECK-NEXT: [[ARG_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x fp128] [[ARG_COERCE]], 0
579 ; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[ARG]] to i64
580 ; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 193514046488576
581 ; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr
582 ; CHECK-NEXT: store i128 [[TMP4]], ptr [[TMP7]], align 16
583 ; CHECK-NEXT: store fp128 [[ARG_COERCE_FCA_0_EXTRACT]], ptr [[ARG]], align 16
584 ; CHECK-NEXT: [[TMP8:%.*]] = extractvalue [2 x i128] [[TMP0]], 1
585 ; CHECK-NEXT: [[ARG_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x fp128] [[ARG_COERCE]], 1
586 ; CHECK-NEXT: [[ARG_COERCE_FCA_1_GEP:%.*]] = getelementptr inbounds [2 x fp128], ptr [[ARG]], i64 0, i64 1
587 ; CHECK-NEXT: [[TMP9:%.*]] = ptrtoint ptr [[ARG_COERCE_FCA_1_GEP]] to i64
588 ; CHECK-NEXT: [[TMP10:%.*]] = xor i64 [[TMP9]], 193514046488576
589 ; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr
590 ; CHECK-NEXT: store i128 [[TMP8]], ptr [[TMP11]], align 16
591 ; CHECK-NEXT: store fp128 [[ARG_COERCE_FCA_1_EXTRACT]], ptr [[ARG_COERCE_FCA_1_GEP]], align 16
592 ; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8
593 ; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG]])
594 ; CHECK-NEXT: [[AGG_TMP_SROA_0_0_COPYLOAD:%.*]] = load fp128, ptr [[ARG]], align 16
595 ; CHECK-NEXT: [[TMP12:%.*]] = ptrtoint ptr [[ARG]] to i64
596 ; CHECK-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], 193514046488576
597 ; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP13]] to ptr
598 ; CHECK-NEXT: [[_MSLD:%.*]] = load i128, ptr [[TMP14]], align 16
599 ; CHECK-NEXT: [[AGG_TMP_SROA_2_0_COPYLOAD:%.*]] = load fp128, ptr [[ARG_COERCE_FCA_1_GEP]], align 16
600 ; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[ARG_COERCE_FCA_1_GEP]] to i64
601 ; CHECK-NEXT: [[TMP16:%.*]] = xor i64 [[TMP15]], 193514046488576
602 ; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr
603 ; CHECK-NEXT: [[_MSLD1:%.*]] = load i128, ptr [[TMP17]], align 16
604 ; CHECK-NEXT: [[TMP18:%.*]] = insertvalue [2 x i128] [i128 -1, i128 -1], i128 [[_MSLD]], 0
605 ; CHECK-NEXT: [[DOTFCA_0_INSERT4:%.*]] = insertvalue [2 x fp128] poison, fp128 [[AGG_TMP_SROA_0_0_COPYLOAD]], 0
606 ; CHECK-NEXT: [[TMP19:%.*]] = insertvalue [2 x i128] [[TMP18]], i128 [[_MSLD1]], 1
607 ; CHECK-NEXT: [[DOTFCA_1_INSERT5:%.*]] = insertvalue [2 x fp128] [[DOTFCA_0_INSERT4]], fp128 [[AGG_TMP_SROA_2_0_COPYLOAD]], 1
608 ; CHECK-NEXT: store [2 x i128] [[TMP19]], ptr @__msan_param_tls, align 8
609 ; CHECK-NEXT: store i32 0, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 32) to ptr), align 8
610 ; CHECK-NEXT: store [2 x i128] [[TMP19]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 40) to ptr), align 8
611 ; CHECK-NEXT: store [2 x i128] [[TMP19]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_va_arg_tls to i64), i64 96) to ptr), align 8
612 ; CHECK-NEXT: store i64 0, ptr @__msan_va_arg_overflow_size_tls, align 8
613 ; CHECK-NEXT: call void ([2 x fp128], i32, ...) @_Z5test2I11LongDouble2EvT_iz([2 x fp128] alignstack(16) [[DOTFCA_1_INSERT5]], i32 noundef 1, [2 x fp128] alignstack(16) [[DOTFCA_1_INSERT5]])
614 ; CHECK-NEXT: ret void
617 %arg = alloca %struct.LongDouble2, align 16
618 %arg.coerce.fca.0.extract = extractvalue [2 x fp128] %arg.coerce, 0
619 store fp128 %arg.coerce.fca.0.extract, ptr %arg, align 16
620 %arg.coerce.fca.1.extract = extractvalue [2 x fp128] %arg.coerce, 1
621 %arg.coerce.fca.1.gep = getelementptr inbounds [2 x fp128], ptr %arg, i64 0, i64 1
622 store fp128 %arg.coerce.fca.1.extract, ptr %arg.coerce.fca.1.gep, align 16
623 call void @_Z3usePv(ptr noundef nonnull %arg)
624 %agg.tmp.sroa.0.0.copyload = load fp128, ptr %arg, align 16
625 %agg.tmp.sroa.2.0.copyload = load fp128, ptr %arg.coerce.fca.1.gep, align 16
626 %.fca.0.insert4 = insertvalue [2 x fp128] poison, fp128 %agg.tmp.sroa.0.0.copyload, 0
627 %.fca.1.insert5 = insertvalue [2 x fp128] %.fca.0.insert4, fp128 %agg.tmp.sroa.2.0.copyload, 1
628 call void ([2 x fp128], i32, ...) @_Z5test2I11LongDouble2EvT_iz([2 x fp128] alignstack(16) %.fca.1.insert5, i32 noundef 1, [2 x fp128] alignstack(16) %.fca.1.insert5)
632 define linkonce_odr dso_local void @_Z4testI11LongDouble4EvT_([4 x fp128] alignstack(16) %arg.coerce) sanitize_memory {
633 ; CHECK-LABEL: define linkonce_odr dso_local void @_Z4testI11LongDouble4EvT_(
634 ; CHECK-SAME: [4 x fp128] alignstack(16) [[ARG_COERCE:%.*]]) #[[ATTR0]] {
636 ; CHECK-NEXT: [[TMP0:%.*]] = load [4 x i128], ptr @__msan_param_tls, align 8
637 ; CHECK-NEXT: call void @llvm.donothing()
638 ; CHECK-NEXT: [[ARG:%.*]] = alloca [[STRUCT_LONGDOUBLE4:%.*]], align 16
639 ; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[ARG]] to i64
640 ; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 193514046488576
641 ; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr
642 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 16 [[TMP3]], i8 -1, i64 64, i1 false)
643 ; CHECK-NEXT: [[TMP4:%.*]] = extractvalue [4 x i128] [[TMP0]], 0
644 ; CHECK-NEXT: [[ARG_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x fp128] [[ARG_COERCE]], 0
645 ; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[ARG]] to i64
646 ; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 193514046488576
647 ; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr
648 ; CHECK-NEXT: store i128 [[TMP4]], ptr [[TMP7]], align 16
649 ; CHECK-NEXT: store fp128 [[ARG_COERCE_FCA_0_EXTRACT]], ptr [[ARG]], align 16
650 ; CHECK-NEXT: [[TMP8:%.*]] = extractvalue [4 x i128] [[TMP0]], 1
651 ; CHECK-NEXT: [[ARG_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x fp128] [[ARG_COERCE]], 1
652 ; CHECK-NEXT: [[ARG_COERCE_FCA_1_GEP:%.*]] = getelementptr inbounds [4 x fp128], ptr [[ARG]], i64 0, i64 1
653 ; CHECK-NEXT: [[TMP9:%.*]] = ptrtoint ptr [[ARG_COERCE_FCA_1_GEP]] to i64
654 ; CHECK-NEXT: [[TMP10:%.*]] = xor i64 [[TMP9]], 193514046488576
655 ; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr
656 ; CHECK-NEXT: store i128 [[TMP8]], ptr [[TMP11]], align 16
657 ; CHECK-NEXT: store fp128 [[ARG_COERCE_FCA_1_EXTRACT]], ptr [[ARG_COERCE_FCA_1_GEP]], align 16
658 ; CHECK-NEXT: [[TMP12:%.*]] = extractvalue [4 x i128] [[TMP0]], 2
659 ; CHECK-NEXT: [[ARG_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x fp128] [[ARG_COERCE]], 2
660 ; CHECK-NEXT: [[ARG_COERCE_FCA_2_GEP:%.*]] = getelementptr inbounds [4 x fp128], ptr [[ARG]], i64 0, i64 2
661 ; CHECK-NEXT: [[TMP13:%.*]] = ptrtoint ptr [[ARG_COERCE_FCA_2_GEP]] to i64
662 ; CHECK-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], 193514046488576
663 ; CHECK-NEXT: [[TMP15:%.*]] = inttoptr i64 [[TMP14]] to ptr
664 ; CHECK-NEXT: store i128 [[TMP12]], ptr [[TMP15]], align 16
665 ; CHECK-NEXT: store fp128 [[ARG_COERCE_FCA_2_EXTRACT]], ptr [[ARG_COERCE_FCA_2_GEP]], align 16
666 ; CHECK-NEXT: [[TMP16:%.*]] = extractvalue [4 x i128] [[TMP0]], 3
667 ; CHECK-NEXT: [[ARG_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x fp128] [[ARG_COERCE]], 3
668 ; CHECK-NEXT: [[ARG_COERCE_FCA_3_GEP:%.*]] = getelementptr inbounds [4 x fp128], ptr [[ARG]], i64 0, i64 3
669 ; CHECK-NEXT: [[TMP17:%.*]] = ptrtoint ptr [[ARG_COERCE_FCA_3_GEP]] to i64
670 ; CHECK-NEXT: [[TMP18:%.*]] = xor i64 [[TMP17]], 193514046488576
671 ; CHECK-NEXT: [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
672 ; CHECK-NEXT: store i128 [[TMP16]], ptr [[TMP19]], align 16
673 ; CHECK-NEXT: store fp128 [[ARG_COERCE_FCA_3_EXTRACT]], ptr [[ARG_COERCE_FCA_3_GEP]], align 16
674 ; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8
675 ; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG]])
676 ; CHECK-NEXT: [[AGG_TMP_SROA_0_0_COPYLOAD:%.*]] = load fp128, ptr [[ARG]], align 16
677 ; CHECK-NEXT: [[TMP20:%.*]] = ptrtoint ptr [[ARG]] to i64
678 ; CHECK-NEXT: [[TMP21:%.*]] = xor i64 [[TMP20]], 193514046488576
679 ; CHECK-NEXT: [[TMP22:%.*]] = inttoptr i64 [[TMP21]] to ptr
680 ; CHECK-NEXT: [[_MSLD:%.*]] = load i128, ptr [[TMP22]], align 16
681 ; CHECK-NEXT: [[AGG_TMP_SROA_2_0_COPYLOAD:%.*]] = load fp128, ptr [[ARG_COERCE_FCA_1_GEP]], align 16
682 ; CHECK-NEXT: [[TMP23:%.*]] = ptrtoint ptr [[ARG_COERCE_FCA_1_GEP]] to i64
683 ; CHECK-NEXT: [[TMP24:%.*]] = xor i64 [[TMP23]], 193514046488576
684 ; CHECK-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP24]] to ptr
685 ; CHECK-NEXT: [[_MSLD1:%.*]] = load i128, ptr [[TMP25]], align 16
686 ; CHECK-NEXT: [[AGG_TMP_SROA_3_0_COPYLOAD:%.*]] = load fp128, ptr [[ARG_COERCE_FCA_2_GEP]], align 16
687 ; CHECK-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[ARG_COERCE_FCA_2_GEP]] to i64
688 ; CHECK-NEXT: [[TMP27:%.*]] = xor i64 [[TMP26]], 193514046488576
689 ; CHECK-NEXT: [[TMP28:%.*]] = inttoptr i64 [[TMP27]] to ptr
690 ; CHECK-NEXT: [[_MSLD2:%.*]] = load i128, ptr [[TMP28]], align 16
691 ; CHECK-NEXT: [[AGG_TMP_SROA_4_0_COPYLOAD:%.*]] = load fp128, ptr [[ARG_COERCE_FCA_3_GEP]], align 16
692 ; CHECK-NEXT: [[TMP29:%.*]] = ptrtoint ptr [[ARG_COERCE_FCA_3_GEP]] to i64
693 ; CHECK-NEXT: [[TMP30:%.*]] = xor i64 [[TMP29]], 193514046488576
694 ; CHECK-NEXT: [[TMP31:%.*]] = inttoptr i64 [[TMP30]] to ptr
695 ; CHECK-NEXT: [[_MSLD3:%.*]] = load i128, ptr [[TMP31]], align 16
696 ; CHECK-NEXT: [[TMP32:%.*]] = insertvalue [4 x i128] [i128 -1, i128 -1, i128 -1, i128 -1], i128 [[_MSLD]], 0
697 ; CHECK-NEXT: [[DOTFCA_0_INSERT4:%.*]] = insertvalue [4 x fp128] poison, fp128 [[AGG_TMP_SROA_0_0_COPYLOAD]], 0
698 ; CHECK-NEXT: [[TMP33:%.*]] = insertvalue [4 x i128] [[TMP32]], i128 [[_MSLD1]], 1
699 ; CHECK-NEXT: [[DOTFCA_1_INSERT5:%.*]] = insertvalue [4 x fp128] [[DOTFCA_0_INSERT4]], fp128 [[AGG_TMP_SROA_2_0_COPYLOAD]], 1
700 ; CHECK-NEXT: [[TMP34:%.*]] = insertvalue [4 x i128] [[TMP33]], i128 [[_MSLD2]], 2
701 ; CHECK-NEXT: [[DOTFCA_2_INSERT6:%.*]] = insertvalue [4 x fp128] [[DOTFCA_1_INSERT5]], fp128 [[AGG_TMP_SROA_3_0_COPYLOAD]], 2
702 ; CHECK-NEXT: [[TMP35:%.*]] = insertvalue [4 x i128] [[TMP34]], i128 [[_MSLD3]], 3
703 ; CHECK-NEXT: [[DOTFCA_3_INSERT7:%.*]] = insertvalue [4 x fp128] [[DOTFCA_2_INSERT6]], fp128 [[AGG_TMP_SROA_4_0_COPYLOAD]], 3
704 ; CHECK-NEXT: store [4 x i128] [[TMP35]], ptr @__msan_param_tls, align 8
705 ; CHECK-NEXT: store i32 0, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 64) to ptr), align 8
706 ; CHECK-NEXT: store [4 x i128] [[TMP35]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 72) to ptr), align 8
707 ; CHECK-NEXT: store [4 x i128] [[TMP35]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_va_arg_tls to i64), i64 128) to ptr), align 8
708 ; CHECK-NEXT: store i64 0, ptr @__msan_va_arg_overflow_size_tls, align 8
709 ; CHECK-NEXT: call void ([4 x fp128], i32, ...) @_Z5test2I11LongDouble4EvT_iz([4 x fp128] alignstack(16) [[DOTFCA_3_INSERT7]], i32 noundef 1, [4 x fp128] alignstack(16) [[DOTFCA_3_INSERT7]])
710 ; CHECK-NEXT: ret void
713 %arg = alloca %struct.LongDouble4, align 16
714 %arg.coerce.fca.0.extract = extractvalue [4 x fp128] %arg.coerce, 0
715 store fp128 %arg.coerce.fca.0.extract, ptr %arg, align 16
716 %arg.coerce.fca.1.extract = extractvalue [4 x fp128] %arg.coerce, 1
717 %arg.coerce.fca.1.gep = getelementptr inbounds [4 x fp128], ptr %arg, i64 0, i64 1
718 store fp128 %arg.coerce.fca.1.extract, ptr %arg.coerce.fca.1.gep, align 16
719 %arg.coerce.fca.2.extract = extractvalue [4 x fp128] %arg.coerce, 2
720 %arg.coerce.fca.2.gep = getelementptr inbounds [4 x fp128], ptr %arg, i64 0, i64 2
721 store fp128 %arg.coerce.fca.2.extract, ptr %arg.coerce.fca.2.gep, align 16
722 %arg.coerce.fca.3.extract = extractvalue [4 x fp128] %arg.coerce, 3
723 %arg.coerce.fca.3.gep = getelementptr inbounds [4 x fp128], ptr %arg, i64 0, i64 3
724 store fp128 %arg.coerce.fca.3.extract, ptr %arg.coerce.fca.3.gep, align 16
725 call void @_Z3usePv(ptr noundef nonnull %arg)
726 %agg.tmp.sroa.0.0.copyload = load fp128, ptr %arg, align 16
727 %agg.tmp.sroa.2.0.copyload = load fp128, ptr %arg.coerce.fca.1.gep, align 16
728 %agg.tmp.sroa.3.0.copyload = load fp128, ptr %arg.coerce.fca.2.gep, align 16
729 %agg.tmp.sroa.4.0.copyload = load fp128, ptr %arg.coerce.fca.3.gep, align 16
730 %.fca.0.insert4 = insertvalue [4 x fp128] poison, fp128 %agg.tmp.sroa.0.0.copyload, 0
731 %.fca.1.insert5 = insertvalue [4 x fp128] %.fca.0.insert4, fp128 %agg.tmp.sroa.2.0.copyload, 1
732 %.fca.2.insert6 = insertvalue [4 x fp128] %.fca.1.insert5, fp128 %agg.tmp.sroa.3.0.copyload, 2
733 %.fca.3.insert7 = insertvalue [4 x fp128] %.fca.2.insert6, fp128 %agg.tmp.sroa.4.0.copyload, 3
734 call void ([4 x fp128], i32, ...) @_Z5test2I11LongDouble4EvT_iz([4 x fp128] alignstack(16) %.fca.3.insert7, i32 noundef 1, [4 x fp128] alignstack(16) %.fca.3.insert7)
738 declare void @_Z3usePv(ptr noundef) local_unnamed_addr #2
740 define linkonce_odr dso_local void @_Z5test2IcEvT_iz(i8 noundef %t, i32 noundef %n, ...) sanitize_memory {
741 ; CHECK-LABEL: define linkonce_odr dso_local void @_Z5test2IcEvT_iz(
742 ; CHECK-SAME: i8 noundef [[T:%.*]], i32 noundef [[N:%.*]], ...) #[[ATTR0]] {
744 ; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8
745 ; CHECK-NEXT: [[TMP1:%.*]] = add i64 192, [[TMP0]]
746 ; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 8
747 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)
748 ; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)
749 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)
750 ; CHECK-NEXT: call void @llvm.donothing()
751 ; CHECK-NEXT: [[ARGS:%.*]] = alloca %"struct.std::__va_list", align 8
752 ; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 32, ptr nonnull [[ARGS]])
753 ; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARGS]] to i64
754 ; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 193514046488576
755 ; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
756 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP6]], i8 -1, i64 32, i1 false)
757 ; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARGS]] to i64
758 ; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 193514046488576
759 ; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr
760 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 32, i1 false)
761 ; CHECK-NEXT: call void @llvm.va_start.p0(ptr nonnull [[ARGS]])
762 ; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[ARGS]] to i64
763 ; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[TMP10]], 0
764 ; CHECK-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP11]] to ptr
765 ; CHECK-NEXT: [[TMP13:%.*]] = load i64, ptr [[TMP12]], align 8
766 ; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP13]] to ptr
767 ; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[ARGS]] to i64
768 ; CHECK-NEXT: [[TMP16:%.*]] = add i64 [[TMP15]], 8
769 ; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr
770 ; CHECK-NEXT: [[TMP18:%.*]] = load i64, ptr [[TMP17]], align 8
771 ; CHECK-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[ARGS]] to i64
772 ; CHECK-NEXT: [[TMP20:%.*]] = add i64 [[TMP19]], 24
773 ; CHECK-NEXT: [[TMP21:%.*]] = inttoptr i64 [[TMP20]] to ptr
774 ; CHECK-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
775 ; CHECK-NEXT: [[TMP23:%.*]] = sext i32 [[TMP22]] to i64
776 ; CHECK-NEXT: [[TMP24:%.*]] = add i64 [[TMP18]], [[TMP23]]
777 ; CHECK-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP24]] to ptr
778 ; CHECK-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[ARGS]] to i64
779 ; CHECK-NEXT: [[TMP27:%.*]] = add i64 [[TMP26]], 16
780 ; CHECK-NEXT: [[TMP28:%.*]] = inttoptr i64 [[TMP27]] to ptr
781 ; CHECK-NEXT: [[TMP29:%.*]] = load i64, ptr [[TMP28]], align 8
782 ; CHECK-NEXT: [[TMP30:%.*]] = ptrtoint ptr [[ARGS]] to i64
783 ; CHECK-NEXT: [[TMP31:%.*]] = add i64 [[TMP30]], 28
784 ; CHECK-NEXT: [[TMP32:%.*]] = inttoptr i64 [[TMP31]] to ptr
785 ; CHECK-NEXT: [[TMP33:%.*]] = load i32, ptr [[TMP32]], align 4
786 ; CHECK-NEXT: [[TMP34:%.*]] = sext i32 [[TMP33]] to i64
787 ; CHECK-NEXT: [[TMP35:%.*]] = add i64 [[TMP29]], [[TMP34]]
788 ; CHECK-NEXT: [[TMP36:%.*]] = inttoptr i64 [[TMP35]] to ptr
789 ; CHECK-NEXT: [[TMP37:%.*]] = add i64 64, [[TMP23]]
790 ; CHECK-NEXT: [[TMP38:%.*]] = ptrtoint ptr [[TMP25]] to i64
791 ; CHECK-NEXT: [[TMP39:%.*]] = xor i64 [[TMP38]], 193514046488576
792 ; CHECK-NEXT: [[TMP40:%.*]] = inttoptr i64 [[TMP39]] to ptr
793 ; CHECK-NEXT: [[TMP41:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i64 [[TMP37]]
794 ; CHECK-NEXT: [[TMP42:%.*]] = sub i64 64, [[TMP37]]
795 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP40]], ptr align 8 [[TMP41]], i64 [[TMP42]], i1 false)
796 ; CHECK-NEXT: [[TMP43:%.*]] = add i64 128, [[TMP34]]
797 ; CHECK-NEXT: [[TMP44:%.*]] = ptrtoint ptr [[TMP36]] to i64
798 ; CHECK-NEXT: [[TMP45:%.*]] = xor i64 [[TMP44]], 193514046488576
799 ; CHECK-NEXT: [[TMP46:%.*]] = inttoptr i64 [[TMP45]] to ptr
800 ; CHECK-NEXT: [[TMP47:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i32 64
801 ; CHECK-NEXT: [[TMP48:%.*]] = getelementptr inbounds i8, ptr [[TMP47]], i64 [[TMP43]]
802 ; CHECK-NEXT: [[TMP49:%.*]] = sub i64 128, [[TMP43]]
803 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP46]], ptr align 8 [[TMP48]], i64 [[TMP49]], i1 false)
804 ; CHECK-NEXT: [[TMP50:%.*]] = ptrtoint ptr [[TMP14]] to i64
805 ; CHECK-NEXT: [[TMP51:%.*]] = xor i64 [[TMP50]], 193514046488576
806 ; CHECK-NEXT: [[TMP52:%.*]] = inttoptr i64 [[TMP51]] to ptr
807 ; CHECK-NEXT: [[TMP53:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i32 192
808 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP52]], ptr align 16 [[TMP53]], i64 [[TMP0]], i1 false)
809 ; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8
810 ; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARGS]])
811 ; CHECK-NEXT: call void @llvm.va_end.p0(ptr nonnull [[ARGS]])
812 ; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 32, ptr nonnull [[ARGS]])
813 ; CHECK-NEXT: ret void
816 %args = alloca %"struct.std::__va_list", align 8
817 call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %args) #5
818 call void @llvm.va_start(ptr nonnull %args)
819 call void @_Z3usePv(ptr noundef nonnull %args)
820 call void @llvm.va_end(ptr nonnull %args)
821 call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %args) #5
825 declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #3
827 declare void @llvm.va_start(ptr) #4
829 declare void @llvm.va_end(ptr) #4
831 declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #3
833 define linkonce_odr dso_local void @_Z5test2IiEvT_iz(i32 noundef %t, i32 noundef %n, ...) sanitize_memory {
834 ; CHECK-LABEL: define linkonce_odr dso_local void @_Z5test2IiEvT_iz(
835 ; CHECK-SAME: i32 noundef [[T:%.*]], i32 noundef [[N:%.*]], ...) #[[ATTR0]] {
837 ; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8
838 ; CHECK-NEXT: [[TMP1:%.*]] = add i64 192, [[TMP0]]
839 ; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 8
840 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)
841 ; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)
842 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)
843 ; CHECK-NEXT: call void @llvm.donothing()
844 ; CHECK-NEXT: [[ARGS:%.*]] = alloca %"struct.std::__va_list", align 8
845 ; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 32, ptr nonnull [[ARGS]])
846 ; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARGS]] to i64
847 ; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 193514046488576
848 ; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
849 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP6]], i8 -1, i64 32, i1 false)
850 ; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARGS]] to i64
851 ; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 193514046488576
852 ; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr
853 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 32, i1 false)
854 ; CHECK-NEXT: call void @llvm.va_start.p0(ptr nonnull [[ARGS]])
855 ; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[ARGS]] to i64
856 ; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[TMP10]], 0
857 ; CHECK-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP11]] to ptr
858 ; CHECK-NEXT: [[TMP13:%.*]] = load i64, ptr [[TMP12]], align 8
859 ; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP13]] to ptr
860 ; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[ARGS]] to i64
861 ; CHECK-NEXT: [[TMP16:%.*]] = add i64 [[TMP15]], 8
862 ; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr
863 ; CHECK-NEXT: [[TMP18:%.*]] = load i64, ptr [[TMP17]], align 8
864 ; CHECK-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[ARGS]] to i64
865 ; CHECK-NEXT: [[TMP20:%.*]] = add i64 [[TMP19]], 24
866 ; CHECK-NEXT: [[TMP21:%.*]] = inttoptr i64 [[TMP20]] to ptr
867 ; CHECK-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
868 ; CHECK-NEXT: [[TMP23:%.*]] = sext i32 [[TMP22]] to i64
869 ; CHECK-NEXT: [[TMP24:%.*]] = add i64 [[TMP18]], [[TMP23]]
870 ; CHECK-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP24]] to ptr
871 ; CHECK-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[ARGS]] to i64
872 ; CHECK-NEXT: [[TMP27:%.*]] = add i64 [[TMP26]], 16
873 ; CHECK-NEXT: [[TMP28:%.*]] = inttoptr i64 [[TMP27]] to ptr
874 ; CHECK-NEXT: [[TMP29:%.*]] = load i64, ptr [[TMP28]], align 8
875 ; CHECK-NEXT: [[TMP30:%.*]] = ptrtoint ptr [[ARGS]] to i64
876 ; CHECK-NEXT: [[TMP31:%.*]] = add i64 [[TMP30]], 28
877 ; CHECK-NEXT: [[TMP32:%.*]] = inttoptr i64 [[TMP31]] to ptr
878 ; CHECK-NEXT: [[TMP33:%.*]] = load i32, ptr [[TMP32]], align 4
879 ; CHECK-NEXT: [[TMP34:%.*]] = sext i32 [[TMP33]] to i64
880 ; CHECK-NEXT: [[TMP35:%.*]] = add i64 [[TMP29]], [[TMP34]]
881 ; CHECK-NEXT: [[TMP36:%.*]] = inttoptr i64 [[TMP35]] to ptr
882 ; CHECK-NEXT: [[TMP37:%.*]] = add i64 64, [[TMP23]]
883 ; CHECK-NEXT: [[TMP38:%.*]] = ptrtoint ptr [[TMP25]] to i64
884 ; CHECK-NEXT: [[TMP39:%.*]] = xor i64 [[TMP38]], 193514046488576
885 ; CHECK-NEXT: [[TMP40:%.*]] = inttoptr i64 [[TMP39]] to ptr
886 ; CHECK-NEXT: [[TMP41:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i64 [[TMP37]]
887 ; CHECK-NEXT: [[TMP42:%.*]] = sub i64 64, [[TMP37]]
888 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP40]], ptr align 8 [[TMP41]], i64 [[TMP42]], i1 false)
889 ; CHECK-NEXT: [[TMP43:%.*]] = add i64 128, [[TMP34]]
890 ; CHECK-NEXT: [[TMP44:%.*]] = ptrtoint ptr [[TMP36]] to i64
891 ; CHECK-NEXT: [[TMP45:%.*]] = xor i64 [[TMP44]], 193514046488576
892 ; CHECK-NEXT: [[TMP46:%.*]] = inttoptr i64 [[TMP45]] to ptr
893 ; CHECK-NEXT: [[TMP47:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i32 64
894 ; CHECK-NEXT: [[TMP48:%.*]] = getelementptr inbounds i8, ptr [[TMP47]], i64 [[TMP43]]
895 ; CHECK-NEXT: [[TMP49:%.*]] = sub i64 128, [[TMP43]]
896 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP46]], ptr align 8 [[TMP48]], i64 [[TMP49]], i1 false)
897 ; CHECK-NEXT: [[TMP50:%.*]] = ptrtoint ptr [[TMP14]] to i64
898 ; CHECK-NEXT: [[TMP51:%.*]] = xor i64 [[TMP50]], 193514046488576
899 ; CHECK-NEXT: [[TMP52:%.*]] = inttoptr i64 [[TMP51]] to ptr
900 ; CHECK-NEXT: [[TMP53:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i32 192
901 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP52]], ptr align 16 [[TMP53]], i64 [[TMP0]], i1 false)
902 ; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8
903 ; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARGS]])
904 ; CHECK-NEXT: call void @llvm.va_end.p0(ptr nonnull [[ARGS]])
905 ; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 32, ptr nonnull [[ARGS]])
906 ; CHECK-NEXT: ret void
909 %args = alloca %"struct.std::__va_list", align 8
910 call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %args) #5
911 call void @llvm.va_start(ptr nonnull %args)
912 call void @_Z3usePv(ptr noundef nonnull %args)
913 call void @llvm.va_end(ptr nonnull %args)
914 call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %args) #5
918 define linkonce_odr dso_local void @_Z5test2IfEvT_iz(float noundef %t, i32 noundef %n, ...) sanitize_memory {
919 ; CHECK-LABEL: define linkonce_odr dso_local void @_Z5test2IfEvT_iz(
920 ; CHECK-SAME: float noundef [[T:%.*]], i32 noundef [[N:%.*]], ...) #[[ATTR0]] {
922 ; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8
923 ; CHECK-NEXT: [[TMP1:%.*]] = add i64 192, [[TMP0]]
924 ; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 8
925 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)
926 ; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)
927 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)
928 ; CHECK-NEXT: call void @llvm.donothing()
929 ; CHECK-NEXT: [[ARGS:%.*]] = alloca %"struct.std::__va_list", align 8
930 ; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 32, ptr nonnull [[ARGS]])
931 ; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARGS]] to i64
932 ; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 193514046488576
933 ; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
934 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP6]], i8 -1, i64 32, i1 false)
935 ; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARGS]] to i64
936 ; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 193514046488576
937 ; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr
938 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 32, i1 false)
939 ; CHECK-NEXT: call void @llvm.va_start.p0(ptr nonnull [[ARGS]])
940 ; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[ARGS]] to i64
941 ; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[TMP10]], 0
942 ; CHECK-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP11]] to ptr
943 ; CHECK-NEXT: [[TMP13:%.*]] = load i64, ptr [[TMP12]], align 8
944 ; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP13]] to ptr
945 ; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[ARGS]] to i64
946 ; CHECK-NEXT: [[TMP16:%.*]] = add i64 [[TMP15]], 8
947 ; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr
948 ; CHECK-NEXT: [[TMP18:%.*]] = load i64, ptr [[TMP17]], align 8
949 ; CHECK-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[ARGS]] to i64
950 ; CHECK-NEXT: [[TMP20:%.*]] = add i64 [[TMP19]], 24
951 ; CHECK-NEXT: [[TMP21:%.*]] = inttoptr i64 [[TMP20]] to ptr
952 ; CHECK-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
953 ; CHECK-NEXT: [[TMP23:%.*]] = sext i32 [[TMP22]] to i64
954 ; CHECK-NEXT: [[TMP24:%.*]] = add i64 [[TMP18]], [[TMP23]]
955 ; CHECK-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP24]] to ptr
956 ; CHECK-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[ARGS]] to i64
957 ; CHECK-NEXT: [[TMP27:%.*]] = add i64 [[TMP26]], 16
958 ; CHECK-NEXT: [[TMP28:%.*]] = inttoptr i64 [[TMP27]] to ptr
959 ; CHECK-NEXT: [[TMP29:%.*]] = load i64, ptr [[TMP28]], align 8
960 ; CHECK-NEXT: [[TMP30:%.*]] = ptrtoint ptr [[ARGS]] to i64
961 ; CHECK-NEXT: [[TMP31:%.*]] = add i64 [[TMP30]], 28
962 ; CHECK-NEXT: [[TMP32:%.*]] = inttoptr i64 [[TMP31]] to ptr
963 ; CHECK-NEXT: [[TMP33:%.*]] = load i32, ptr [[TMP32]], align 4
964 ; CHECK-NEXT: [[TMP34:%.*]] = sext i32 [[TMP33]] to i64
965 ; CHECK-NEXT: [[TMP35:%.*]] = add i64 [[TMP29]], [[TMP34]]
966 ; CHECK-NEXT: [[TMP36:%.*]] = inttoptr i64 [[TMP35]] to ptr
967 ; CHECK-NEXT: [[TMP37:%.*]] = add i64 64, [[TMP23]]
968 ; CHECK-NEXT: [[TMP38:%.*]] = ptrtoint ptr [[TMP25]] to i64
969 ; CHECK-NEXT: [[TMP39:%.*]] = xor i64 [[TMP38]], 193514046488576
970 ; CHECK-NEXT: [[TMP40:%.*]] = inttoptr i64 [[TMP39]] to ptr
971 ; CHECK-NEXT: [[TMP41:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i64 [[TMP37]]
972 ; CHECK-NEXT: [[TMP42:%.*]] = sub i64 64, [[TMP37]]
973 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP40]], ptr align 8 [[TMP41]], i64 [[TMP42]], i1 false)
974 ; CHECK-NEXT: [[TMP43:%.*]] = add i64 128, [[TMP34]]
975 ; CHECK-NEXT: [[TMP44:%.*]] = ptrtoint ptr [[TMP36]] to i64
976 ; CHECK-NEXT: [[TMP45:%.*]] = xor i64 [[TMP44]], 193514046488576
977 ; CHECK-NEXT: [[TMP46:%.*]] = inttoptr i64 [[TMP45]] to ptr
978 ; CHECK-NEXT: [[TMP47:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i32 64
979 ; CHECK-NEXT: [[TMP48:%.*]] = getelementptr inbounds i8, ptr [[TMP47]], i64 [[TMP43]]
980 ; CHECK-NEXT: [[TMP49:%.*]] = sub i64 128, [[TMP43]]
981 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP46]], ptr align 8 [[TMP48]], i64 [[TMP49]], i1 false)
982 ; CHECK-NEXT: [[TMP50:%.*]] = ptrtoint ptr [[TMP14]] to i64
983 ; CHECK-NEXT: [[TMP51:%.*]] = xor i64 [[TMP50]], 193514046488576
984 ; CHECK-NEXT: [[TMP52:%.*]] = inttoptr i64 [[TMP51]] to ptr
985 ; CHECK-NEXT: [[TMP53:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i32 192
986 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP52]], ptr align 16 [[TMP53]], i64 [[TMP0]], i1 false)
987 ; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8
988 ; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARGS]])
989 ; CHECK-NEXT: call void @llvm.va_end.p0(ptr nonnull [[ARGS]])
990 ; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 32, ptr nonnull [[ARGS]])
991 ; CHECK-NEXT: ret void
994 %args = alloca %"struct.std::__va_list", align 8
995 call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %args) #5
996 call void @llvm.va_start(ptr nonnull %args)
997 call void @_Z3usePv(ptr noundef nonnull %args)
998 call void @llvm.va_end(ptr nonnull %args)
999 call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %args) #5
1003 define linkonce_odr dso_local void @_Z5test2IdEvT_iz(double noundef %t, i32 noundef %n, ...) sanitize_memory {
1004 ; CHECK-LABEL: define linkonce_odr dso_local void @_Z5test2IdEvT_iz(
1005 ; CHECK-SAME: double noundef [[T:%.*]], i32 noundef [[N:%.*]], ...) #[[ATTR0]] {
1006 ; CHECK-NEXT: entry:
1007 ; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8
1008 ; CHECK-NEXT: [[TMP1:%.*]] = add i64 192, [[TMP0]]
1009 ; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 8
1010 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)
1011 ; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)
1012 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)
1013 ; CHECK-NEXT: call void @llvm.donothing()
1014 ; CHECK-NEXT: [[ARGS:%.*]] = alloca %"struct.std::__va_list", align 8
1015 ; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 32, ptr nonnull [[ARGS]])
1016 ; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARGS]] to i64
1017 ; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 193514046488576
1018 ; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
1019 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP6]], i8 -1, i64 32, i1 false)
1020 ; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARGS]] to i64
1021 ; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 193514046488576
1022 ; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr
1023 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 32, i1 false)
1024 ; CHECK-NEXT: call void @llvm.va_start.p0(ptr nonnull [[ARGS]])
1025 ; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[ARGS]] to i64
1026 ; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[TMP10]], 0
1027 ; CHECK-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP11]] to ptr
1028 ; CHECK-NEXT: [[TMP13:%.*]] = load i64, ptr [[TMP12]], align 8
1029 ; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP13]] to ptr
1030 ; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[ARGS]] to i64
1031 ; CHECK-NEXT: [[TMP16:%.*]] = add i64 [[TMP15]], 8
1032 ; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr
1033 ; CHECK-NEXT: [[TMP18:%.*]] = load i64, ptr [[TMP17]], align 8
1034 ; CHECK-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[ARGS]] to i64
1035 ; CHECK-NEXT: [[TMP20:%.*]] = add i64 [[TMP19]], 24
1036 ; CHECK-NEXT: [[TMP21:%.*]] = inttoptr i64 [[TMP20]] to ptr
1037 ; CHECK-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
1038 ; CHECK-NEXT: [[TMP23:%.*]] = sext i32 [[TMP22]] to i64
1039 ; CHECK-NEXT: [[TMP24:%.*]] = add i64 [[TMP18]], [[TMP23]]
1040 ; CHECK-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP24]] to ptr
1041 ; CHECK-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[ARGS]] to i64
1042 ; CHECK-NEXT: [[TMP27:%.*]] = add i64 [[TMP26]], 16
1043 ; CHECK-NEXT: [[TMP28:%.*]] = inttoptr i64 [[TMP27]] to ptr
1044 ; CHECK-NEXT: [[TMP29:%.*]] = load i64, ptr [[TMP28]], align 8
1045 ; CHECK-NEXT: [[TMP30:%.*]] = ptrtoint ptr [[ARGS]] to i64
1046 ; CHECK-NEXT: [[TMP31:%.*]] = add i64 [[TMP30]], 28
1047 ; CHECK-NEXT: [[TMP32:%.*]] = inttoptr i64 [[TMP31]] to ptr
1048 ; CHECK-NEXT: [[TMP33:%.*]] = load i32, ptr [[TMP32]], align 4
1049 ; CHECK-NEXT: [[TMP34:%.*]] = sext i32 [[TMP33]] to i64
1050 ; CHECK-NEXT: [[TMP35:%.*]] = add i64 [[TMP29]], [[TMP34]]
1051 ; CHECK-NEXT: [[TMP36:%.*]] = inttoptr i64 [[TMP35]] to ptr
1052 ; CHECK-NEXT: [[TMP37:%.*]] = add i64 64, [[TMP23]]
1053 ; CHECK-NEXT: [[TMP38:%.*]] = ptrtoint ptr [[TMP25]] to i64
1054 ; CHECK-NEXT: [[TMP39:%.*]] = xor i64 [[TMP38]], 193514046488576
1055 ; CHECK-NEXT: [[TMP40:%.*]] = inttoptr i64 [[TMP39]] to ptr
1056 ; CHECK-NEXT: [[TMP41:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i64 [[TMP37]]
1057 ; CHECK-NEXT: [[TMP42:%.*]] = sub i64 64, [[TMP37]]
1058 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP40]], ptr align 8 [[TMP41]], i64 [[TMP42]], i1 false)
1059 ; CHECK-NEXT: [[TMP43:%.*]] = add i64 128, [[TMP34]]
1060 ; CHECK-NEXT: [[TMP44:%.*]] = ptrtoint ptr [[TMP36]] to i64
1061 ; CHECK-NEXT: [[TMP45:%.*]] = xor i64 [[TMP44]], 193514046488576
1062 ; CHECK-NEXT: [[TMP46:%.*]] = inttoptr i64 [[TMP45]] to ptr
1063 ; CHECK-NEXT: [[TMP47:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i32 64
1064 ; CHECK-NEXT: [[TMP48:%.*]] = getelementptr inbounds i8, ptr [[TMP47]], i64 [[TMP43]]
1065 ; CHECK-NEXT: [[TMP49:%.*]] = sub i64 128, [[TMP43]]
1066 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP46]], ptr align 8 [[TMP48]], i64 [[TMP49]], i1 false)
1067 ; CHECK-NEXT: [[TMP50:%.*]] = ptrtoint ptr [[TMP14]] to i64
1068 ; CHECK-NEXT: [[TMP51:%.*]] = xor i64 [[TMP50]], 193514046488576
1069 ; CHECK-NEXT: [[TMP52:%.*]] = inttoptr i64 [[TMP51]] to ptr
1070 ; CHECK-NEXT: [[TMP53:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i32 192
1071 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP52]], ptr align 16 [[TMP53]], i64 [[TMP0]], i1 false)
1072 ; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8
1073 ; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARGS]])
1074 ; CHECK-NEXT: call void @llvm.va_end.p0(ptr nonnull [[ARGS]])
1075 ; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 32, ptr nonnull [[ARGS]])
1076 ; CHECK-NEXT: ret void
1079 %args = alloca %"struct.std::__va_list", align 8
1080 call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %args) #5
1081 call void @llvm.va_start(ptr nonnull %args)
1082 call void @_Z3usePv(ptr noundef nonnull %args)
1083 call void @llvm.va_end(ptr nonnull %args)
1084 call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %args) #5
1088 define linkonce_odr dso_local void @_Z5test2IeEvT_iz(fp128 noundef %t, i32 noundef %n, ...) sanitize_memory {
1089 ; CHECK-LABEL: define linkonce_odr dso_local void @_Z5test2IeEvT_iz(
1090 ; CHECK-SAME: fp128 noundef [[T:%.*]], i32 noundef [[N:%.*]], ...) #[[ATTR0]] {
1091 ; CHECK-NEXT: entry:
1092 ; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8
1093 ; CHECK-NEXT: [[TMP1:%.*]] = add i64 192, [[TMP0]]
1094 ; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 8
1095 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)
1096 ; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)
1097 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)
1098 ; CHECK-NEXT: call void @llvm.donothing()
1099 ; CHECK-NEXT: [[ARGS:%.*]] = alloca %"struct.std::__va_list", align 8
1100 ; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 32, ptr nonnull [[ARGS]])
1101 ; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARGS]] to i64
1102 ; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 193514046488576
1103 ; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
1104 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP6]], i8 -1, i64 32, i1 false)
1105 ; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARGS]] to i64
1106 ; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 193514046488576
1107 ; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr
1108 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 32, i1 false)
1109 ; CHECK-NEXT: call void @llvm.va_start.p0(ptr nonnull [[ARGS]])
1110 ; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[ARGS]] to i64
1111 ; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[TMP10]], 0
1112 ; CHECK-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP11]] to ptr
1113 ; CHECK-NEXT: [[TMP13:%.*]] = load i64, ptr [[TMP12]], align 8
1114 ; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP13]] to ptr
1115 ; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[ARGS]] to i64
1116 ; CHECK-NEXT: [[TMP16:%.*]] = add i64 [[TMP15]], 8
1117 ; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr
1118 ; CHECK-NEXT: [[TMP18:%.*]] = load i64, ptr [[TMP17]], align 8
1119 ; CHECK-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[ARGS]] to i64
1120 ; CHECK-NEXT: [[TMP20:%.*]] = add i64 [[TMP19]], 24
1121 ; CHECK-NEXT: [[TMP21:%.*]] = inttoptr i64 [[TMP20]] to ptr
1122 ; CHECK-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
1123 ; CHECK-NEXT: [[TMP23:%.*]] = sext i32 [[TMP22]] to i64
1124 ; CHECK-NEXT: [[TMP24:%.*]] = add i64 [[TMP18]], [[TMP23]]
1125 ; CHECK-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP24]] to ptr
1126 ; CHECK-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[ARGS]] to i64
1127 ; CHECK-NEXT: [[TMP27:%.*]] = add i64 [[TMP26]], 16
1128 ; CHECK-NEXT: [[TMP28:%.*]] = inttoptr i64 [[TMP27]] to ptr
1129 ; CHECK-NEXT: [[TMP29:%.*]] = load i64, ptr [[TMP28]], align 8
1130 ; CHECK-NEXT: [[TMP30:%.*]] = ptrtoint ptr [[ARGS]] to i64
1131 ; CHECK-NEXT: [[TMP31:%.*]] = add i64 [[TMP30]], 28
1132 ; CHECK-NEXT: [[TMP32:%.*]] = inttoptr i64 [[TMP31]] to ptr
1133 ; CHECK-NEXT: [[TMP33:%.*]] = load i32, ptr [[TMP32]], align 4
1134 ; CHECK-NEXT: [[TMP34:%.*]] = sext i32 [[TMP33]] to i64
1135 ; CHECK-NEXT: [[TMP35:%.*]] = add i64 [[TMP29]], [[TMP34]]
1136 ; CHECK-NEXT: [[TMP36:%.*]] = inttoptr i64 [[TMP35]] to ptr
1137 ; CHECK-NEXT: [[TMP37:%.*]] = add i64 64, [[TMP23]]
1138 ; CHECK-NEXT: [[TMP38:%.*]] = ptrtoint ptr [[TMP25]] to i64
1139 ; CHECK-NEXT: [[TMP39:%.*]] = xor i64 [[TMP38]], 193514046488576
1140 ; CHECK-NEXT: [[TMP40:%.*]] = inttoptr i64 [[TMP39]] to ptr
1141 ; CHECK-NEXT: [[TMP41:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i64 [[TMP37]]
1142 ; CHECK-NEXT: [[TMP42:%.*]] = sub i64 64, [[TMP37]]
1143 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP40]], ptr align 8 [[TMP41]], i64 [[TMP42]], i1 false)
1144 ; CHECK-NEXT: [[TMP43:%.*]] = add i64 128, [[TMP34]]
1145 ; CHECK-NEXT: [[TMP44:%.*]] = ptrtoint ptr [[TMP36]] to i64
1146 ; CHECK-NEXT: [[TMP45:%.*]] = xor i64 [[TMP44]], 193514046488576
1147 ; CHECK-NEXT: [[TMP46:%.*]] = inttoptr i64 [[TMP45]] to ptr
1148 ; CHECK-NEXT: [[TMP47:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i32 64
1149 ; CHECK-NEXT: [[TMP48:%.*]] = getelementptr inbounds i8, ptr [[TMP47]], i64 [[TMP43]]
1150 ; CHECK-NEXT: [[TMP49:%.*]] = sub i64 128, [[TMP43]]
1151 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP46]], ptr align 8 [[TMP48]], i64 [[TMP49]], i1 false)
1152 ; CHECK-NEXT: [[TMP50:%.*]] = ptrtoint ptr [[TMP14]] to i64
1153 ; CHECK-NEXT: [[TMP51:%.*]] = xor i64 [[TMP50]], 193514046488576
1154 ; CHECK-NEXT: [[TMP52:%.*]] = inttoptr i64 [[TMP51]] to ptr
1155 ; CHECK-NEXT: [[TMP53:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i32 192
1156 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP52]], ptr align 16 [[TMP53]], i64 [[TMP0]], i1 false)
1157 ; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8
1158 ; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARGS]])
1159 ; CHECK-NEXT: call void @llvm.va_end.p0(ptr nonnull [[ARGS]])
1160 ; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 32, ptr nonnull [[ARGS]])
1161 ; CHECK-NEXT: ret void
1164 %args = alloca %"struct.std::__va_list", align 8
1165 call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %args) #5
1166 call void @llvm.va_start(ptr nonnull %args)
1167 call void @_Z3usePv(ptr noundef nonnull %args)
1168 call void @llvm.va_end(ptr nonnull %args)
1169 call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %args) #5
1173 define linkonce_odr dso_local void @_Z5test2I6IntIntEvT_iz(i64 %t.coerce, i32 noundef %n, ...) sanitize_memory {
1174 ; CHECK-LABEL: define linkonce_odr dso_local void @_Z5test2I6IntIntEvT_iz(
1175 ; CHECK-SAME: i64 [[T_COERCE:%.*]], i32 noundef [[N:%.*]], ...) #[[ATTR0]] {
1176 ; CHECK-NEXT: entry:
1177 ; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8
1178 ; CHECK-NEXT: [[TMP1:%.*]] = add i64 192, [[TMP0]]
1179 ; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 8
1180 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)
1181 ; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)
1182 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)
1183 ; CHECK-NEXT: call void @llvm.donothing()
1184 ; CHECK-NEXT: [[ARGS:%.*]] = alloca %"struct.std::__va_list", align 8
1185 ; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 32, ptr nonnull [[ARGS]])
1186 ; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARGS]] to i64
1187 ; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 193514046488576
1188 ; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
1189 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP6]], i8 -1, i64 32, i1 false)
1190 ; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARGS]] to i64
1191 ; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 193514046488576
1192 ; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr
1193 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 32, i1 false)
1194 ; CHECK-NEXT: call void @llvm.va_start.p0(ptr nonnull [[ARGS]])
1195 ; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[ARGS]] to i64
1196 ; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[TMP10]], 0
1197 ; CHECK-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP11]] to ptr
1198 ; CHECK-NEXT: [[TMP13:%.*]] = load i64, ptr [[TMP12]], align 8
1199 ; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP13]] to ptr
1200 ; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[ARGS]] to i64
1201 ; CHECK-NEXT: [[TMP16:%.*]] = add i64 [[TMP15]], 8
1202 ; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr
1203 ; CHECK-NEXT: [[TMP18:%.*]] = load i64, ptr [[TMP17]], align 8
1204 ; CHECK-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[ARGS]] to i64
1205 ; CHECK-NEXT: [[TMP20:%.*]] = add i64 [[TMP19]], 24
1206 ; CHECK-NEXT: [[TMP21:%.*]] = inttoptr i64 [[TMP20]] to ptr
1207 ; CHECK-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
1208 ; CHECK-NEXT: [[TMP23:%.*]] = sext i32 [[TMP22]] to i64
1209 ; CHECK-NEXT: [[TMP24:%.*]] = add i64 [[TMP18]], [[TMP23]]
1210 ; CHECK-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP24]] to ptr
1211 ; CHECK-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[ARGS]] to i64
1212 ; CHECK-NEXT: [[TMP27:%.*]] = add i64 [[TMP26]], 16
1213 ; CHECK-NEXT: [[TMP28:%.*]] = inttoptr i64 [[TMP27]] to ptr
1214 ; CHECK-NEXT: [[TMP29:%.*]] = load i64, ptr [[TMP28]], align 8
1215 ; CHECK-NEXT: [[TMP30:%.*]] = ptrtoint ptr [[ARGS]] to i64
1216 ; CHECK-NEXT: [[TMP31:%.*]] = add i64 [[TMP30]], 28
1217 ; CHECK-NEXT: [[TMP32:%.*]] = inttoptr i64 [[TMP31]] to ptr
1218 ; CHECK-NEXT: [[TMP33:%.*]] = load i32, ptr [[TMP32]], align 4
1219 ; CHECK-NEXT: [[TMP34:%.*]] = sext i32 [[TMP33]] to i64
1220 ; CHECK-NEXT: [[TMP35:%.*]] = add i64 [[TMP29]], [[TMP34]]
1221 ; CHECK-NEXT: [[TMP36:%.*]] = inttoptr i64 [[TMP35]] to ptr
1222 ; CHECK-NEXT: [[TMP37:%.*]] = add i64 64, [[TMP23]]
1223 ; CHECK-NEXT: [[TMP38:%.*]] = ptrtoint ptr [[TMP25]] to i64
1224 ; CHECK-NEXT: [[TMP39:%.*]] = xor i64 [[TMP38]], 193514046488576
1225 ; CHECK-NEXT: [[TMP40:%.*]] = inttoptr i64 [[TMP39]] to ptr
1226 ; CHECK-NEXT: [[TMP41:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i64 [[TMP37]]
1227 ; CHECK-NEXT: [[TMP42:%.*]] = sub i64 64, [[TMP37]]
1228 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP40]], ptr align 8 [[TMP41]], i64 [[TMP42]], i1 false)
1229 ; CHECK-NEXT: [[TMP43:%.*]] = add i64 128, [[TMP34]]
1230 ; CHECK-NEXT: [[TMP44:%.*]] = ptrtoint ptr [[TMP36]] to i64
1231 ; CHECK-NEXT: [[TMP45:%.*]] = xor i64 [[TMP44]], 193514046488576
1232 ; CHECK-NEXT: [[TMP46:%.*]] = inttoptr i64 [[TMP45]] to ptr
1233 ; CHECK-NEXT: [[TMP47:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i32 64
1234 ; CHECK-NEXT: [[TMP48:%.*]] = getelementptr inbounds i8, ptr [[TMP47]], i64 [[TMP43]]
1235 ; CHECK-NEXT: [[TMP49:%.*]] = sub i64 128, [[TMP43]]
1236 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP46]], ptr align 8 [[TMP48]], i64 [[TMP49]], i1 false)
1237 ; CHECK-NEXT: [[TMP50:%.*]] = ptrtoint ptr [[TMP14]] to i64
1238 ; CHECK-NEXT: [[TMP51:%.*]] = xor i64 [[TMP50]], 193514046488576
1239 ; CHECK-NEXT: [[TMP52:%.*]] = inttoptr i64 [[TMP51]] to ptr
1240 ; CHECK-NEXT: [[TMP53:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i32 192
1241 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP52]], ptr align 16 [[TMP53]], i64 [[TMP0]], i1 false)
1242 ; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8
1243 ; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARGS]])
1244 ; CHECK-NEXT: call void @llvm.va_end.p0(ptr nonnull [[ARGS]])
1245 ; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 32, ptr nonnull [[ARGS]])
1246 ; CHECK-NEXT: ret void
1249 %args = alloca %"struct.std::__va_list", align 8
1250 call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %args) #5
1251 call void @llvm.va_start(ptr nonnull %args)
1252 call void @_Z3usePv(ptr noundef nonnull %args)
1253 call void @llvm.va_end(ptr nonnull %args)
1254 call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %args) #5
1258 define linkonce_odr dso_local void @_Z5test2I10Int64Int64EvT_iz([2 x i64] %t.coerce, i32 noundef %n, ...) sanitize_memory {
1259 ; CHECK-LABEL: define linkonce_odr dso_local void @_Z5test2I10Int64Int64EvT_iz(
1260 ; CHECK-SAME: [2 x i64] [[T_COERCE:%.*]], i32 noundef [[N:%.*]], ...) #[[ATTR0]] {
1261 ; CHECK-NEXT: entry:
1262 ; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8
1263 ; CHECK-NEXT: [[TMP1:%.*]] = add i64 192, [[TMP0]]
1264 ; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 8
1265 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)
1266 ; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)
1267 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)
1268 ; CHECK-NEXT: call void @llvm.donothing()
1269 ; CHECK-NEXT: [[ARGS:%.*]] = alloca %"struct.std::__va_list", align 8
1270 ; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 32, ptr nonnull [[ARGS]])
1271 ; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARGS]] to i64
1272 ; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 193514046488576
1273 ; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
1274 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP6]], i8 -1, i64 32, i1 false)
1275 ; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARGS]] to i64
1276 ; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 193514046488576
1277 ; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr
1278 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 32, i1 false)
1279 ; CHECK-NEXT: call void @llvm.va_start.p0(ptr nonnull [[ARGS]])
1280 ; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[ARGS]] to i64
1281 ; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[TMP10]], 0
1282 ; CHECK-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP11]] to ptr
1283 ; CHECK-NEXT: [[TMP13:%.*]] = load i64, ptr [[TMP12]], align 8
1284 ; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP13]] to ptr
1285 ; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[ARGS]] to i64
1286 ; CHECK-NEXT: [[TMP16:%.*]] = add i64 [[TMP15]], 8
1287 ; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr
1288 ; CHECK-NEXT: [[TMP18:%.*]] = load i64, ptr [[TMP17]], align 8
1289 ; CHECK-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[ARGS]] to i64
1290 ; CHECK-NEXT: [[TMP20:%.*]] = add i64 [[TMP19]], 24
1291 ; CHECK-NEXT: [[TMP21:%.*]] = inttoptr i64 [[TMP20]] to ptr
1292 ; CHECK-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
1293 ; CHECK-NEXT: [[TMP23:%.*]] = sext i32 [[TMP22]] to i64
1294 ; CHECK-NEXT: [[TMP24:%.*]] = add i64 [[TMP18]], [[TMP23]]
1295 ; CHECK-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP24]] to ptr
1296 ; CHECK-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[ARGS]] to i64
1297 ; CHECK-NEXT: [[TMP27:%.*]] = add i64 [[TMP26]], 16
1298 ; CHECK-NEXT: [[TMP28:%.*]] = inttoptr i64 [[TMP27]] to ptr
1299 ; CHECK-NEXT: [[TMP29:%.*]] = load i64, ptr [[TMP28]], align 8
1300 ; CHECK-NEXT: [[TMP30:%.*]] = ptrtoint ptr [[ARGS]] to i64
1301 ; CHECK-NEXT: [[TMP31:%.*]] = add i64 [[TMP30]], 28
1302 ; CHECK-NEXT: [[TMP32:%.*]] = inttoptr i64 [[TMP31]] to ptr
1303 ; CHECK-NEXT: [[TMP33:%.*]] = load i32, ptr [[TMP32]], align 4
1304 ; CHECK-NEXT: [[TMP34:%.*]] = sext i32 [[TMP33]] to i64
1305 ; CHECK-NEXT: [[TMP35:%.*]] = add i64 [[TMP29]], [[TMP34]]
1306 ; CHECK-NEXT: [[TMP36:%.*]] = inttoptr i64 [[TMP35]] to ptr
1307 ; CHECK-NEXT: [[TMP37:%.*]] = add i64 64, [[TMP23]]
1308 ; CHECK-NEXT: [[TMP38:%.*]] = ptrtoint ptr [[TMP25]] to i64
1309 ; CHECK-NEXT: [[TMP39:%.*]] = xor i64 [[TMP38]], 193514046488576
1310 ; CHECK-NEXT: [[TMP40:%.*]] = inttoptr i64 [[TMP39]] to ptr
1311 ; CHECK-NEXT: [[TMP41:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i64 [[TMP37]]
1312 ; CHECK-NEXT: [[TMP42:%.*]] = sub i64 64, [[TMP37]]
1313 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP40]], ptr align 8 [[TMP41]], i64 [[TMP42]], i1 false)
1314 ; CHECK-NEXT: [[TMP43:%.*]] = add i64 128, [[TMP34]]
1315 ; CHECK-NEXT: [[TMP44:%.*]] = ptrtoint ptr [[TMP36]] to i64
1316 ; CHECK-NEXT: [[TMP45:%.*]] = xor i64 [[TMP44]], 193514046488576
1317 ; CHECK-NEXT: [[TMP46:%.*]] = inttoptr i64 [[TMP45]] to ptr
1318 ; CHECK-NEXT: [[TMP47:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i32 64
1319 ; CHECK-NEXT: [[TMP48:%.*]] = getelementptr inbounds i8, ptr [[TMP47]], i64 [[TMP43]]
1320 ; CHECK-NEXT: [[TMP49:%.*]] = sub i64 128, [[TMP43]]
1321 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP46]], ptr align 8 [[TMP48]], i64 [[TMP49]], i1 false)
1322 ; CHECK-NEXT: [[TMP50:%.*]] = ptrtoint ptr [[TMP14]] to i64
1323 ; CHECK-NEXT: [[TMP51:%.*]] = xor i64 [[TMP50]], 193514046488576
1324 ; CHECK-NEXT: [[TMP52:%.*]] = inttoptr i64 [[TMP51]] to ptr
1325 ; CHECK-NEXT: [[TMP53:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i32 192
1326 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP52]], ptr align 16 [[TMP53]], i64 [[TMP0]], i1 false)
1327 ; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8
1328 ; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARGS]])
1329 ; CHECK-NEXT: call void @llvm.va_end.p0(ptr nonnull [[ARGS]])
1330 ; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 32, ptr nonnull [[ARGS]])
1331 ; CHECK-NEXT: ret void
1334 %args = alloca %"struct.std::__va_list", align 8
1335 call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %args) #5
1336 call void @llvm.va_start(ptr nonnull %args)
1337 call void @_Z3usePv(ptr noundef nonnull %args)
1338 call void @llvm.va_end(ptr nonnull %args)
1339 call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %args) #5
1343 define linkonce_odr dso_local void @_Z5test2I12DoubleDoubleEvT_iz([2 x double] alignstack(8) %t.coerce, i32 noundef %n, ...) sanitize_memory {
1344 ; CHECK-LABEL: define linkonce_odr dso_local void @_Z5test2I12DoubleDoubleEvT_iz(
1345 ; CHECK-SAME: [2 x double] alignstack(8) [[T_COERCE:%.*]], i32 noundef [[N:%.*]], ...) #[[ATTR0]] {
1346 ; CHECK-NEXT: entry:
1347 ; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8
1348 ; CHECK-NEXT: [[TMP1:%.*]] = add i64 192, [[TMP0]]
1349 ; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 8
1350 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)
1351 ; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)
1352 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)
1353 ; CHECK-NEXT: call void @llvm.donothing()
1354 ; CHECK-NEXT: [[ARGS:%.*]] = alloca %"struct.std::__va_list", align 8
1355 ; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 32, ptr nonnull [[ARGS]])
1356 ; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARGS]] to i64
1357 ; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 193514046488576
1358 ; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
1359 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP6]], i8 -1, i64 32, i1 false)
1360 ; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARGS]] to i64
1361 ; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 193514046488576
1362 ; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr
1363 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 32, i1 false)
1364 ; CHECK-NEXT: call void @llvm.va_start.p0(ptr nonnull [[ARGS]])
1365 ; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[ARGS]] to i64
1366 ; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[TMP10]], 0
1367 ; CHECK-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP11]] to ptr
1368 ; CHECK-NEXT: [[TMP13:%.*]] = load i64, ptr [[TMP12]], align 8
1369 ; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP13]] to ptr
1370 ; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[ARGS]] to i64
1371 ; CHECK-NEXT: [[TMP16:%.*]] = add i64 [[TMP15]], 8
1372 ; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr
1373 ; CHECK-NEXT: [[TMP18:%.*]] = load i64, ptr [[TMP17]], align 8
1374 ; CHECK-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[ARGS]] to i64
1375 ; CHECK-NEXT: [[TMP20:%.*]] = add i64 [[TMP19]], 24
1376 ; CHECK-NEXT: [[TMP21:%.*]] = inttoptr i64 [[TMP20]] to ptr
1377 ; CHECK-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
1378 ; CHECK-NEXT: [[TMP23:%.*]] = sext i32 [[TMP22]] to i64
1379 ; CHECK-NEXT: [[TMP24:%.*]] = add i64 [[TMP18]], [[TMP23]]
1380 ; CHECK-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP24]] to ptr
1381 ; CHECK-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[ARGS]] to i64
1382 ; CHECK-NEXT: [[TMP27:%.*]] = add i64 [[TMP26]], 16
1383 ; CHECK-NEXT: [[TMP28:%.*]] = inttoptr i64 [[TMP27]] to ptr
1384 ; CHECK-NEXT: [[TMP29:%.*]] = load i64, ptr [[TMP28]], align 8
1385 ; CHECK-NEXT: [[TMP30:%.*]] = ptrtoint ptr [[ARGS]] to i64
1386 ; CHECK-NEXT: [[TMP31:%.*]] = add i64 [[TMP30]], 28
1387 ; CHECK-NEXT: [[TMP32:%.*]] = inttoptr i64 [[TMP31]] to ptr
1388 ; CHECK-NEXT: [[TMP33:%.*]] = load i32, ptr [[TMP32]], align 4
1389 ; CHECK-NEXT: [[TMP34:%.*]] = sext i32 [[TMP33]] to i64
1390 ; CHECK-NEXT: [[TMP35:%.*]] = add i64 [[TMP29]], [[TMP34]]
1391 ; CHECK-NEXT: [[TMP36:%.*]] = inttoptr i64 [[TMP35]] to ptr
1392 ; CHECK-NEXT: [[TMP37:%.*]] = add i64 64, [[TMP23]]
1393 ; CHECK-NEXT: [[TMP38:%.*]] = ptrtoint ptr [[TMP25]] to i64
1394 ; CHECK-NEXT: [[TMP39:%.*]] = xor i64 [[TMP38]], 193514046488576
1395 ; CHECK-NEXT: [[TMP40:%.*]] = inttoptr i64 [[TMP39]] to ptr
1396 ; CHECK-NEXT: [[TMP41:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i64 [[TMP37]]
1397 ; CHECK-NEXT: [[TMP42:%.*]] = sub i64 64, [[TMP37]]
1398 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP40]], ptr align 8 [[TMP41]], i64 [[TMP42]], i1 false)
1399 ; CHECK-NEXT: [[TMP43:%.*]] = add i64 128, [[TMP34]]
1400 ; CHECK-NEXT: [[TMP44:%.*]] = ptrtoint ptr [[TMP36]] to i64
1401 ; CHECK-NEXT: [[TMP45:%.*]] = xor i64 [[TMP44]], 193514046488576
1402 ; CHECK-NEXT: [[TMP46:%.*]] = inttoptr i64 [[TMP45]] to ptr
1403 ; CHECK-NEXT: [[TMP47:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i32 64
1404 ; CHECK-NEXT: [[TMP48:%.*]] = getelementptr inbounds i8, ptr [[TMP47]], i64 [[TMP43]]
1405 ; CHECK-NEXT: [[TMP49:%.*]] = sub i64 128, [[TMP43]]
1406 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP46]], ptr align 8 [[TMP48]], i64 [[TMP49]], i1 false)
1407 ; CHECK-NEXT: [[TMP50:%.*]] = ptrtoint ptr [[TMP14]] to i64
1408 ; CHECK-NEXT: [[TMP51:%.*]] = xor i64 [[TMP50]], 193514046488576
1409 ; CHECK-NEXT: [[TMP52:%.*]] = inttoptr i64 [[TMP51]] to ptr
1410 ; CHECK-NEXT: [[TMP53:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i32 192
1411 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP52]], ptr align 16 [[TMP53]], i64 [[TMP0]], i1 false)
1412 ; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8
1413 ; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARGS]])
1414 ; CHECK-NEXT: call void @llvm.va_end.p0(ptr nonnull [[ARGS]])
1415 ; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 32, ptr nonnull [[ARGS]])
1416 ; CHECK-NEXT: ret void
1419 %args = alloca %"struct.std::__va_list", align 8
1420 call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %args) #5
1421 call void @llvm.va_start(ptr nonnull %args)
1422 call void @_Z3usePv(ptr noundef nonnull %args)
1423 call void @llvm.va_end(ptr nonnull %args)
1424 call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %args) #5
1428 define linkonce_odr dso_local void @_Z5test2I7Double4EvT_iz([4 x double] alignstack(8) %t.coerce, i32 noundef %n, ...) sanitize_memory {
1429 ; CHECK-LABEL: define linkonce_odr dso_local void @_Z5test2I7Double4EvT_iz(
1430 ; CHECK-SAME: [4 x double] alignstack(8) [[T_COERCE:%.*]], i32 noundef [[N:%.*]], ...) #[[ATTR0]] {
1431 ; CHECK-NEXT: entry:
1432 ; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8
1433 ; CHECK-NEXT: [[TMP1:%.*]] = add i64 192, [[TMP0]]
1434 ; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 8
1435 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)
1436 ; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)
1437 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)
1438 ; CHECK-NEXT: call void @llvm.donothing()
1439 ; CHECK-NEXT: [[ARGS:%.*]] = alloca %"struct.std::__va_list", align 8
1440 ; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 32, ptr nonnull [[ARGS]])
1441 ; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARGS]] to i64
1442 ; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 193514046488576
1443 ; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
1444 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP6]], i8 -1, i64 32, i1 false)
1445 ; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARGS]] to i64
1446 ; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 193514046488576
1447 ; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr
1448 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 32, i1 false)
1449 ; CHECK-NEXT: call void @llvm.va_start.p0(ptr nonnull [[ARGS]])
1450 ; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[ARGS]] to i64
1451 ; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[TMP10]], 0
1452 ; CHECK-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP11]] to ptr
1453 ; CHECK-NEXT: [[TMP13:%.*]] = load i64, ptr [[TMP12]], align 8
1454 ; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP13]] to ptr
1455 ; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[ARGS]] to i64
1456 ; CHECK-NEXT: [[TMP16:%.*]] = add i64 [[TMP15]], 8
1457 ; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr
1458 ; CHECK-NEXT: [[TMP18:%.*]] = load i64, ptr [[TMP17]], align 8
1459 ; CHECK-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[ARGS]] to i64
1460 ; CHECK-NEXT: [[TMP20:%.*]] = add i64 [[TMP19]], 24
1461 ; CHECK-NEXT: [[TMP21:%.*]] = inttoptr i64 [[TMP20]] to ptr
1462 ; CHECK-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
1463 ; CHECK-NEXT: [[TMP23:%.*]] = sext i32 [[TMP22]] to i64
1464 ; CHECK-NEXT: [[TMP24:%.*]] = add i64 [[TMP18]], [[TMP23]]
1465 ; CHECK-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP24]] to ptr
1466 ; CHECK-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[ARGS]] to i64
1467 ; CHECK-NEXT: [[TMP27:%.*]] = add i64 [[TMP26]], 16
1468 ; CHECK-NEXT: [[TMP28:%.*]] = inttoptr i64 [[TMP27]] to ptr
1469 ; CHECK-NEXT: [[TMP29:%.*]] = load i64, ptr [[TMP28]], align 8
1470 ; CHECK-NEXT: [[TMP30:%.*]] = ptrtoint ptr [[ARGS]] to i64
1471 ; CHECK-NEXT: [[TMP31:%.*]] = add i64 [[TMP30]], 28
1472 ; CHECK-NEXT: [[TMP32:%.*]] = inttoptr i64 [[TMP31]] to ptr
1473 ; CHECK-NEXT: [[TMP33:%.*]] = load i32, ptr [[TMP32]], align 4
1474 ; CHECK-NEXT: [[TMP34:%.*]] = sext i32 [[TMP33]] to i64
1475 ; CHECK-NEXT: [[TMP35:%.*]] = add i64 [[TMP29]], [[TMP34]]
1476 ; CHECK-NEXT: [[TMP36:%.*]] = inttoptr i64 [[TMP35]] to ptr
1477 ; CHECK-NEXT: [[TMP37:%.*]] = add i64 64, [[TMP23]]
1478 ; CHECK-NEXT: [[TMP38:%.*]] = ptrtoint ptr [[TMP25]] to i64
1479 ; CHECK-NEXT: [[TMP39:%.*]] = xor i64 [[TMP38]], 193514046488576
1480 ; CHECK-NEXT: [[TMP40:%.*]] = inttoptr i64 [[TMP39]] to ptr
1481 ; CHECK-NEXT: [[TMP41:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i64 [[TMP37]]
1482 ; CHECK-NEXT: [[TMP42:%.*]] = sub i64 64, [[TMP37]]
1483 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP40]], ptr align 8 [[TMP41]], i64 [[TMP42]], i1 false)
1484 ; CHECK-NEXT: [[TMP43:%.*]] = add i64 128, [[TMP34]]
1485 ; CHECK-NEXT: [[TMP44:%.*]] = ptrtoint ptr [[TMP36]] to i64
1486 ; CHECK-NEXT: [[TMP45:%.*]] = xor i64 [[TMP44]], 193514046488576
1487 ; CHECK-NEXT: [[TMP46:%.*]] = inttoptr i64 [[TMP45]] to ptr
1488 ; CHECK-NEXT: [[TMP47:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i32 64
1489 ; CHECK-NEXT: [[TMP48:%.*]] = getelementptr inbounds i8, ptr [[TMP47]], i64 [[TMP43]]
1490 ; CHECK-NEXT: [[TMP49:%.*]] = sub i64 128, [[TMP43]]
1491 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP46]], ptr align 8 [[TMP48]], i64 [[TMP49]], i1 false)
1492 ; CHECK-NEXT: [[TMP50:%.*]] = ptrtoint ptr [[TMP14]] to i64
1493 ; CHECK-NEXT: [[TMP51:%.*]] = xor i64 [[TMP50]], 193514046488576
1494 ; CHECK-NEXT: [[TMP52:%.*]] = inttoptr i64 [[TMP51]] to ptr
1495 ; CHECK-NEXT: [[TMP53:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i32 192
1496 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP52]], ptr align 16 [[TMP53]], i64 [[TMP0]], i1 false)
1497 ; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8
1498 ; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARGS]])
1499 ; CHECK-NEXT: call void @llvm.va_end.p0(ptr nonnull [[ARGS]])
1500 ; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 32, ptr nonnull [[ARGS]])
1501 ; CHECK-NEXT: ret void
1504 %args = alloca %"struct.std::__va_list", align 8
1505 call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %args) #5
1506 call void @llvm.va_start(ptr nonnull %args)
1507 call void @_Z3usePv(ptr noundef nonnull %args)
1508 call void @llvm.va_end(ptr nonnull %args)
1509 call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %args) #5
1513 define linkonce_odr dso_local void @_Z5test2I11DoubleFloatEvT_iz([2 x i64] %t.coerce, i32 noundef %n, ...) sanitize_memory {
1514 ; CHECK-LABEL: define linkonce_odr dso_local void @_Z5test2I11DoubleFloatEvT_iz(
1515 ; CHECK-SAME: [2 x i64] [[T_COERCE:%.*]], i32 noundef [[N:%.*]], ...) #[[ATTR0]] {
1516 ; CHECK-NEXT: entry:
1517 ; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8
1518 ; CHECK-NEXT: [[TMP1:%.*]] = add i64 192, [[TMP0]]
1519 ; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 8
1520 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)
1521 ; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)
1522 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)
1523 ; CHECK-NEXT: call void @llvm.donothing()
1524 ; CHECK-NEXT: [[ARGS:%.*]] = alloca %"struct.std::__va_list", align 8
1525 ; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 32, ptr nonnull [[ARGS]])
1526 ; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARGS]] to i64
1527 ; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 193514046488576
1528 ; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
1529 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP6]], i8 -1, i64 32, i1 false)
1530 ; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARGS]] to i64
1531 ; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 193514046488576
1532 ; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr
1533 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 32, i1 false)
1534 ; CHECK-NEXT: call void @llvm.va_start.p0(ptr nonnull [[ARGS]])
1535 ; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[ARGS]] to i64
1536 ; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[TMP10]], 0
1537 ; CHECK-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP11]] to ptr
1538 ; CHECK-NEXT: [[TMP13:%.*]] = load i64, ptr [[TMP12]], align 8
1539 ; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP13]] to ptr
1540 ; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[ARGS]] to i64
1541 ; CHECK-NEXT: [[TMP16:%.*]] = add i64 [[TMP15]], 8
1542 ; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr
1543 ; CHECK-NEXT: [[TMP18:%.*]] = load i64, ptr [[TMP17]], align 8
1544 ; CHECK-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[ARGS]] to i64
1545 ; CHECK-NEXT: [[TMP20:%.*]] = add i64 [[TMP19]], 24
1546 ; CHECK-NEXT: [[TMP21:%.*]] = inttoptr i64 [[TMP20]] to ptr
1547 ; CHECK-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
1548 ; CHECK-NEXT: [[TMP23:%.*]] = sext i32 [[TMP22]] to i64
1549 ; CHECK-NEXT: [[TMP24:%.*]] = add i64 [[TMP18]], [[TMP23]]
1550 ; CHECK-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP24]] to ptr
1551 ; CHECK-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[ARGS]] to i64
1552 ; CHECK-NEXT: [[TMP27:%.*]] = add i64 [[TMP26]], 16
1553 ; CHECK-NEXT: [[TMP28:%.*]] = inttoptr i64 [[TMP27]] to ptr
1554 ; CHECK-NEXT: [[TMP29:%.*]] = load i64, ptr [[TMP28]], align 8
1555 ; CHECK-NEXT: [[TMP30:%.*]] = ptrtoint ptr [[ARGS]] to i64
1556 ; CHECK-NEXT: [[TMP31:%.*]] = add i64 [[TMP30]], 28
1557 ; CHECK-NEXT: [[TMP32:%.*]] = inttoptr i64 [[TMP31]] to ptr
1558 ; CHECK-NEXT: [[TMP33:%.*]] = load i32, ptr [[TMP32]], align 4
1559 ; CHECK-NEXT: [[TMP34:%.*]] = sext i32 [[TMP33]] to i64
1560 ; CHECK-NEXT: [[TMP35:%.*]] = add i64 [[TMP29]], [[TMP34]]
1561 ; CHECK-NEXT: [[TMP36:%.*]] = inttoptr i64 [[TMP35]] to ptr
1562 ; CHECK-NEXT: [[TMP37:%.*]] = add i64 64, [[TMP23]]
1563 ; CHECK-NEXT: [[TMP38:%.*]] = ptrtoint ptr [[TMP25]] to i64
1564 ; CHECK-NEXT: [[TMP39:%.*]] = xor i64 [[TMP38]], 193514046488576
1565 ; CHECK-NEXT: [[TMP40:%.*]] = inttoptr i64 [[TMP39]] to ptr
1566 ; CHECK-NEXT: [[TMP41:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i64 [[TMP37]]
1567 ; CHECK-NEXT: [[TMP42:%.*]] = sub i64 64, [[TMP37]]
1568 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP40]], ptr align 8 [[TMP41]], i64 [[TMP42]], i1 false)
1569 ; CHECK-NEXT: [[TMP43:%.*]] = add i64 128, [[TMP34]]
1570 ; CHECK-NEXT: [[TMP44:%.*]] = ptrtoint ptr [[TMP36]] to i64
1571 ; CHECK-NEXT: [[TMP45:%.*]] = xor i64 [[TMP44]], 193514046488576
1572 ; CHECK-NEXT: [[TMP46:%.*]] = inttoptr i64 [[TMP45]] to ptr
1573 ; CHECK-NEXT: [[TMP47:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i32 64
1574 ; CHECK-NEXT: [[TMP48:%.*]] = getelementptr inbounds i8, ptr [[TMP47]], i64 [[TMP43]]
1575 ; CHECK-NEXT: [[TMP49:%.*]] = sub i64 128, [[TMP43]]
1576 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP46]], ptr align 8 [[TMP48]], i64 [[TMP49]], i1 false)
1577 ; CHECK-NEXT: [[TMP50:%.*]] = ptrtoint ptr [[TMP14]] to i64
1578 ; CHECK-NEXT: [[TMP51:%.*]] = xor i64 [[TMP50]], 193514046488576
1579 ; CHECK-NEXT: [[TMP52:%.*]] = inttoptr i64 [[TMP51]] to ptr
1580 ; CHECK-NEXT: [[TMP53:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i32 192
1581 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP52]], ptr align 16 [[TMP53]], i64 [[TMP0]], i1 false)
1582 ; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8
1583 ; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARGS]])
1584 ; CHECK-NEXT: call void @llvm.va_end.p0(ptr nonnull [[ARGS]])
1585 ; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 32, ptr nonnull [[ARGS]])
1586 ; CHECK-NEXT: ret void
1589 %args = alloca %"struct.std::__va_list", align 8
1590 call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %args) #5
1591 call void @llvm.va_start(ptr nonnull %args)
1592 call void @_Z3usePv(ptr noundef nonnull %args)
1593 call void @llvm.va_end(ptr nonnull %args)
1594 call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %args) #5
1598 define linkonce_odr dso_local void @_Z5test2I11LongDouble2EvT_iz([2 x fp128] alignstack(16) %t.coerce, i32 noundef %n, ...) sanitize_memory {
1599 ; CHECK-LABEL: define linkonce_odr dso_local void @_Z5test2I11LongDouble2EvT_iz(
1600 ; CHECK-SAME: [2 x fp128] alignstack(16) [[T_COERCE:%.*]], i32 noundef [[N:%.*]], ...) #[[ATTR0]] {
1601 ; CHECK-NEXT: entry:
1602 ; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8
1603 ; CHECK-NEXT: [[TMP1:%.*]] = add i64 192, [[TMP0]]
1604 ; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 8
1605 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)
1606 ; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)
1607 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)
1608 ; CHECK-NEXT: call void @llvm.donothing()
1609 ; CHECK-NEXT: [[ARGS:%.*]] = alloca %"struct.std::__va_list", align 8
1610 ; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 32, ptr nonnull [[ARGS]])
1611 ; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARGS]] to i64
1612 ; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 193514046488576
1613 ; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
1614 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP6]], i8 -1, i64 32, i1 false)
1615 ; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARGS]] to i64
1616 ; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 193514046488576
1617 ; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr
1618 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 32, i1 false)
1619 ; CHECK-NEXT: call void @llvm.va_start.p0(ptr nonnull [[ARGS]])
1620 ; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[ARGS]] to i64
1621 ; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[TMP10]], 0
1622 ; CHECK-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP11]] to ptr
1623 ; CHECK-NEXT: [[TMP13:%.*]] = load i64, ptr [[TMP12]], align 8
1624 ; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP13]] to ptr
1625 ; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[ARGS]] to i64
1626 ; CHECK-NEXT: [[TMP16:%.*]] = add i64 [[TMP15]], 8
1627 ; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr
1628 ; CHECK-NEXT: [[TMP18:%.*]] = load i64, ptr [[TMP17]], align 8
1629 ; CHECK-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[ARGS]] to i64
1630 ; CHECK-NEXT: [[TMP20:%.*]] = add i64 [[TMP19]], 24
1631 ; CHECK-NEXT: [[TMP21:%.*]] = inttoptr i64 [[TMP20]] to ptr
1632 ; CHECK-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
1633 ; CHECK-NEXT: [[TMP23:%.*]] = sext i32 [[TMP22]] to i64
1634 ; CHECK-NEXT: [[TMP24:%.*]] = add i64 [[TMP18]], [[TMP23]]
1635 ; CHECK-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP24]] to ptr
1636 ; CHECK-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[ARGS]] to i64
1637 ; CHECK-NEXT: [[TMP27:%.*]] = add i64 [[TMP26]], 16
1638 ; CHECK-NEXT: [[TMP28:%.*]] = inttoptr i64 [[TMP27]] to ptr
1639 ; CHECK-NEXT: [[TMP29:%.*]] = load i64, ptr [[TMP28]], align 8
1640 ; CHECK-NEXT: [[TMP30:%.*]] = ptrtoint ptr [[ARGS]] to i64
1641 ; CHECK-NEXT: [[TMP31:%.*]] = add i64 [[TMP30]], 28
1642 ; CHECK-NEXT: [[TMP32:%.*]] = inttoptr i64 [[TMP31]] to ptr
1643 ; CHECK-NEXT: [[TMP33:%.*]] = load i32, ptr [[TMP32]], align 4
1644 ; CHECK-NEXT: [[TMP34:%.*]] = sext i32 [[TMP33]] to i64
1645 ; CHECK-NEXT: [[TMP35:%.*]] = add i64 [[TMP29]], [[TMP34]]
1646 ; CHECK-NEXT: [[TMP36:%.*]] = inttoptr i64 [[TMP35]] to ptr
1647 ; CHECK-NEXT: [[TMP37:%.*]] = add i64 64, [[TMP23]]
1648 ; CHECK-NEXT: [[TMP38:%.*]] = ptrtoint ptr [[TMP25]] to i64
1649 ; CHECK-NEXT: [[TMP39:%.*]] = xor i64 [[TMP38]], 193514046488576
1650 ; CHECK-NEXT: [[TMP40:%.*]] = inttoptr i64 [[TMP39]] to ptr
1651 ; CHECK-NEXT: [[TMP41:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i64 [[TMP37]]
1652 ; CHECK-NEXT: [[TMP42:%.*]] = sub i64 64, [[TMP37]]
1653 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP40]], ptr align 8 [[TMP41]], i64 [[TMP42]], i1 false)
1654 ; CHECK-NEXT: [[TMP43:%.*]] = add i64 128, [[TMP34]]
1655 ; CHECK-NEXT: [[TMP44:%.*]] = ptrtoint ptr [[TMP36]] to i64
1656 ; CHECK-NEXT: [[TMP45:%.*]] = xor i64 [[TMP44]], 193514046488576
1657 ; CHECK-NEXT: [[TMP46:%.*]] = inttoptr i64 [[TMP45]] to ptr
1658 ; CHECK-NEXT: [[TMP47:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i32 64
1659 ; CHECK-NEXT: [[TMP48:%.*]] = getelementptr inbounds i8, ptr [[TMP47]], i64 [[TMP43]]
1660 ; CHECK-NEXT: [[TMP49:%.*]] = sub i64 128, [[TMP43]]
1661 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP46]], ptr align 8 [[TMP48]], i64 [[TMP49]], i1 false)
1662 ; CHECK-NEXT: [[TMP50:%.*]] = ptrtoint ptr [[TMP14]] to i64
1663 ; CHECK-NEXT: [[TMP51:%.*]] = xor i64 [[TMP50]], 193514046488576
1664 ; CHECK-NEXT: [[TMP52:%.*]] = inttoptr i64 [[TMP51]] to ptr
1665 ; CHECK-NEXT: [[TMP53:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i32 192
1666 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP52]], ptr align 16 [[TMP53]], i64 [[TMP0]], i1 false)
1667 ; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8
1668 ; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARGS]])
1669 ; CHECK-NEXT: call void @llvm.va_end.p0(ptr nonnull [[ARGS]])
1670 ; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 32, ptr nonnull [[ARGS]])
1671 ; CHECK-NEXT: ret void
1674 %args = alloca %"struct.std::__va_list", align 8
1675 call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %args) #5
1676 call void @llvm.va_start(ptr nonnull %args)
1677 call void @_Z3usePv(ptr noundef nonnull %args)
1678 call void @llvm.va_end(ptr nonnull %args)
1679 call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %args) #5
1683 define linkonce_odr dso_local void @_Z5test2I11LongDouble4EvT_iz([4 x fp128] alignstack(16) %t.coerce, i32 noundef %n, ...) sanitize_memory {
1684 ; CHECK-LABEL: define linkonce_odr dso_local void @_Z5test2I11LongDouble4EvT_iz(
1685 ; CHECK-SAME: [4 x fp128] alignstack(16) [[T_COERCE:%.*]], i32 noundef [[N:%.*]], ...) #[[ATTR0]] {
1686 ; CHECK-NEXT: entry:
1687 ; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8
1688 ; CHECK-NEXT: [[TMP1:%.*]] = add i64 192, [[TMP0]]
1689 ; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 8
1690 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false)
1691 ; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800)
1692 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false)
1693 ; CHECK-NEXT: call void @llvm.donothing()
1694 ; CHECK-NEXT: [[ARGS:%.*]] = alloca %"struct.std::__va_list", align 8
1695 ; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 32, ptr nonnull [[ARGS]])
1696 ; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[ARGS]] to i64
1697 ; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 193514046488576
1698 ; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
1699 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP6]], i8 -1, i64 32, i1 false)
1700 ; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARGS]] to i64
1701 ; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 193514046488576
1702 ; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr
1703 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 32, i1 false)
1704 ; CHECK-NEXT: call void @llvm.va_start.p0(ptr nonnull [[ARGS]])
1705 ; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[ARGS]] to i64
1706 ; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[TMP10]], 0
1707 ; CHECK-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP11]] to ptr
1708 ; CHECK-NEXT: [[TMP13:%.*]] = load i64, ptr [[TMP12]], align 8
1709 ; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP13]] to ptr
1710 ; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[ARGS]] to i64
1711 ; CHECK-NEXT: [[TMP16:%.*]] = add i64 [[TMP15]], 8
1712 ; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr
1713 ; CHECK-NEXT: [[TMP18:%.*]] = load i64, ptr [[TMP17]], align 8
1714 ; CHECK-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[ARGS]] to i64
1715 ; CHECK-NEXT: [[TMP20:%.*]] = add i64 [[TMP19]], 24
1716 ; CHECK-NEXT: [[TMP21:%.*]] = inttoptr i64 [[TMP20]] to ptr
1717 ; CHECK-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
1718 ; CHECK-NEXT: [[TMP23:%.*]] = sext i32 [[TMP22]] to i64
1719 ; CHECK-NEXT: [[TMP24:%.*]] = add i64 [[TMP18]], [[TMP23]]
1720 ; CHECK-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP24]] to ptr
1721 ; CHECK-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[ARGS]] to i64
1722 ; CHECK-NEXT: [[TMP27:%.*]] = add i64 [[TMP26]], 16
1723 ; CHECK-NEXT: [[TMP28:%.*]] = inttoptr i64 [[TMP27]] to ptr
1724 ; CHECK-NEXT: [[TMP29:%.*]] = load i64, ptr [[TMP28]], align 8
1725 ; CHECK-NEXT: [[TMP30:%.*]] = ptrtoint ptr [[ARGS]] to i64
1726 ; CHECK-NEXT: [[TMP31:%.*]] = add i64 [[TMP30]], 28
1727 ; CHECK-NEXT: [[TMP32:%.*]] = inttoptr i64 [[TMP31]] to ptr
1728 ; CHECK-NEXT: [[TMP33:%.*]] = load i32, ptr [[TMP32]], align 4
1729 ; CHECK-NEXT: [[TMP34:%.*]] = sext i32 [[TMP33]] to i64
1730 ; CHECK-NEXT: [[TMP35:%.*]] = add i64 [[TMP29]], [[TMP34]]
1731 ; CHECK-NEXT: [[TMP36:%.*]] = inttoptr i64 [[TMP35]] to ptr
1732 ; CHECK-NEXT: [[TMP37:%.*]] = add i64 64, [[TMP23]]
1733 ; CHECK-NEXT: [[TMP38:%.*]] = ptrtoint ptr [[TMP25]] to i64
1734 ; CHECK-NEXT: [[TMP39:%.*]] = xor i64 [[TMP38]], 193514046488576
1735 ; CHECK-NEXT: [[TMP40:%.*]] = inttoptr i64 [[TMP39]] to ptr
1736 ; CHECK-NEXT: [[TMP41:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i64 [[TMP37]]
1737 ; CHECK-NEXT: [[TMP42:%.*]] = sub i64 64, [[TMP37]]
1738 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP40]], ptr align 8 [[TMP41]], i64 [[TMP42]], i1 false)
1739 ; CHECK-NEXT: [[TMP43:%.*]] = add i64 128, [[TMP34]]
1740 ; CHECK-NEXT: [[TMP44:%.*]] = ptrtoint ptr [[TMP36]] to i64
1741 ; CHECK-NEXT: [[TMP45:%.*]] = xor i64 [[TMP44]], 193514046488576
1742 ; CHECK-NEXT: [[TMP46:%.*]] = inttoptr i64 [[TMP45]] to ptr
1743 ; CHECK-NEXT: [[TMP47:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i32 64
1744 ; CHECK-NEXT: [[TMP48:%.*]] = getelementptr inbounds i8, ptr [[TMP47]], i64 [[TMP43]]
1745 ; CHECK-NEXT: [[TMP49:%.*]] = sub i64 128, [[TMP43]]
1746 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP46]], ptr align 8 [[TMP48]], i64 [[TMP49]], i1 false)
1747 ; CHECK-NEXT: [[TMP50:%.*]] = ptrtoint ptr [[TMP14]] to i64
1748 ; CHECK-NEXT: [[TMP51:%.*]] = xor i64 [[TMP50]], 193514046488576
1749 ; CHECK-NEXT: [[TMP52:%.*]] = inttoptr i64 [[TMP51]] to ptr
1750 ; CHECK-NEXT: [[TMP53:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i32 192
1751 ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP52]], ptr align 16 [[TMP53]], i64 [[TMP0]], i1 false)
1752 ; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8
1753 ; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARGS]])
1754 ; CHECK-NEXT: call void @llvm.va_end.p0(ptr nonnull [[ARGS]])
1755 ; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 32, ptr nonnull [[ARGS]])
1756 ; CHECK-NEXT: ret void
1759 %args = alloca %"struct.std::__va_list", align 8
1760 call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %args) #5
1761 call void @llvm.va_start(ptr nonnull %args)
1762 call void @_Z3usePv(ptr noundef nonnull %args)
1763 call void @llvm.va_end(ptr nonnull %args)
1764 call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %args) #5
1768 define linkonce_odr dso_local void @_Z4test2I11LongDouble4EvT_([4 x fp128] alignstack(16) %arg.coerce) sanitize_memory {
1769 ; CHECK-LABEL: define linkonce_odr dso_local void @_Z4test2I11LongDouble4EvT_(
1770 ; CHECK-SAME: [4 x fp128] alignstack(16) [[ARG_COERCE:%.*]]) #[[ATTR0]] {
1771 ; CHECK-NEXT: entry:
1772 ; CHECK-NEXT: [[TMP0:%.*]] = load [4 x i128], ptr @__msan_param_tls, align 8
1773 ; CHECK-NEXT: call void @llvm.donothing()
1774 ; CHECK-NEXT: [[ARG:%.*]] = alloca [[STRUCT_LONGDOUBLE4:%.*]], align 16
1775 ; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[ARG]] to i64
1776 ; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 193514046488576
1777 ; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr
1778 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 16 [[TMP3]], i8 -1, i64 64, i1 false)
1779 ; CHECK-NEXT: [[TMP4:%.*]] = extractvalue [4 x i128] [[TMP0]], 0
1780 ; CHECK-NEXT: [[ARG_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x fp128] [[ARG_COERCE]], 0
1781 ; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[ARG]] to i64
1782 ; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 193514046488576
1783 ; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr
1784 ; CHECK-NEXT: store i128 [[TMP4]], ptr [[TMP7]], align 16
1785 ; CHECK-NEXT: store fp128 [[ARG_COERCE_FCA_0_EXTRACT]], ptr [[ARG]], align 16
1786 ; CHECK-NEXT: [[TMP8:%.*]] = extractvalue [4 x i128] [[TMP0]], 1
1787 ; CHECK-NEXT: [[ARG_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x fp128] [[ARG_COERCE]], 1
1788 ; CHECK-NEXT: [[ARG_COERCE_FCA_1_GEP:%.*]] = getelementptr inbounds [4 x fp128], ptr [[ARG]], i64 0, i64 1
1789 ; CHECK-NEXT: [[TMP9:%.*]] = ptrtoint ptr [[ARG_COERCE_FCA_1_GEP]] to i64
1790 ; CHECK-NEXT: [[TMP10:%.*]] = xor i64 [[TMP9]], 193514046488576
1791 ; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr
1792 ; CHECK-NEXT: store i128 [[TMP8]], ptr [[TMP11]], align 16
1793 ; CHECK-NEXT: store fp128 [[ARG_COERCE_FCA_1_EXTRACT]], ptr [[ARG_COERCE_FCA_1_GEP]], align 16
1794 ; CHECK-NEXT: [[TMP12:%.*]] = extractvalue [4 x i128] [[TMP0]], 2
1795 ; CHECK-NEXT: [[ARG_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x fp128] [[ARG_COERCE]], 2
1796 ; CHECK-NEXT: [[ARG_COERCE_FCA_2_GEP:%.*]] = getelementptr inbounds [4 x fp128], ptr [[ARG]], i64 0, i64 2
1797 ; CHECK-NEXT: [[TMP13:%.*]] = ptrtoint ptr [[ARG_COERCE_FCA_2_GEP]] to i64
1798 ; CHECK-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], 193514046488576
1799 ; CHECK-NEXT: [[TMP15:%.*]] = inttoptr i64 [[TMP14]] to ptr
1800 ; CHECK-NEXT: store i128 [[TMP12]], ptr [[TMP15]], align 16
1801 ; CHECK-NEXT: store fp128 [[ARG_COERCE_FCA_2_EXTRACT]], ptr [[ARG_COERCE_FCA_2_GEP]], align 16
1802 ; CHECK-NEXT: [[TMP16:%.*]] = extractvalue [4 x i128] [[TMP0]], 3
1803 ; CHECK-NEXT: [[ARG_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x fp128] [[ARG_COERCE]], 3
1804 ; CHECK-NEXT: [[ARG_COERCE_FCA_3_GEP:%.*]] = getelementptr inbounds [4 x fp128], ptr [[ARG]], i64 0, i64 3
1805 ; CHECK-NEXT: [[TMP17:%.*]] = ptrtoint ptr [[ARG_COERCE_FCA_3_GEP]] to i64
1806 ; CHECK-NEXT: [[TMP18:%.*]] = xor i64 [[TMP17]], 193514046488576
1807 ; CHECK-NEXT: [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
1808 ; CHECK-NEXT: store i128 [[TMP16]], ptr [[TMP19]], align 16
1809 ; CHECK-NEXT: store fp128 [[ARG_COERCE_FCA_3_EXTRACT]], ptr [[ARG_COERCE_FCA_3_GEP]], align 16
1810 ; CHECK-NEXT: store i64 0, ptr @__msan_param_tls, align 8
1811 ; CHECK-NEXT: call void @_Z3usePv(ptr noundef nonnull [[ARG]])
1812 ; CHECK-NEXT: [[AGG_TMP_SROA_0_0_COPYLOAD:%.*]] = load fp128, ptr [[ARG]], align 16
1813 ; CHECK-NEXT: [[TMP20:%.*]] = ptrtoint ptr [[ARG]] to i64
1814 ; CHECK-NEXT: [[TMP21:%.*]] = xor i64 [[TMP20]], 193514046488576
1815 ; CHECK-NEXT: [[TMP22:%.*]] = inttoptr i64 [[TMP21]] to ptr
1816 ; CHECK-NEXT: [[_MSLD:%.*]] = load i128, ptr [[TMP22]], align 16
1817 ; CHECK-NEXT: [[AGG_TMP_SROA_2_0_COPYLOAD:%.*]] = load fp128, ptr [[ARG_COERCE_FCA_1_GEP]], align 16
1818 ; CHECK-NEXT: [[TMP23:%.*]] = ptrtoint ptr [[ARG_COERCE_FCA_1_GEP]] to i64
1819 ; CHECK-NEXT: [[TMP24:%.*]] = xor i64 [[TMP23]], 193514046488576
1820 ; CHECK-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP24]] to ptr
1821 ; CHECK-NEXT: [[_MSLD1:%.*]] = load i128, ptr [[TMP25]], align 16
1822 ; CHECK-NEXT: [[AGG_TMP_SROA_3_0_COPYLOAD:%.*]] = load fp128, ptr [[ARG_COERCE_FCA_2_GEP]], align 16
1823 ; CHECK-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[ARG_COERCE_FCA_2_GEP]] to i64
1824 ; CHECK-NEXT: [[TMP27:%.*]] = xor i64 [[TMP26]], 193514046488576
1825 ; CHECK-NEXT: [[TMP28:%.*]] = inttoptr i64 [[TMP27]] to ptr
1826 ; CHECK-NEXT: [[_MSLD2:%.*]] = load i128, ptr [[TMP28]], align 16
1827 ; CHECK-NEXT: [[AGG_TMP_SROA_4_0_COPYLOAD:%.*]] = load fp128, ptr [[ARG_COERCE_FCA_3_GEP]], align 16
1828 ; CHECK-NEXT: [[TMP29:%.*]] = ptrtoint ptr [[ARG_COERCE_FCA_3_GEP]] to i64
1829 ; CHECK-NEXT: [[TMP30:%.*]] = xor i64 [[TMP29]], 193514046488576
1830 ; CHECK-NEXT: [[TMP31:%.*]] = inttoptr i64 [[TMP30]] to ptr
1831 ; CHECK-NEXT: [[_MSLD3:%.*]] = load i128, ptr [[TMP31]], align 16
1832 ; CHECK-NEXT: [[TMP32:%.*]] = insertvalue [4 x i128] [i128 -1, i128 -1, i128 -1, i128 -1], i128 [[_MSLD]], 0
1833 ; CHECK-NEXT: [[DOTFCA_0_INSERT118:%.*]] = insertvalue [4 x fp128] poison, fp128 [[AGG_TMP_SROA_0_0_COPYLOAD]], 0
1834 ; CHECK-NEXT: [[TMP33:%.*]] = insertvalue [4 x i128] [[TMP32]], i128 [[_MSLD1]], 1
1835 ; CHECK-NEXT: [[DOTFCA_1_INSERT119:%.*]] = insertvalue [4 x fp128] [[DOTFCA_0_INSERT118]], fp128 [[AGG_TMP_SROA_2_0_COPYLOAD]], 1
1836 ; CHECK-NEXT: [[TMP34:%.*]] = insertvalue [4 x i128] [[TMP33]], i128 [[_MSLD2]], 2
1837 ; CHECK-NEXT: [[DOTFCA_2_INSERT120:%.*]] = insertvalue [4 x fp128] [[DOTFCA_1_INSERT119]], fp128 [[AGG_TMP_SROA_3_0_COPYLOAD]], 2
1838 ; CHECK-NEXT: [[TMP35:%.*]] = insertvalue [4 x i128] [[TMP34]], i128 [[_MSLD3]], 3
1839 ; CHECK-NEXT: [[DOTFCA_3_INSERT121:%.*]] = insertvalue [4 x fp128] [[DOTFCA_2_INSERT120]], fp128 [[AGG_TMP_SROA_4_0_COPYLOAD]], 3
1840 ; CHECK-NEXT: store [4 x i128] [[TMP35]], ptr @__msan_param_tls, align 8
1841 ; CHECK-NEXT: store i32 0, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 64) to ptr), align 8
1842 ; CHECK-NEXT: store [4 x i128] [[TMP35]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 72) to ptr), align 8
1843 ; CHECK-NEXT: store [4 x i128] [[TMP35]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 136) to ptr), align 8
1844 ; CHECK-NEXT: store [4 x i128] [[TMP35]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 200) to ptr), align 8
1845 ; CHECK-NEXT: store [4 x i128] [[TMP35]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 264) to ptr), align 8
1846 ; CHECK-NEXT: store [4 x i128] [[TMP35]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 328) to ptr), align 8
1847 ; CHECK-NEXT: store [4 x i128] [[TMP35]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 392) to ptr), align 8
1848 ; CHECK-NEXT: store [4 x i128] [[TMP35]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 456) to ptr), align 8
1849 ; CHECK-NEXT: store [4 x i128] [[TMP35]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 520) to ptr), align 8
1850 ; CHECK-NEXT: store [4 x i128] [[TMP35]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 584) to ptr), align 8
1851 ; CHECK-NEXT: store [4 x i128] [[TMP35]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 648) to ptr), align 8
1852 ; CHECK-NEXT: store [4 x i128] [[TMP35]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 712) to ptr), align 8
1853 ; CHECK-NEXT: store [4 x i128] [[TMP35]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_va_arg_tls to i64), i64 128) to ptr), align 8
1854 ; CHECK-NEXT: store [4 x i128] [[TMP35]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_va_arg_tls to i64), i64 192) to ptr), align 8
1855 ; CHECK-NEXT: store [4 x i128] [[TMP35]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_va_arg_tls to i64), i64 256) to ptr), align 8
1856 ; CHECK-NEXT: store [4 x i128] [[TMP35]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_va_arg_tls to i64), i64 320) to ptr), align 8
1857 ; CHECK-NEXT: store [4 x i128] [[TMP35]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_va_arg_tls to i64), i64 384) to ptr), align 8
1858 ; CHECK-NEXT: store [4 x i128] [[TMP35]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_va_arg_tls to i64), i64 448) to ptr), align 8
1859 ; CHECK-NEXT: store [4 x i128] [[TMP35]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_va_arg_tls to i64), i64 512) to ptr), align 8
1860 ; CHECK-NEXT: store [4 x i128] [[TMP35]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_va_arg_tls to i64), i64 576) to ptr), align 8
1861 ; CHECK-NEXT: store [4 x i128] [[TMP35]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_va_arg_tls to i64), i64 640) to ptr), align 8
1862 ; CHECK-NEXT: store [4 x i128] [[TMP35]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_va_arg_tls to i64), i64 704) to ptr), align 8
1863 ; CHECK-NEXT: call void @llvm.memset.p0.i32(ptr align 8 inttoptr (i64 add (i64 ptrtoint (ptr @__msan_va_arg_tls to i64), i64 768) to ptr), i8 0, i32 32, i1 false)
1864 ; CHECK-NEXT: store i64 1216, ptr @__msan_va_arg_overflow_size_tls, align 8
1865 ; CHECK-NEXT: call void ([4 x fp128], i32, ...) @_Z5test2I11LongDouble4EvT_iz([4 x fp128] alignstack(16) [[DOTFCA_3_INSERT121]], i32 noundef 20, [4 x fp128] alignstack(16) [[DOTFCA_3_INSERT121]], [4 x fp128] alignstack(16) [[DOTFCA_3_INSERT121]], [4 x fp128] alignstack(16) [[DOTFCA_3_INSERT121]], [4 x fp128] alignstack(16) [[DOTFCA_3_INSERT121]], [4 x fp128] alignstack(16) [[DOTFCA_3_INSERT121]], [4 x fp128] alignstack(16) [[DOTFCA_3_INSERT121]], [4 x fp128] alignstack(16) [[DOTFCA_3_INSERT121]], [4 x fp128] alignstack(16) [[DOTFCA_3_INSERT121]], [4 x fp128] alignstack(16) [[DOTFCA_3_INSERT121]], [4 x fp128] alignstack(16) [[DOTFCA_3_INSERT121]], [4 x fp128] alignstack(16) [[DOTFCA_3_INSERT121]], [4 x fp128] alignstack(16) [[DOTFCA_3_INSERT121]], [4 x fp128] alignstack(16) [[DOTFCA_3_INSERT121]], [4 x fp128] alignstack(16) [[DOTFCA_3_INSERT121]], [4 x fp128] alignstack(16) [[DOTFCA_3_INSERT121]], [4 x fp128] alignstack(16) [[DOTFCA_3_INSERT121]], [4 x fp128] alignstack(16) [[DOTFCA_3_INSERT121]], [4 x fp128] alignstack(16) [[DOTFCA_3_INSERT121]], [4 x fp128] alignstack(16) [[DOTFCA_3_INSERT121]], [4 x fp128] alignstack(16) [[DOTFCA_3_INSERT121]])
1866 ; CHECK-NEXT: ret void
1869 %arg = alloca %struct.LongDouble4, align 16
1870 %arg.coerce.fca.0.extract = extractvalue [4 x fp128] %arg.coerce, 0
1871 store fp128 %arg.coerce.fca.0.extract, ptr %arg, align 16
1872 %arg.coerce.fca.1.extract = extractvalue [4 x fp128] %arg.coerce, 1
1873 %arg.coerce.fca.1.gep = getelementptr inbounds [4 x fp128], ptr %arg, i64 0, i64 1
1874 store fp128 %arg.coerce.fca.1.extract, ptr %arg.coerce.fca.1.gep, align 16
1875 %arg.coerce.fca.2.extract = extractvalue [4 x fp128] %arg.coerce, 2
1876 %arg.coerce.fca.2.gep = getelementptr inbounds [4 x fp128], ptr %arg, i64 0, i64 2
1877 store fp128 %arg.coerce.fca.2.extract, ptr %arg.coerce.fca.2.gep, align 16
1878 %arg.coerce.fca.3.extract = extractvalue [4 x fp128] %arg.coerce, 3
1879 %arg.coerce.fca.3.gep = getelementptr inbounds [4 x fp128], ptr %arg, i64 0, i64 3
1880 store fp128 %arg.coerce.fca.3.extract, ptr %arg.coerce.fca.3.gep, align 16
1881 call void @_Z3usePv(ptr noundef nonnull %arg)
1882 %agg.tmp.sroa.0.0.copyload = load fp128, ptr %arg, align 16
1883 %agg.tmp.sroa.2.0.copyload = load fp128, ptr %arg.coerce.fca.1.gep, align 16
1884 %agg.tmp.sroa.3.0.copyload = load fp128, ptr %arg.coerce.fca.2.gep, align 16
1885 %agg.tmp.sroa.4.0.copyload = load fp128, ptr %arg.coerce.fca.3.gep, align 16
1886 %.fca.0.insert118 = insertvalue [4 x fp128] poison, fp128 %agg.tmp.sroa.0.0.copyload, 0
1887 %.fca.1.insert119 = insertvalue [4 x fp128] %.fca.0.insert118, fp128 %agg.tmp.sroa.2.0.copyload, 1
1888 %.fca.2.insert120 = insertvalue [4 x fp128] %.fca.1.insert119, fp128 %agg.tmp.sroa.3.0.copyload, 2
1889 %.fca.3.insert121 = insertvalue [4 x fp128] %.fca.2.insert120, fp128 %agg.tmp.sroa.4.0.copyload, 3
1890 call void ([4 x fp128], i32, ...) @_Z5test2I11LongDouble4EvT_iz([4 x fp128] alignstack(16) %.fca.3.insert121, i32 noundef 20, [4 x fp128] alignstack(16) %.fca.3.insert121, [4 x fp128] alignstack(16) %.fca.3.insert121, [4 x fp128] alignstack(16) %.fca.3.insert121, [4 x fp128] alignstack(16) %.fca.3.insert121, [4 x fp128] alignstack(16) %.fca.3.insert121, [4 x fp128] alignstack(16) %.fca.3.insert121, [4 x fp128] alignstack(16) %.fca.3.insert121, [4 x fp128] alignstack(16) %.fca.3.insert121, [4 x fp128] alignstack(16) %.fca.3.insert121, [4 x fp128] alignstack(16) %.fca.3.insert121, [4 x fp128] alignstack(16) %.fca.3.insert121, [4 x fp128] alignstack(16) %.fca.3.insert121, [4 x fp128] alignstack(16) %.fca.3.insert121, [4 x fp128] alignstack(16) %.fca.3.insert121, [4 x fp128] alignstack(16) %.fca.3.insert121, [4 x fp128] alignstack(16) %.fca.3.insert121, [4 x fp128] alignstack(16) %.fca.3.insert121, [4 x fp128] alignstack(16) %.fca.3.insert121, [4 x fp128] alignstack(16) %.fca.3.insert121, [4 x fp128] alignstack(16) %.fca.3.insert121)