1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
5 define void @sub_i32() {entry: ret void}
6 define void @sub_i8_sext() {entry: ret void}
7 define void @sub_i8_zext() {entry: ret void}
8 define void @sub_i8_aext() {entry: ret void}
9 define void @sub_i16_sext() {entry: ret void}
10 define void @sub_i16_zext() {entry: ret void}
11 define void @sub_i16_aext() {entry: ret void}
12 define void @sub_i64() {entry: ret void}
13 define void @sub_i128() {entry: ret void}
19 tracksRegLiveness: true
24 ; MIPS32-LABEL: name: sub_i32
25 ; MIPS32: liveins: $a0, $a1
27 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
28 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
29 ; MIPS32-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY]], [[COPY1]]
30 ; MIPS32-NEXT: $v0 = COPY [[SUB]](s32)
31 ; MIPS32-NEXT: RetRA implicit $v0
34 %2:_(s32) = G_SUB %0, %1
42 tracksRegLiveness: true
47 ; MIPS32-LABEL: name: sub_i8_sext
48 ; MIPS32: liveins: $a0, $a1
50 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
51 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
52 ; MIPS32-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY1]], [[COPY]]
53 ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
54 ; MIPS32-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[SUB]], [[C]](s32)
55 ; MIPS32-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
56 ; MIPS32-NEXT: $v0 = COPY [[ASHR]](s32)
57 ; MIPS32-NEXT: RetRA implicit $v0
59 %0:_(s8) = G_TRUNC %2(s32)
61 %1:_(s8) = G_TRUNC %3(s32)
62 %4:_(s8) = G_SUB %1, %0
63 %5:_(s32) = G_SEXT %4(s8)
71 tracksRegLiveness: true
76 ; MIPS32-LABEL: name: sub_i8_zext
77 ; MIPS32: liveins: $a0, $a1
79 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
80 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
81 ; MIPS32-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY1]], [[COPY]]
82 ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
83 ; MIPS32-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[SUB]], [[C]]
84 ; MIPS32-NEXT: $v0 = COPY [[AND]](s32)
85 ; MIPS32-NEXT: RetRA implicit $v0
87 %0:_(s8) = G_TRUNC %2(s32)
89 %1:_(s8) = G_TRUNC %3(s32)
90 %4:_(s8) = G_SUB %1, %0
91 %5:_(s32) = G_ZEXT %4(s8)
99 tracksRegLiveness: true
104 ; MIPS32-LABEL: name: sub_i8_aext
105 ; MIPS32: liveins: $a0, $a1
106 ; MIPS32-NEXT: {{ $}}
107 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
108 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
109 ; MIPS32-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY1]], [[COPY]]
110 ; MIPS32-NEXT: $v0 = COPY [[SUB]](s32)
111 ; MIPS32-NEXT: RetRA implicit $v0
113 %0:_(s8) = G_TRUNC %2(s32)
115 %1:_(s8) = G_TRUNC %3(s32)
116 %4:_(s8) = G_SUB %1, %0
117 %5:_(s32) = G_ANYEXT %4(s8)
125 tracksRegLiveness: true
130 ; MIPS32-LABEL: name: sub_i16_sext
131 ; MIPS32: liveins: $a0, $a1
132 ; MIPS32-NEXT: {{ $}}
133 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
134 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
135 ; MIPS32-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY1]], [[COPY]]
136 ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
137 ; MIPS32-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[SUB]], [[C]](s32)
138 ; MIPS32-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
139 ; MIPS32-NEXT: $v0 = COPY [[ASHR]](s32)
140 ; MIPS32-NEXT: RetRA implicit $v0
142 %0:_(s16) = G_TRUNC %2(s32)
144 %1:_(s16) = G_TRUNC %3(s32)
145 %4:_(s16) = G_SUB %1, %0
146 %5:_(s32) = G_SEXT %4(s16)
154 tracksRegLiveness: true
159 ; MIPS32-LABEL: name: sub_i16_zext
160 ; MIPS32: liveins: $a0, $a1
161 ; MIPS32-NEXT: {{ $}}
162 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
163 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
164 ; MIPS32-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY1]], [[COPY]]
165 ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
166 ; MIPS32-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[SUB]], [[C]]
167 ; MIPS32-NEXT: $v0 = COPY [[AND]](s32)
168 ; MIPS32-NEXT: RetRA implicit $v0
170 %0:_(s16) = G_TRUNC %2(s32)
172 %1:_(s16) = G_TRUNC %3(s32)
173 %4:_(s16) = G_SUB %1, %0
174 %5:_(s32) = G_ZEXT %4(s16)
182 tracksRegLiveness: true
187 ; MIPS32-LABEL: name: sub_i16_aext
188 ; MIPS32: liveins: $a0, $a1
189 ; MIPS32-NEXT: {{ $}}
190 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
191 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
192 ; MIPS32-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY1]], [[COPY]]
193 ; MIPS32-NEXT: $v0 = COPY [[SUB]](s32)
194 ; MIPS32-NEXT: RetRA implicit $v0
196 %0:_(s16) = G_TRUNC %2(s32)
198 %1:_(s16) = G_TRUNC %3(s32)
199 %4:_(s16) = G_SUB %1, %0
200 %5:_(s32) = G_ANYEXT %4(s16)
208 tracksRegLiveness: true
211 liveins: $a0, $a1, $a2, $a3
213 ; MIPS32-LABEL: name: sub_i64
214 ; MIPS32: liveins: $a0, $a1, $a2, $a3
215 ; MIPS32-NEXT: {{ $}}
216 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
217 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
218 ; MIPS32-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
219 ; MIPS32-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3
220 ; MIPS32-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY3]], [[COPY1]]
221 ; MIPS32-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[COPY3]](s32), [[COPY1]]
222 ; MIPS32-NEXT: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[COPY2]], [[COPY]]
223 ; MIPS32-NEXT: [[SUB2:%[0-9]+]]:_(s32) = G_SUB [[SUB1]], [[ICMP]]
224 ; MIPS32-NEXT: $v0 = COPY [[SUB2]](s32)
225 ; MIPS32-NEXT: $v1 = COPY [[SUB]](s32)
226 ; MIPS32-NEXT: RetRA implicit $v0, implicit $v1
229 %0:_(s64) = G_MERGE_VALUES %3(s32), %2(s32)
232 %1:_(s64) = G_MERGE_VALUES %5(s32), %4(s32)
233 %6:_(s64) = G_SUB %1, %0
234 %7:_(s32), %8:_(s32) = G_UNMERGE_VALUES %6(s64)
237 RetRA implicit $v0, implicit $v1
243 tracksRegLiveness: true
245 - { id: 0, offset: 28, size: 4, alignment: 4, stack-id: default, isImmutable: true }
246 - { id: 1, offset: 24, size: 4, alignment: 8, stack-id: default, isImmutable: true }
247 - { id: 2, offset: 20, size: 4, alignment: 4, stack-id: default, isImmutable: true }
248 - { id: 3, offset: 16, size: 4, alignment: 8, stack-id: default, isImmutable: true }
251 liveins: $a0, $a1, $a2, $a3
253 ; MIPS32-LABEL: name: sub_i128
254 ; MIPS32: liveins: $a0, $a1, $a2, $a3
255 ; MIPS32-NEXT: {{ $}}
256 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
257 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
258 ; MIPS32-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
259 ; MIPS32-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3
260 ; MIPS32-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
261 ; MIPS32-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s32) from %fixed-stack.0, align 8)
262 ; MIPS32-NEXT: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.1
263 ; MIPS32-NEXT: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (s32) from %fixed-stack.1)
264 ; MIPS32-NEXT: [[FRAME_INDEX2:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.2
265 ; MIPS32-NEXT: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX2]](p0) :: (load (s32) from %fixed-stack.2, align 8)
266 ; MIPS32-NEXT: [[FRAME_INDEX3:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.3
267 ; MIPS32-NEXT: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX3]](p0) :: (load (s32) from %fixed-stack.3)
268 ; MIPS32-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[LOAD]], [[COPY]]
269 ; MIPS32-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[LOAD]](s32), [[COPY]]
270 ; MIPS32-NEXT: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[LOAD1]], [[COPY1]]
271 ; MIPS32-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(ugt), [[SUB1]](s32), [[LOAD1]]
272 ; MIPS32-NEXT: [[SUB2:%[0-9]+]]:_(s32) = G_SUB [[SUB1]], [[ICMP]]
273 ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
274 ; MIPS32-NEXT: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[SUB1]](s32), [[C]]
275 ; MIPS32-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ICMP2]], [[ICMP]]
276 ; MIPS32-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[ICMP1]], [[AND]]
277 ; MIPS32-NEXT: [[SUB3:%[0-9]+]]:_(s32) = G_SUB [[LOAD2]], [[COPY2]]
278 ; MIPS32-NEXT: [[ICMP3:%[0-9]+]]:_(s32) = G_ICMP intpred(ugt), [[SUB3]](s32), [[LOAD2]]
279 ; MIPS32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
280 ; MIPS32-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[OR]], [[C1]]
281 ; MIPS32-NEXT: [[SUB4:%[0-9]+]]:_(s32) = G_SUB [[SUB3]], [[AND1]]
282 ; MIPS32-NEXT: [[ICMP4:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[SUB3]](s32), [[C]]
283 ; MIPS32-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[ICMP4]], [[OR]]
284 ; MIPS32-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[ICMP3]], [[AND2]]
285 ; MIPS32-NEXT: [[SUB5:%[0-9]+]]:_(s32) = G_SUB [[LOAD3]], [[COPY3]]
286 ; MIPS32-NEXT: [[AND3:%[0-9]+]]:_(s32) = G_AND [[OR1]], [[C1]]
287 ; MIPS32-NEXT: [[SUB6:%[0-9]+]]:_(s32) = G_SUB [[SUB5]], [[AND3]]
288 ; MIPS32-NEXT: $v0 = COPY [[SUB]](s32)
289 ; MIPS32-NEXT: $v1 = COPY [[SUB2]](s32)
290 ; MIPS32-NEXT: $a0 = COPY [[SUB4]](s32)
291 ; MIPS32-NEXT: $a1 = COPY [[SUB6]](s32)
292 ; MIPS32-NEXT: RetRA implicit $v0, implicit $v1, implicit $a0, implicit $a1
297 %0:_(s128) = G_MERGE_VALUES %2(s32), %3(s32), %4(s32), %5(s32)
298 %10:_(p0) = G_FRAME_INDEX %fixed-stack.3
299 %6:_(s32) = G_LOAD %10(p0) :: (load (s32) from %fixed-stack.3, align 8)
300 %11:_(p0) = G_FRAME_INDEX %fixed-stack.2
301 %7:_(s32) = G_LOAD %11(p0) :: (load (s32) from %fixed-stack.2, align 4)
302 %12:_(p0) = G_FRAME_INDEX %fixed-stack.1
303 %8:_(s32) = G_LOAD %12(p0) :: (load (s32) from %fixed-stack.1, align 8)
304 %13:_(p0) = G_FRAME_INDEX %fixed-stack.0
305 %9:_(s32) = G_LOAD %13(p0) :: (load (s32) from %fixed-stack.0, align 4)
306 %1:_(s128) = G_MERGE_VALUES %6(s32), %7(s32), %8(s32), %9(s32)
307 %14:_(s128) = G_SUB %1, %0
308 %15:_(s32), %16:_(s32), %17:_(s32), %18:_(s32) = G_UNMERGE_VALUES %14(s128)
313 RetRA implicit $v0, implicit $v1, implicit $a0, implicit $a1